The present invention relates generally transient suppressing circuits. More specifically, the present invention relates generally to transient suppressing circuits that may be used to mitigate against voltage transients that may occur on signal lines.
Voltage transients are short duration voltage surges or spikes. Unsuppressed, voltage transients may damage circuits and components, possibly resulting in complete system failure.
Voltage transients may be generated from a number of different sources. For example, switching of inductive loads, such as those that occur with transformers, generators, motors, and relays, can create transients up to hundreds of volts and amps, and can last as long as hundreds of milliseconds. Such transients can negatively affect both AC and DC circuits.
Voltage transients may also be created by lightning strikes. Such lightning strikes and associated voltage transients may create disturbance on electrical and communication lines connected to electronic equipment. Another source of voltage transients is known as an automotive load dump. A load dump refers to what happens to a supply voltage in a vehicle when a load is removed. If a load is removed rapidly, such as when the battery is disconnected while the engine is running, the voltage may spike before stabilizing the damage electric components associated with the vehicle.
Circuit structures, such as a Zener diode in series with a thyristor, have been used for transient suppression. However, such circuit structures do not provide adequate transient suppression when transient voltages exceed 150 volts.
Transient suppression circuit arrangements are disclosed. In one implementation of a transient suppression circuit, at least one avalanche diode is coupled in series with a DIAC, a silicon diode for alternating current (SIDAC) device or SIDACtor. Each of the DIAC, SIDAC and SIDACtor devices is considered a threshold voltage triggered switch. In particular, such a device is considered a silicon bilateral voltage triggered switch that breaks down from high impedance to low impedance when a threshold voltage is applied. In another implementation, a plurality of avalanche diodes is coupled in series with a DIAC, SIDAC device or SIDACtor. In another implementation, at least one avalanche diode is coupled in series with a SIDACtor. In yet another implementation, a plurality of avalanche diodes is coupled in series with a SIDACtor.
The avalanche diode 102 and the SIDACtor 104 may be a coupled in series between a first input terminal 106 and a second input terminal 108. In one implementation, the first input terminal 106 or the second input terminal 108 is coupled to ground. A supply voltage may be provided to at least one of the first input terminal 106 and the second input terminal 108. The supply voltage may provide voltage to an equipment device (not illustrated) coupled to at least one of the first input terminal 106 and the second input terminal 108. The series arrangement of the avalanche diode 102 and the SIDACtor 104 is provided to protect the equipment device or the like from voltage transients that may be present at least one of the first input terminal 106 and the second input terminal 108.
In one implementation, the avalanche diode 102 has a breakdown voltage of VZ, and the SIDACtor 104 has a breakdown voltage of VSO. In one implementation, VZ is equal to or nominally higher than a supply voltage provided at least one of the first input terminal 106 and the second input terminal 108. In one implementation, VZ+VSO is lower than a breakdown of voltage associated with the equipment device. In a particular implementation, VZ+VSO is approximately 1000-1500 volts. In another implementation, VZ+VSO is approximately 3000-3500 volts.
The avalanche diodes 202 and the SIDACtor 204 may be a coupled in series between a first input terminal 206 and a second input terminal 208. In one implementation, the first input terminal 206 or the second input terminal 208 is coupled to ground. A supply voltage may be provided at least one of the first input terminal 206 and the second input terminal 208. The supply voltage may provide voltage to an equipment device (not illustrated) coupled to at least one of the first input terminal 206 and the second input terminal 208. The series arrangement of the avalanche diodes 202 and the SIDACtor 204 is provided to protect the equipment device or the like from voltage transients that may be present at least one of the first input terminal 206 and the second input terminal 208.
In one implementation, the avalanche diodes 202 has a breakdown voltage of VZ and VFB, respectively, and the SIDACtor 204 has a breakdown voltage of VSO. In one implementation, VZ+VFB+VSO is lower than a breakdown of voltage associated with the equipment device. In a particular implementation, VZ+VFB+VSO is approximately 1000-1500 volts. In another implementation, VZ+VFB+VSO is approximately 3000-3500 volts. In one implementation, the device 202 is a foldback (FB) (e.g., Foldbak™) diode.
Transient suppression circuit arrangements are disclosed with reference to certain embodiments, it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted without departing from the spirit and scope of the claims of the application. Other modifications may be made to adapt a particular situation or material to the teachings disclosed above without departing from the scope of the claims. Therefore, the claims should not be construed as being limited to any one of the particular embodiments disclosed, but to any embodiments that fall within the scope of the claims.
This Application claims priority to U.S. Provisional Patent Application No. 62/348,242, filed Jun. 10, 2016, entitled Transient Suppressing Circuit Arrangements, and incorporated by reference herein in its entirety.
Number | Date | Country | |
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62348242 | Jun 2016 | US |