Information
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Patent Grant
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D443253
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Patent Number
D443,253
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Date Filed
Thursday, January 13, 200025 years ago
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Date Issued
Tuesday, June 5, 200123 years ago
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Inventors
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Original Assignees
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Examiners
Agents
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US Classifications
Field of Search
US
- D13 182
- D13 184
- D13 199
- 257 48
- 257 690
- 257 692
- 257 693
- 257 697
- 361 395
- 324 1581
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International Classifications
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Description
FIG. 1 is a front elevational view showing a transistor substrate according to a first embodiment of the present invention;
FIG. 2 is a rear elevational view of the substrate of FIG. 1;
FIG. 3 is a top plan view of the substrate of FIG. 1;
FIG. 4 is a bottom plan view of the substrate of FIG. 1;
FIG. 5 is a right side elevational view of the substrate of FIG. 1, the left side elevational view being a mirror image of the right side elevational view;
FIG. 6 is a top front perspective view of the substrate of FIG. 1;
FIG. 7 is a top plan view showing a transistor substrate according to a second embodiment of the present invention, wherein the front elevational view, the rear elevational view, the bottom plan view, the right side elevational view and the left side elevational view are identical with those of the first embodiment;
FIG. 8 is a top front perspective view of the substrate of FIG. 7;
FIG. 9 is a top plan view showing a transistor substrate according to a third embodiment of the present invention, wherein the front elevational view, the rear elevational view, the bottom plan view, the right side elevational view and the left side elevational view are identical with those of the first embodiment;
FIG. 10 is a top front perspective view of the substrate of FIG. 9;
FIG. 11 is a top plan view showing a transistor substrate according to a fourth embodiment of the present invention, wherein the front elevational view, the rear elevational view, the bottom plan view, the right side elevational view and the left side elevational view are identical with those of the first embodiment; and,
FIG. 12 is a top front perspective view of the substrate of FIG. 11.
Claims
- The ornamental design for a transistor substrate, as shown and described.
Priority Claims (4)
Number |
Date |
Country |
Kind |
11-18961 |
Jul 1999 |
JP |
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11-18962 |
Jul 1999 |
JP |
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11-18963 |
Jul 1999 |
JP |
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11-18964 |
Jul 1999 |
JP |
|
US Referenced Citations (5)