Claims
- 1. A transmission gate circuit, comprising:
- an electrical switch having a first terminal connected to a voltage source, a second terminal, and a third terminal forming a circuit output;
- a pull-up control circuit having a first terminal forming a circuit input and a second terminal connected to the second terminal of the electrical switch; and
- a pull-down control circuit having a first terminal connected to the circuit input and a second terminal connected to the circuit output wherein the pull-down control circuit passes the input to the output when the input transitions from low to high during a final phase of output signal transition.
- 2. The circuit of claim 1 wherein the electrical switch comprises a bipolar transistor further comprising:
- a base terminal forming the second terminal;
- a collector terminal forming the first terminal;
- an emitter terminal forming the third terminal.
- 3. The circuit of claim 1 wherein the pull-up control circuit comprises a CMOS transmission gate.
- 4. The circuit of claim 1 wherein the pull-up control circuit comprises a plurality of CMOS transmission gates with the gate outputs connected in parallel.
- 5. The circuit of claim 1 wherein the pull-down control circuit comprises a CMOS transmission gate.
- 6. The circuit of claim 1 wherein the pull-down control circuit comprises a plurality of CMOS transmission gates with the gate outputs connected in parallel.
- 7. A high speed transmission gate, comprising:
- a first CMOS transmission gate having a first terminal forming a circuit input, a first control terminal connected to a first enable voltage signal, a second control terminal connected to a second enable voltage signal, and a second terminal;
- a second CMOS transmission gate having a first terminal connected to the circuit input, a first control terminal connected to the first enable voltage signal, a second control terminal connected to the second enable voltage signal, and a second terminal forming a circuit output, wherein second CMOS transmission gate passes the input to the output when the input transitions from low to high during a final phase of output signal transition; and
- a bipolar transistor having a collector connected to a power supply, a base connected to the second terminal of the first CMOS transmission gate, and an emitter connected to the circuit output.
- 8. The circuit of claim 7 wherein the bipolar transistor comprises an NPN bipolar transistor.
Parent Case Info
This application is a Continuation of application Ser. No. 08/028,901, filed Mar. 8, 1993, now abandoned.
US Referenced Citations (10)
Continuations (1)
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Number |
Date |
Country |
Parent |
28901 |
Mar 1993 |
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