I. Field
The present disclosure relates generally to communication, and more specifically to techniques for transmitting data in a wireless communication system.
II. Background
Wireless communication systems are widely deployed to provide various communication content such as voice, video, packet data, messaging, broadcast, etc. These wireless systems may be multiple-access systems capable of supporting multiple users by sharing the available system resources. Examples of such multiple-access systems include Code Division Multiple Access (CDMA) systems, Time Division Multiple Access (TDMA) systems, Frequency Division Multiple Access (FDMA) systems, Orthogonal FDMA (OFDMA) systems, and Single-Carrier FDMA (SC-FDMA) systems.
A wireless communication system may support transmit diversity in order to improve performance of data transmission. Transmit diversity refers to transmission of data redundantly from multiple transmit antennas to improve the reliability of the data transmission. A propagation path may exist between each transmit antenna and a receive antenna. The propagation paths for the multiple transmit antennas may experience different channel conditions, e.g., different fading, multipath, and interference effects. Sending the data transmission from the multiple transmit antennas may thus improve the likelihood of receiving the data transmission via at least one good propagation path. It may be desirable to support transmit diversity while retaining other pertinent signal characteristics, as described below.
Techniques for transmitting data from two transmit antennas in a single SC-FDMA symbol period to achieve full transmit diversity while maintaining a single-carrier waveform for each transmit antenna are described herein. The techniques may be used by a user equipment (UE) for transmission on the uplink and by a base station for transmission on the downlink.
In one design, a transmitter (e.g., a UE) may form a first symbol vector comprising a first modulation symbol sequence and a second modulation symbol sequence. The transmitter may also form a second symbol vector comprising a third modulation symbol sequence and a fourth modulation symbol sequence. The third and fourth modulation symbol sequences may be generated based on the second and first modulation symbol sequences, respectively. Each symbol vector may further include a cyclic prefix and possibly a cyclic postfix for each modulation symbol sequence. The transmitter may generate a first SC-FDMA symbol based on the first symbol vector and a second SC-FDMA symbol based on the second symbol vector. The transmitter may transmit the first and second SC-FDMA symbols from first and second transmit antennas, respectively, in a single SC-FDMA symbol period to achieve transmit diversity. A receiver (e.g., a base station) may perform SC-FDMA demodulation and symbol detection to recover the first and second modulation symbol sequences from the transmitter.
Various aspects and features of the disclosure are described in further detail below.
The techniques described herein may be used for various wireless communication systems such as CDMA, TDMA, FDMA, OFDMA, SC-FDMA and other systems. The terms “system” and “network” are often used interchangeably. A CDMA system may implement a radio technology such as Universal Terrestrial Radio Access (UTRA), cdma2000, etc. UTRA includes Wideband CDMA (WCDMA) and other variants of CDMA. cdma2000 covers IS-2000, IS-95 and IS-856 standards. A TDMA system may implement a radio technology such as Global System for Mobile Communications (GSM). An OFDMA system may implement a radio technology such as Evolved UTRA (E-UTRA), Ultra Mobile Broadband (UMB), IEEE 802.11 (Wi-Fi), IEEE 802.16 (WiMAX), IEEE 802.20, Flash-OFDM®, etc. UTRA and E-UTRA are part of Universal Mobile Telecommunication System (UMTS). 3GPP Long Term Evolution (LTE) and LTE-Advanced (LTE-A) are new releases of UMTS that use E-UTRA, which employs OFDMA on the downlink and SC-FDMA on the uplink. UTRA, E-UTRA, UMTS, LTE, LTE-A and GSM are described in documents from an organization named “3rd Generation Partnership Project” (3GPP). cdma2000 and UMB are described in documents from an organization named “3rd Generation Partnership Project 2” (3GPP2). The techniques described herein may be used for the systems and radio technologies mentioned above as well as other systems and radio technologies. For clarity, certain aspects of the techniques are described below for LTE, and LTE terminology is used in much of the description below.
LTE utilizes orthogonal frequency division multiplexing (OFDM) on the downlink and single-carrier frequency division multiplexing (SC-FDM) on the uplink. OFDM and SC-FDM partition a frequency range into multiple (K) orthogonal subcarriers, which are also commonly referred to as tones, bins, etc. The system bandwidth may correspond to a subset of the K total subcarriers, and the remaining subcarriers may be used as guard band. Each subcarrier may be modulated with data. In general, modulation symbols are sent in the frequency domain with OFDM and in the time domain with SC-FDM. The spacing between adjacent subcarriers may be fixed, and the total number of subcarriers (K) may be dependent on the system bandwidth. For example, K may be equal to 128, 256, 512, 1024 or 2048 for system bandwidth of 1.25, 2.5, 5, 10 or 20 MHz, respectively.
At UE 110, a transmit data processor 114 may receive traffic data from a data source 112, process (e.g., encode, interleave, and modulate) the traffic data based on one or more modulation and coding schemes, and provide data symbols. Processor 114 may also process control data from a controller/processor 140 and provide control symbols. Processor 114 may further generate reference symbols for a reference signal or pilot. A transmit diversity processor 120 may receive modulation symbols, which may include the data symbols, the control symbols, and/or the reference symbols. Processor 120 may perform transmit diversity on the modulation symbols if enabled, and may provide T output symbol streams to T modulators (MODs) 130a through 130t. Each modulator 130 may process a respective output symbol stream (e.g., for SC-FDMA) to obtain an output sample stream. Each modulator 130 may further process (e.g., convert to analog, amplify, filter, and upconvert) the output sample stream to obtain an uplink signal. T uplink signals from modulators 130a through 130t may be transmitted via T antennas 132a through 132t, respectively.
At eNB 150, antennas 152a through 152r may receive the uplink signals from UE 110 and provide received signals to demodulators (DEMODs) 160a through 160r, respectively. Each demodulator 160 may condition (e.g., filter, amplify, downconvert, and digitize) a respective received signal to obtain received samples. Each demodulator 160 may further process the received samples (e.g., for SC-FDMA) to obtain input samples. A receive diversity processor 170 may receive input samples from all R demodulators 160a through 160r, process the input samples in a manner complementary to processing by transmit diversity processor 120, and provide modulation symbol estimates. A receive data processor 172 may process (e.g., demodulate, deinterleave, and decode) the modulation symbol estimates, provide decoded traffic data to a data sink 174, and provide decoded control data to a controller/processor 190.
On the downlink, at eNB 150, traffic data from a data source 182 and control data from controller/processor 190 may be processed by a transmit data processor 184 and a transmit diversity processor 186, conditioned by modulators 160a through 160r, and transmitted to UE 110. At UE 110, the downlink signals from eNB 150 may be received by antennas 132, conditioned by demodulators 130, processed by a receive diversity processor 134 and further processed by a receive data processor 136 to obtain the traffic data and control data sent to UE 110.
Controllers/processors 140 and 190 may direct the operation at UE 110 and eNB 150, respectively. Memories 142 and 192 may store data and program codes for UE 110 and eNB 150, respectively. A scheduler 194 may schedule UEs for data transmission and may assign resources to the scheduled UEs.
UE 110 may transmit traffic data and/or control data on the uplink with open loop transmit diversity (OLTD), which may also be referred to as simply transmit diversity. For OLTD, UE 110 may transmit data from multiple transmit antennas to one or more receive antennas at eNB 150 without using any feedback information from eNB 150. For simplicity, much of the description herein is for data transmission with transmit diversity from two transmit antennas at UE 110 to one receive antenna at eNB 150.
In an aspect, a transmit diversity scheme may be used to transmit data from two transmit antennas in a single SC-FDMA symbol period to achieve full transmit diversity while maintaining a single-carrier waveform for each transmit antenna. This transmit diversity scheme may be referred to as one-symbol space-time block code (STBC) scheme. A single-carrier waveform may be obtained by sending data on a set of contiguous subcarriers using SC-FDMA. A single-carrier waveform may have a lower peak-to-average-power ratio (PAPR), which may be desirable. For example, the lower PAPR may allow UE 110 to operate its power amplifiers with a smaller back-off, which may improve efficiency and allow for a higher peak output power. The improved efficiency may extend battery life, and the higher peak output power may be desirable for a power-limited UE, e.g., a UE at the edge of coverage.
The first and second symbol vectors may be expressed as:
where
As shown in equation (1), the first symbol vector s1 may include the first modulation symbol sequence a(n) of length Q, the second modulation symbol sequence b(n) of length Q, and cyclic prefixes and postfixes. As shown in equation (2), the second symbol vector s2 may include the third modulation symbol sequence {tilde over (b)}(n) of length Q, the fourth modulation symbol sequence −ã(n) of length Q, and cyclic prefixes and postfixes. Modulation symbol sequences −ã(n) and {tilde over (b)}(n) may be inversed, cyclically shifted, and conjugated versions of modulation symbol sequences a(n) and b(n), respectively. The signal structure in
The design shown in
In the design shown in
The received samples y(n) from cyclic prefix removal unit 462 may be expressed as:
y(n)=h1(n){circle around (×)}Kx1(n)+h2(n){circle around (×)}Kx2(n)+w(n), Eq (3)
where
The equivalent channel for each transmit antenna 132 may include the actual channel from that transmit antenna to receive antenna 152 as well as the effects of RF transmitter 340 at UE 110 and RF receiver 450 at eNB 150. The channel impulse response for each transmit antenna may include L time-domain taps, where L may be much less than the total number of subcarriers, or L<<K.
The received symbols Y(k) from FFT unit 464 may be expressed as:
Y(k)=H1(k)·X1(k)+H2(k)·X2(k)+W(k), for k=0, . . . , K−1, Eq (4)
where X1(k), X2(k), H1(k), H2(k) and W(k) are K-point FFTs of x1(n), x2(n), h1(n), h2(n) and w(n), respectively.
Within receive diversity processor 170, a unit 472 may obtain M input samples r(n) from SC-FDMA demodulator 460 and may provide two sample vectors r1 and r2 of length Q, which may be expressed as:
As shown in equation (5), unit 472 may discard the first P1 input samples in r(n) corresponding to cyclic prefix 212a in
r1(n)=
r2(n)=
where
The shortened channel impulse responses
where υ=└L·M/K+1┘. The rightmost channel taps h′1(M−1) and h′2(M−1) may have a fair amount of energy due to windowing of H1(k) and H2(k) with a rectangular window to obtain H′1(k) and H′2(k), respectively.
In another design, Q circularly consecutive taps with the most energy in the channel impulse responses h′1(n) and h′2(n) may be used as the shortened channel impulse responses
A DFT unit 474a may perform a Q-point DFT on the Q input samples r1(n) in vector r1 and provide Q input symbols R1(k). Similarly, a DFT unit 474b may perform a Q-point DFT on the Q input samples r2(n) in vector r2 and provide Q input symbols R2(k). The input symbols R1(k) and R2(k) may be expressed as:
R1(k)=
R2(k)=
where A(k), B(k),
A symbol detector 476 may receive the input symbols R1(k) and R2(k) and the shortened channel frequency responses
where Â(k) and {circumflex over (B)}(k) are detected symbols, which are estimates of transmitted symbols A(k) and B(k), respectively.
As shown in equations (13) and (14), dual diversity may be achieved, and the detected symbols may be equal to the transmitted symbols scaled by (|
In another design, symbol detector 476 may perform symbol detection based on minimum mean square error (MMSE) as follows:
where
Symbol detection may also be performed in other manners. In any case, an IDFT unit 478a may perform a Q-point IDFT on the Q detected symbols Â(k) and provide Q modulation symbol estimates â(n). Similarly, an IDFT unit 478b may perform a Q-point IDFT on the Q detected symbols {circumflex over (B)}(k) and provide Q modulation symbol estimates {circumflex over (b)}(n). A multiplexer (Mux) 480 may multiplex the modulation symbol estimates â(n) and {circumflex over (b)}(n) and provide modulation symbol estimates {circumflex over (d)}(n), which are estimates of the transmitted modulation symbols d(n).
For simplicity,
The one-symbol STBC scheme described herein may be used for each SC-FDMA symbol in which transmit diversity is desired. The one-symbol STBC scheme may also be used in conjunction with one or more other transmit diversity schemes.
In one design that is not shown in
In one design that is not shown in
The one-symbol STBC scheme described herein may provide certain advantages over other transmit diversity schemes. For example, the one-symbol STBC scheme may be preferred over a space-frequency block code (SFBC) scheme, the two-symbol STBC scheme, etc. The SFBC scheme can maintain a single-carrier waveform on one transmit antenna but not the other transmit antenna. The two-symbol STBC scheme can maintain a single-carrier waveform on each transmit antenna but transmits data on a pair of SC-FDMA symbols, which may not be available when there is an odd number of SC-FDMA symbols, e.g., as shown
In one design, the first symbol vector may further comprise a first cyclic prefix (e.g., cyclic prefix 212a in
In one design, the transmitter may generate a pair of SC-FDMA symbols for the first and second transmit antennas in each symbol period used for data transmission in a slot. Each pair of SC-FDMA symbols may be generated based on a respective pair of first and second modulation symbol sequences. In another design, the transmitter may generate a set of four SC-FDMA symbols for each pair of symbol periods used for data transmission in a slot, e.g., as shown in
The receiver may combine the first and second input symbols based on the first and second channel estimates to obtain first and second detected symbols (block 1020). For example, the receiver may sum (i) a first version of the first input symbols (e.g., R1(k)) multiplied with a first version of the first channel estimate (e.g.,
The receiver may transform the first detected symbols to the time domain to obtain an estimate of the first modulation symbol sequence (e.g., â(n)) (block 1022). The receiver may also transform the second detected symbols to the time domain to obtain an estimate of the second modulation symbol sequence (e.g., {circumflex over (b)}(n)) (block 1024).
The receiver may also obtain at least one additional received SC-FDMA symbol from at least one additional receive antenna. Each additional received SC-FDMA symbol may comprise the first and second SC-FDMA symbols sent by the transmitter. The receiver may process all received SC-FDMA symbols to obtain the estimates of the first and second modulation symbol sequences. For example, the receiver may perform SC-FDMA demodulation on each received SC-FDMA symbol to obtain input samples for that SC-FDMA symbol. The receiver may then perform symbol detection based on the input samples from all received SC-FDMA symbols and channel estimates for the first and second transmit antennas to obtain the estimates of the first and second modulation symbol sequences.
The modules in
Those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the disclosure herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
The various illustrative logical blocks, modules, and circuits described in connection with the disclosure herein may be implemented or performed with a general-purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
The steps of a method or algorithm described in connection with the disclosure herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
In one or more exemplary designs, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored on or transmitted over as one or more instructions or code on a computer-readable medium. Computer-readable media includes both computer storage media and communication media including any medium that facilitates transfer of a computer program from one place to another. A storage media may be any available media that can be accessed by a general purpose or special purpose computer. By way of example, and not limitation, such computer-readable media can comprise RAM, ROM, EEPROM, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that can be used to carry or store desired program code means in the form of instructions or data structures and that can be accessed by a general-purpose or special-purpose computer, or a general-purpose or special-purpose processor. Also, any connection is properly termed a computer-readable medium. For example, if the software is transmitted from a website, server, or other remote source using a coaxial cable, fiber optic cable, twisted pair, digital subscriber line (DSL), or wireless technologies such as infrared, radio, and microwave, then the coaxial cable, fiber optic cable, twisted pair, DSL, or wireless technologies such as infrared, radio, and microwave are included in the definition of medium. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above should also be included within the scope of computer-readable media.
The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples and designs described herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
The present application claims priority to provisional U.S. Application Ser. No. 61/099,375, entitled “TRANSMIT DIVERSITY SCHEME OVER SINGLE SINGLE-CARRIER FREQUENCY DIVISION MULTIPLEXING SYMBOL FOR LONG TERM EVOLUTION ADVANCED UPLINK,” filed Sep. 23, 2008, assigned to the assignee hereof and incorporated herein by reference.
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