Patent Application
20250240041
Certain aspects of the present disclosure generally relate to electronic circuits and, more particularly, to techniques and apparatus for signal transmission.
Wireless communication devices are widely deployed to provide various communication services such as telephony, video, data, messaging, broadcasts, and so on. Such wireless communication devices may transmit and/or receive radio frequency (RF) signals via any of various suitable radio access technologies (RATs) including, but not limited to, 5G New Radio (NR), Long Term Evolution (LTE), Code Division Multiple Access (CDMA), Time Division Multiple Access (TDMA), Wideband CDMA (WCDMA), Global System for Mobility (GSM), Bluetooth, Bluetooth Low Energy (BLE), ZigBee, wireless local area network (WLAN) RATs (e.g., WiFi), and the like.
A wireless communication network may include a number of base stations or access points that can support communication for a number of mobile stations. A mobile station (MS) or access terminal may communicate with a base station (BS) or access point via a downlink and an uplink. The downlink (or forward link) refers to the communication link from the base station or access point to the mobile station or access terminal, and the uplink (or reverse link) refers to the communication link from the mobile station or access terminal to the base station or access point. A base station or access point may transmit data and control information on the downlink to the mobile station or access terminal. The base station or access point may also receive data and control information on the uplink from the mobile station or access terminal. The base station or access point and/or mobile station or access terminal may include multiple transmitters for signal transmissions.
The systems, methods, and devices of the disclosure each have several aspects, no single one of which is solely responsible for its desirable attributes. Without limiting the scope of this disclosure as expressed by the claims which follow, some features will now be discussed briefly. After considering this discussion, and particularly after reading the section entitled “Detailed Description,” one will understand how the features of this disclosure provide advantages that include reduced transmitter area consumption.
Certain aspects of the present disclosure are directed towards an apparatus for wireless communication. The apparatus generally includes: a first transmitter circuit; a second transmitter circuit; a first transistor coupled between a supply node of the first transmitter circuit and a voltage rail; and a second transistor coupled between a supply node of the second transmitter circuit and the voltage rail.
Certain aspects of the present disclosure are directed towards a method for wireless communication. The method generally includes: turning on a first transistor coupled between a supply node of a first transmitter circuit and a voltage rail; turning off a second transistor coupled between a supply node of a second transmitter circuit and the voltage rail; and generating, via the first transmitter circuit, a signal for transmission when the first transistor is turned on and the second transistor is turned off.
Certain aspects of the present disclosure are directed towards a wireless device. The wireless device generally includes: at least one antenna; a first transmitter circuit coupled to the at least one antenna; a second transmitter circuit coupled to the at least one antenna; a first transistor coupled between a supply node of the first transmitter circuit and a voltage rail; and a second transistor coupled between a supply node of the second transmitter circuit and the voltage rail.
Certain aspects of the present disclosure are directed towards an apparatus for wireless communication. The apparatus generally includes: a first transmitter circuit including a first amplifier; a second transmitter circuit including a second amplifier; a first transistor coupled between a supply node of the first transmitter circuit and a voltage rail; a second transistor coupled between a supply node of the second transmitter circuit and the voltage rail; and a filter coupled to a gate of the second transistor.
Certain aspects of the present disclosure are directed towards a wireless device. The wireless device generally includes: a first antenna; a second antenna; a 2 GHz WiFi transmitter circuit coupled to the first antenna; a 5 GHz WiFi transmitter circuit coupled to the second antenna; a first transistor coupled between a supply node of the first transmitter circuit and a voltage rail; and a second transistor coupled between a supply node of the second transmitter circuit and the voltage rail.
To the accomplishment of the foregoing and related ends, the one or more aspects comprise the features hereinafter fully described and particularly pointed out in the claims. The following description and the annexed drawings set forth in detail certain illustrative features of the one or more aspects. These features are indicative, however, of but a few of the various ways in which the principles of various aspects may be employed, and this description is intended to include all such aspects and their equivalents.
So that the manner in which the above-recited features of the present disclosure can be understood in detail, a more particular description, briefly summarized above, may be had by reference to aspects, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only certain typical aspects of this disclosure and are therefore not to be considered limiting of its scope, for the description may admit to other equally effective aspects.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements disclosed in one aspect may be beneficially utilized on other aspects without specific recitation.
Certain aspects of the present disclosure are directed towards circuitry and techniques for suppressing electrical coupling of signal components between transmitters that share a common voltage rail. For example, a first head switch (HSW) may be coupled between the common voltage rail and a first transmitter, and a second HSW may be coupled between the common voltage rail and a second transmitter, reducing the electrical coupling from the first transmitter to the second transmitter while the first transmitter is active when the second HSW is open. In some aspects, a filter may be coupled to a gate of a transistor used to implement the second HSW to attenuate the harmonic signal from the first transmitter. In some cases, one or more switches of an amplifier of the second transmitter may be used to direct the harmonic signal to a reference potential node (e.g., electrical ground), as described in more detail herein.
Various aspects of the disclosure are described more fully hereinafter with reference to the accompanying drawings. This disclosure may, however, be embodied in many different forms and should not be construed as limited to any specific structure or function presented throughout this disclosure. Rather, these aspects are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the disclosure to those skilled in the art. Based on the teachings herein one skilled in the art should appreciate that the scope of the disclosure is intended to cover any aspect of the disclosure disclosed herein, whether implemented independently of or combined with any other aspect of the disclosure. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth herein. In addition, the scope of the disclosure is intended to cover such an apparatus or method which is practiced using other structure, functionality, or structure and functionality in addition to or other than the various aspects of the disclosure set forth herein. It should be understood that any aspect of the disclosure disclosed herein may be embodied by one or more elements of a claim.
The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any aspect described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other aspects.
As used herein, the term “connected with” in the various tenses of the verb “connect” may mean that element A is directly connected to element B or that other elements may be connected between elements A and B (i.e., that element A is indirectly connected with element B). In the case of electrical components, the term “connected with” may also be used herein to mean that a wire, trace, or other electrically conductive material is used to electrically connect elements A and B (and any components electrically connected therebetween).
As illustrated in
A BS 110 may provide communication coverage for a particular geographic area, sometimes referred to as a “cell,” which may be stationary or may move according to the location of a mobile BS. In some examples, the BSs 110 may be interconnected to one another and/or to one or more other BSs or network nodes (not shown) in wireless communications network 100 through various types of backhaul interfaces (e.g., a direct physical connection, a wireless connection, a virtual network, or the like) using any suitable transport network. In the example shown in
The BSs 110 communicate with one or more user equipments (UEs) 120a-y (each also individually referred to herein as “UE 120” or collectively as “Ues 120”) in the wireless communications network 100. A UE may be fixed or mobile and may also be referred to as a user terminal (UT), a mobile station (MS), an access terminal, a station (STA), a client, a wireless device, a mobile device, or some other terminology. A user terminal may be a wireless device, such as a cellular phone, a smartphone, a personal digital assistant (PDA), a handheld device, a wearable device, a wireless modem, a laptop computer, a tablet, a personal computer, etc.
The BSs 110 are considered transmitting entities for the downlink and receiving entities for the uplink. The UEs 120 are considered transmitting entities for the uplink and receiving entities for the downlink. As used herein, a “transmitting entity” is an independently operated apparatus or device capable of transmitting data via a frequency channel, and a “receiving entity” is an independently operated apparatus or device capable of receiving data via a frequency channel. In the following description, the subscript “dn” denotes the downlink, the subscript “up” denotes the uplink. Nup Ues may be selected for simultaneous transmission on the uplink, Ndn Ues may be selected for simultaneous transmission on the downlink. Nup may or may not be equal to Ndn, and Nup and Ndn may be static values or can change for each scheduling interval. Beam-steering or some other spatial processing technique may be used at the BSs 110 and/or Ues 120.
The Ues 120 (e.g., 120x, 120y, etc.) may be dispersed throughout the wireless communications network 100, and each UE 120 may be stationary or mobile. The wireless communications network 100 may also include relay stations (e.g., relay station 110r), also referred to as relays or the like, that receive a transmission of data and/or other information from an upstream station (e.g., a BS 110a or a UE 120r) and send a transmission of the data and/or other information to a downstream station (e.g., a UE 120 or a BS 110), or that relays transmissions between Ues 120, to facilitate communication between devices.
The BSs 110 may communicate with one or more Ues 120 at any given moment on the downlink and uplink. The downlink (i.e., forward link) is the communication link from the BSs 110 to the Ues 120, and the uplink (i.e., reverse link) is the communication link from the Ues 120 to the BSs 110. A UE 120 may also communicate peer-to-peer with another UE 120.
The wireless communications network 100 may use multiple transmit and multiple receive antennas for data transmission on the downlink and uplink. BSs 110 may be equipped with a number Nap of antennas to achieve transmit diversity for downlink transmissions and/or receive diversity for uplink transmissions. A set Nu of Ues 120 may receive downlink transmissions and transmit uplink transmissions. Each UE 120 may transmit user-specific data to and/or receive user-specific data from the BSs 110. In general, each UE 120 may be equipped with one or multiple antennas. The Nu Ues 120 can have the same or different numbers of antennas.
The wireless communications network 100 may be a time division duplex (TDD) system or a frequency division duplex (FDD) system. For a TDD system, the downlink and uplink share the same frequency band. For an FDD system, the downlink and uplink use different frequency bands. The wireless communications network 100 may also utilize a single carrier or multiple carriers for transmission. Each UE 120 may be equipped with a single antenna (e.g., to keep costs down) or multiple antennas (e.g., where the additional cost can be supported).
A network controller 130 (also sometimes referred to as a “system controller”) may be in communication with a set of BSs 110 and provide coordination and control for these BSs 110 (e.g., via a backhaul). In certain cases (e.g., in a 5G NR system), the network controller 130 may include a centralized unit (CU) and/or a distributed unit (DU). In certain aspects, the network controller 130 may be in communication with a core network 132 (e.g., a 5G Core Network (5GC)), which provides various network functions such as Access and Mobility Management, Session Management, User Plane Function, Policy Control Function, Authentication Server Function, Unified Data Management, Application Function, Network Exposure Function, Network Repository Function, Network Slice Selection Function, etc.
In certain aspects of the present disclosure, the BSs 110 and/or the Ues 120 may include multiple transmitters sharing a common voltage rail using respective head switches, as described in more detail herein.
On the downlink, at the BS 110a, a transmit processor 220 may receive data from a data source 212, control information from a controller/processor 240, and/or possibly other data (e.g., from a scheduler 244). The various types of data may be sent on different transport channels. For example, the control information may be designated for the physical broadcast channel (PBCH), physical control format indicator channel (PCFICH), physical hybrid automatic repeat request (HARQ) indicator channel (PHICH), physical downlink control channel (PDCCH), group common PDCCH (GC PDCCH), etc. The data may be designated for the physical downlink shared channel (PDSCH), etc. A medium access control (MAC)-control element (MAC-CE) is a MAC layer communication structure that may be used for control command exchange between wireless nodes. The MAC-CE may be carried in a shared channel such as a PDSCH, a physical uplink shared channel (PUSCH), or a physical sidelink shared channel (PSSCH).
The processor 220 may process (e.g., encode and symbol map) the data and control information to obtain data symbols and control symbols, respectively. The transmit processor 220 may also generate reference symbols, such as for the primary synchronization signal (PSS), secondary synchronization signal (SSS), PBCH demodulation reference signal (DMRS), and channel state information reference signal (CSI-RS).
A transmit (TX) multiple-input, multiple-output (MIMO) processor 230 may perform spatial processing (e.g., precoding) on the data symbols, the control symbols, and/or the reference symbols, if applicable, and may provide output symbol streams to the modulators (MODs) in transceivers 232a-232t. Each modulator in transceivers 232a-232t may process a respective output symbol stream (e.g., for orthogonal frequency division multiplexing (OFDM), etc.) to obtain an output sample stream. Each of the transceivers 232a-232t may further process (e.g., convert to analog, amplify, filter, and upconvert) the output sample stream to obtain a downlink signal. Downlink signals from the transceivers 232a-232t may be transmitted via the antennas 234a-234t, respectively.
At the UE 120a, the antennas 252a-252r may receive the downlink signals from the BS 110a and may provide received signals to the transceivers 254a-254r, respectively. The transceivers 254a-254r may condition (e.g., filter, amplify, downconvert, and digitize) a respective received signal to obtain input samples. Each demodulator (DEMOD) in the transceivers 232a-232t may further process the input samples (e.g., for OFDM, etc.) to obtain received symbols. A MIMO detector 256 may obtain received symbols from the demodulators in transceivers 254a-254r, perform MIMO detection on the received symbols if applicable, and provide detected symbols. A receive processor 258 may process (e.g., demodulate, deinterleave, and decode) the detected symbols, provide decoded data for the UE 120a to a data sink 260, and provide decoded control information to a controller/processor 280.
On the uplink, at UE 120a, a transmit processor 264 may receive and process data (e.g., for the physical uplink shared channel (PUSCH)) from a data source 262 and control information (e.g., for the physical uplink control channel (PUCCH)) from the controller/processor 280. The transmit processor 264 may also generate reference symbols for a reference signal (e.g., the sounding reference signal (SRS)). The symbols from the transmit processor 264 may be precoded by a TX MIMO processor 266 if applicable, further processed by the modulators (MODs) in transceivers 254a-254r (e.g., for single-carrier frequency division multiplexing (SC-FDM), etc.), and transmitted to the BS 110a. At the BS 110a, the uplink signals from the UE 120a may be received by the antennas 234, processed by the demodulators in transceivers 232a-232t, detected by a MIMO detector 236 if applicable, and further processed by a receive processor 238 to obtain decoded data and control information sent by the UE 120a. The receive processor 238 may provide the decoded data to a data sink 239 and the decoded control information to the controller/processor 240.
The memories 242 and 282 may store data and program codes for BS 110a and UE 120a, respectively. The memories 242 and 282 may also interface with the controllers/processors 240 and 280, respectively. A scheduler 244 may schedule Ues for data transmission on the downlink and/or uplink.
In certain aspects of the present disclosure, the transceivers 232 and/or the transceivers 254 may include multiple transmitters sharing a common voltage rail using respective head switches, as described in more detail herein.
NR may utilize orthogonal frequency division multiplexing (OFDM) with a cyclic prefix (CP) on the uplink and downlink. NR may support half-duplex operation using time division duplexing (TDD). OFDM and single-carrier frequency division multiplexing (SC-FDM) partition the system bandwidth into multiple orthogonal subcarriers, which are also commonly referred to as tones, bins, etc. Each subcarrier may be modulated with data. Modulation symbols may be sent in the frequency domain with OFDM and in the time domain with SC-FDM. The spacing between adjacent subcarriers may be fixed, and the total number of subcarriers may be dependent on the system bandwidth. The system bandwidth may also be partitioned into subbands. For example, a subband may cover multiple resource blocks (RBs).
Receiving in-phase (I) and/or quadrature (Q) baseband analog signals from a digital-to-analog converter (DAC) 310, the TX path 302 may include a baseband filter (BBF) 312, a mixer 314, a driver amplifier (DA) 316, and a power amplifier (PA) 318. The BBF 312, the mixer 314, the DA 316, and the PA 318 may be included in a radio frequency integrated circuit (RFIC). For certain aspects, the PA 318 may be external to the RFIC. In some aspects, a common voltage rail may be used for multiple Pas, such as the PA 318, as described in more detail herein.
The BBF 312 filters the baseband signals received from the DAC 310, and the mixer 314 mixes the filtered baseband signals with a transmit local oscillator (LO) signal to convert the baseband signal of interest to a different frequency (e.g., upconvert from baseband to a radio frequency). This frequency-conversion process produces the sum and difference frequencies between the LO frequency and the frequencies of the baseband signal of interest. The sum and difference frequencies are referred to as the “beat frequencies.” The beat frequencies are typically in the RF range, such that the signals output by the mixer 314 are typically RF signals, which may be amplified by the DA 316 and/or by the PA 318 before transmission by the antenna(s) 306. While one mixer 314 is illustrated, several mixers may be used to upconvert the filtered baseband signals to one or more intermediate frequencies and to thereafter upconvert the intermediate frequency (IF) signals to a frequency for transmission.
The RX path 304 may include a low noise amplifier (LNA) 324, a mixer 326, and a baseband filter (BBF) 328. The LNA 324, the mixer 326, and the BBF 328 may be included in one or more RFICs, which may or may not be the same RFIC that includes the TX path components. RF signals received via the antenna(s) 306 may be amplified by the LNA 324, and the mixer 326 mixes the amplified RF signals with a receive local oscillator (LO) signal to convert the RF signal of interest to a different baseband frequency (e.g., downconvert). The baseband signals output by the mixer 326 may be filtered by the BBF 328 before being converted by an analog-to-digital converter (ADC) 330 to digital I and/or Q signals for digital signal processing.
Certain transceivers may employ frequency synthesizers with a variable-frequency oscillator (e.g., a voltage-controlled oscillator (VCO) or a digitally controlled oscillator (DCO)) to generate a stable, tunable LO with a particular tuning range. Thus, the transmit LO may be produced by a TX frequency synthesizer 320, which may be buffered or amplified by amplifier 322 before being mixed with the baseband signals in the mixer 314. Similarly, the receive LO may be produced by an RX frequency synthesizer 332, which may be buffered or amplified by amplifier 334 before being mixed with the RF signals in the mixer 326. For certain aspects, a single frequency synthesizer may be used for both the TX path 302 and the RX path 304. In certain aspects, the TX frequency synthesizer 320 and/or RX frequency synthesizer 332 may include a frequency multiplier, such as a frequency doubler, that is driven by an oscillator (e.g., a VCO) in the frequency synthesizer.
A controller 336 (e.g., controller/processor 280 in
While
As advanced chip fabrication processes are used, chip sizes are becoming smaller, and the number of balls that can be used in a package is reduced. In addition, the number of balls in the chip may be reduced to reduce costs. To this end, the number of balls in radio frequency (RF) transmitters may be reduced by sharing power supply balls (e.g., a voltage rail) between transmitters (e.g., a transmitter configured for transmitting signals around 2.4 GHz and a transmitter configured for transmitting signals around 5 GHz (e.g., two WiFi transmitters). However, in this case, a harmonic signal (e.g., such as a second harmonic signal) generated from a first transmitter (e.g., generated by a power amplifier (PA) of a 2.4 GHz transmitter) may be conductively coupled to a second transmitter output through the shared supply path (e.g., shared voltage rail path). The harmonic signal may include a second harmonic which may have a frequency that is twice the local oscillator (LO) frequency (2flo) plus twice the baseband frequency (2fbb). The electrically coupled second harmonic signal from the first transmitter may be close in frequency to the signal band associated with the second band (e.g., around 5 GHZ). Thus, an off-chip filter with a sharp roll-off may be used to attenuate the harmonic signal from the first transmitter, which increases the off-chip filter overhead and cost. In some cases, the PA may be driven with more power to operate in a more linear region, reducing the second harmonic frequency signal. However, increasing the power consumption of the PA reduces the transmitter efficiency, which is especially disadvantageous in internet-of-things (IoT) applications where lower power consumption is important (e.g., especially given that the PA is the most power-hungry block in the transmitter). Without mitigation of the harmonic signal from the first transmitter, a Federal Communications Commission (FCC) (or other similar regulatory agency) violation (e.g., an emissions violation) may occur at the second harmonic frequency due to the signal electrically coupled to the second transmitter output during the first transmitter operation mode.
In some aspects, the first transmitter described herein may include a 2.4 GHZ WiFi transmitter (e.g., a transmitter operating around 2.4 GHZ) and the second transmitter described herein may be a 5 GHz WiFi transmitter (e.g., a transmitter operating around 5 GHz). While some examples provided herein have been described with respect to WiFi transmitters, it should be appreciated that certain aspects of the present disclosure may be applied to other systems with transmitters sharing a supply path.
For reception, the first transceiver 402 may include a low-noise amplifier (LNA) 324 receiving a signal from the antenna 306 (e.g., through the matching network 406). The output of the LNA 324 may be coupled to inputs of mixers 3261 and 3262 (e.g., corresponding to mixer 326 of
The second transceiver 404 may have a similar architecture to that of the first transceiver 402. As shown, the transceiver 402, 404 may share a common voltage rail 408 (e.g., a common power supply path). For example, the same power supply voltage VDD (e.g., a 1.8 V supply voltage) may be provided to the power supply inputs of the PAs of the transceivers 402, 404. The common supply path may provide a path for the electrical coupling of harmonics between the transmitters. For instance, as described herein, the second harmonic of a signal from the first transmitter may electrically couple to the second transmitter, causing an FCC violation. In some aspects, to address the second harmonic signal electrically coupling between the transmitters, head switches may be added to the supply paths for the respective transmitters as described in more detail herein. In some aspects, the 2G transceiver and the 5G transceiver may share one or more antennas, such as the antenna 306.
As shown, a transistor 520 may be coupled between a second terminal of the secondary winding 510 and a reference potential node 524 (e.g., a 2G balun ground, labeled “2G BLN GND”). The transistor 520 may be controlled to enable the PA 502. The transistor 520 may be driven by a 2G PA enable signal (labeled “2G PA EN”). Similarly, a transistor 522 may be coupled between a second terminal of the secondary winding 512 and a reference potential node 526 (e.g., a 5G balun ground, labeled “5G BLN GND”). The transistor 522 may be controlled to enable the PA 504. The transistor 522 may be driven by a 5G PA enable signal (labeled “5G PA EN”), as shown. In some aspects, the second terminals of the secondary windings 510, 512 may be coupled to respective low-noise amplifiers (LNAs) for respective receivers (not shown).
As shown, a head switch (HSW) transistor 532 may be coupled between a supply node 560 for the first transmitter 590 and the common voltage rail 408, and a HSW transistor 534 may be coupled between a supply node 562 for the second transmitter 592 and the common voltage rail 408. The transistor 532 has a drain coupled to the supply node 560 and a source coupled to the voltage rail 408, and the transistor 534 has a drain coupled to the supply node 562 and a source coupled to the voltage rail 408. The supply nodes 560, 562 may be coupled to respective taps (e.g., center taps) of the primary windings 506, 508. In other words, the tap (e.g., center tap) of the primary winding 506 and the tap (e.g., center tap) of the primary winding 508 may be coupled to the common voltage rail 408 through respective HSW transistors 532, 534 (e.g., labeled “2G HSW” and “5G HSW”) as shown. The HSW transistors 532, 534 provide isolation between the supply node 560 (e.g., tap of the primary winding 506) and the supply node 562 (e.g., the tap of the primary winding 508) so that the electrical coupling of the second harmonic signal between the first and second transmitters is reduced.
As shown, a gate of the transistor 534 may be driven by the 5G PA enable signal (e.g., through inverters 536, 538). When the first transmitter 590 is turned on, the transistor 532 may be turned on to power the first transmitter (e.g., provide power to the supply node 560 of transmitter 590), while the transistor 534 is turned off via the PA enable signal for the second transmitter. Similarly, when the second transmitter 592 is turned on, the transistor 534 may be turned on to power the second transmitter (e.g., provide power to the supply node 562 of transmitter 592), while the transistor 532 is turned off.
In some aspects, a filter 540 may be coupled to the gate of the transistor 534 to further suppress the second harmonic from the first transmitter. The filter 540 may be implemented as a notch filter, in some aspects. The filter 540 may include an inductive element 542 coupled in series with a capacitive element 544, as shown, which may function as a passive notch filter. The inductive element 542 and the capacitive element 544 may be configured so that the filter 540 attenuates signals at the second harmonic frequency of the first transmitter.
The head switch transistors 532, 534 attenuate a signal (e.g., the second harmonic signal) from the PA of the first transmitter to the second transmitter output by increasing isolation of the shared supply path. The filter 540 may be used to further suppress (e.g., attenuate) the second harmonic signal or other harmonic signals. In other words, high frequency signals (e.g., the second harmonic signal) may be electrically coupled from the source of transistor 534 to the gate of the transistor 534 through a source-to-gate parasitic capacitance of transistor 534. Without filter 540, at least a portion of these high frequency signals (e.g., the second harmonic signal) may still reach the second transmitter through a gate-to-drain parasitic capacitance of the transistor 534. Thus, the notch filter may attenuate a signal (e.g., the second harmonic signal) reaching the gate of the transistor 534, as shown. Using the transistors 532, 534 and the notch filter may have little to no impact on the first and second transmitter performance (e.g., efficiency, output power, and linearity).
As shown, the tap of the primary winding 506 may be coupled to a reference potential node 546 (e.g., labeled “2G PA GND”) through a capacitive element 548 (which may implement a 2G second harmonic filter and is labeled “2G 2nd Harm. Cap”), and in some aspects, a decoupling capacitive element 550 (labeled “2G Decap”), as shown. Similarly, the tap of the primary winding 508 may be coupled to a reference potential node 552 (e.g., labeled “5G PA GND”) through a capacitive element 554 (e.g., which may implement a 5G second harmonic filter and is labeled “5G 2nd Harm. Cap”). As shown, a decoupling capacitive element 554 (labeled “5G Decap”) may be coupled between the voltage rail 408 and the reference potential node 552.
The head switch (e.g., transistor 534) on the second transmitter supply path may be turned off to prevent (or at least reduce) current consumption by the second transmitter during the first transmitter operation. Meanwhile, the PA 504 series transistors may be turned on to provide a low impedance path (labeled “low Z” in
While the example transmitters described herein are implemented for 2G and 5G technologies, aspects of the present disclosure may be implemented for sharing a voltage rail between any suitable transmitters. Moreover, while examples provided herein are described with respect to a second harmonic signal to facilitate understanding, the aspects of the present disclosure may be applied to reduce electrical coupling for any signal component (e.g., any signal component from the first transmitter 590).
At block 802, the transmitter circuitry may turn on a first transistor (e.g., HSW transistor 532 of
In some aspects, the signal for transmission may be generated via a first amplifier (e.g., PA 502) of the first transmitter circuit having outputs coupled to a primary winding (e.g., primary winding 506) of a first transformer. The supply node of the first transmitter circuit may be coupled to a tap of the primary winding of the first transmitter circuit. In some aspects, the first transformer may include a secondary winding (e.g., secondary winding 510) coupled to an antenna for the transmission of the signal.
In some aspects, the transmitter circuitry may attenuate, via a filter (e.g., filter 540), a signal at a gate of the second transistor. The filter may include a capacitive element (e.g., capacitive element 544) in series with an inductive element (e.g., inductive element 542). The signal at the gate of the second transistor may include a second harmonic signal from the first transmitter circuit.
In some aspects, the transmitter circuitry may close one or more switches (e.g., turn on transistors 602, 604, 606, 608 shown in
In addition to the various aspects described above, specific combinations of aspects are within the scope of the present disclosure, some of which are detailed below:
Aspect 1: An apparatus for wireless communication, comprising: a first transmitter circuit including a first amplifier; a second transmitter circuit including a second amplifier; a first transistor coupled between a supply node of the first transmitter circuit and a voltage rail; a second transistor coupled between a supply node of the second transmitter circuit and the voltage rail; and a filter coupled to a gate of the second transistor.
Aspect 2: The apparatus of Aspect 1, wherein: outputs of the first amplifier are coupled to a primary winding of a first transformer, the supply node of the first transmitter circuit being coupled to a tap of the primary winding of the first transformer; and outputs of the second amplifier are coupled to a primary winding of a second transformer, the supply node of the second transmitter circuit being coupled to a tap of the primary winding of the second transformer.
Aspect 3: The apparatus of Aspect 2, wherein each of the first transformer and the second transformer comprises a secondary winding coupled to an antenna.
Aspect 4: The apparatus according to any of Aspects 1-3, wherein the filter comprises a notch filter.
Aspect 5: The apparatus according to any of Aspects 1-4, wherein the filter is configured to attenuate a harmonic signal from the first transmitter circuit.
Aspect 6: The apparatus according to any of Aspects 1-5, wherein the second transmitter circuit comprises an amplifier having one or more switches coupled between the supply node of the second transmitter circuit and a reference potential node.
Aspect 7: The apparatus of Aspect 6, wherein the one or more switches are configured to be closed during operation of the first transmitter circuit.
Aspect 8: The apparatus according to any of Aspects 1-7, wherein: the first transistor comprises a drain coupled to the supply node of the first transmitter circuit and a source coupled to the voltage rail; and the second transistor comprises a drain coupled to the supply node of the second transmitter circuit and a source coupled to the voltage rail.
Aspect 9: The apparatus according to any of Aspects 1-8, wherein the first transmitter comprises a 2.4 GHz WiFi transmitter and the second transmitter comprises a 5 GHz WiFi transmitter.
Aspect 10: The apparatus of Aspect 9, wherein the 2 GHz WiFi transmitter and the 5 GHz WiFi transmitter are configured to share a common antenna.
Aspect 11: A method for wireless communication, comprising: turning on a first transistor coupled between a supply node of a first transmitter circuit and a voltage rail; turning off a second transistor coupled between a supply node of a second transmitter circuit and the voltage rail; and generating, via the first transmitter circuit, a signal for transmission when the first transistor is turned on and the second transistor is turned off.
Aspect 12: The method of Aspect 11, wherein the signal for transmission is generated via a first amplifier of the first transmitter circuit having outputs coupled to a primary winding of a transformer, the supply node of the first transmitter circuit being coupled to a tap of the primary winding of the transformer.
Aspect 13: The method of Aspect 12, wherein the transformer comprises a secondary winding coupled to an antenna for the transmission of the signal.
Aspect 14: The method according to any of Aspects 11-13, further comprising attenuating, via a filter, a signal at a gate of the second transistor.
Aspect 15: The method of Aspect 14, wherein the filter comprises a notch filter.
Aspect 16: The method of Aspect 14 or 15, wherein the signal at the gate of the second transistor comprises a harmonic signal from the first transmitter circuit.
Aspect 17: The method according to any of Aspects 11-16, further comprising closing one or more switches of an amplifier of the second transmitter circuit, wherein the one or more switches are coupled between the supply node of the second transmitter circuit and a reference potential node, and wherein the signal is generated for transmission when the one or more switches are closed.
Aspect 18: The method according to any of Aspects 11-17, wherein: the first transistor comprises a drain coupled to the supply node of the first transmitter circuit and a source coupled to the voltage rail; and the second transistor comprises a drain coupled to the supply node of the second transmitter circuit and a source coupled to the voltage rail.
Aspect 19: A wireless device, comprising: a first antenna; a second antenna; a 2 GHz WiFi transmitter circuit coupled to the first antenna; a 5 GHz WiFi transmitter circuit coupled to the second antenna; a first transistor coupled between a supply node of the first transmitter circuit and a voltage rail; and a second transistor coupled between a supply node of the second transmitter circuit and the voltage rail.
Aspect 20: The wireless device of Aspect 19, wherein the first antenna and the second antenna are the same antenna.
The above description provides examples, and is not limiting of the scope, applicability, or examples set forth in the claims. Changes may be made in the function and arrangement of elements discussed without departing from the scope of the disclosure. Various examples may omit, substitute, or add various procedures or components as appropriate. For instance, the methods described may be performed in an order different from that described, and various steps may be added, omitted, or combined. Also, features described with respect to some examples may be combined in some other examples. For example, an apparatus may be implemented or a method may be practiced using any number of the aspects set forth herein. In addition, the scope of the disclosure is intended to cover such an apparatus or method which is practiced using other structure, functionality, or structure and functionality in addition to, or other than, the various aspects of the disclosure set forth herein. It should be understood that any aspect of the disclosure disclosed herein may be embodied by one or more elements of a claim.
The various operations of methods described above may be performed by any suitable means capable of performing the corresponding functions. The means may include various hardware and/or software component(s) and/or module(s), including, but not limited to a circuit, an application-specific integrated circuit (ASIC), or processor. Generally, where there are operations illustrated in figures, those operations may have corresponding counterpart means-plus-function components.
As used herein, a phrase referring to “at least one of” a list of items refers to any combination of those items, including single members. As an example, “at least one of: a, b, or c” is intended to cover: a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination with multiples of the same element (e.g., a-a, a-a-a, a-a-b, a-a-c, a-b-b, a-c-c, b-b, b-b-b, b-b-c, c-c, and c-c-c or any other ordering of a, b, and c).
The methods disclosed herein comprise one or more steps or actions for achieving the described method. The method steps and/or actions may be interchanged with one another without departing from the scope of the claims. In other words, unless a specific order of steps or actions is specified, the order and/or use of specific steps and/or actions may be modified without departing from the scope of the claims.
It is to be understood that the claims are not limited to the precise configuration and components illustrated above. Various modifications, changes, and variations may be made in the arrangement, operation, and details of the methods and apparatus described above without departing from the scope of the claims.
