A variety of devices exist which utilize sonic sensors (e.g., sonic emitters and receivers, or sonic transducers). By way of example, and not of limitation, a device may utilize one or more sonic sensors to track the location of the device in space, to detect the presence of objects in the environment of the device, and/or to avoid objects in the environment of the device. Such sonic sensors include transmitters which transmit sonic signals, receivers which receive sonic signals, and transducers which both transmit sonic signals and receive sonic signals. Piezoelectric Micromachined Ultrasonic Transducers (PMUTs), which may be air-coupled, are one type of sonic transducer, which operates in the ultrasonic range, and can be used for a large variety of sensing applications such as, but not limited to: distance estimation, communication, virtual reality controller tracking, presence detection, and object avoidance for drones or other machines, etc. In some instances, a sonic transmitter or transducer may use a differential drive technique when transmitting.
The accompanying drawings, which are incorporated in and form a part of the Description of Embodiments, illustrate various embodiments of the subject matter and, together with the Description of Embodiments, serve to explain principles of the subject matter discussed below. Unless specifically noted, the drawings referred to in this Brief Description of Drawings should be understood as not being drawn to scale. Herein, like items are labeled with like item numbers.
Reference will now be made in detail to various embodiments of the subject matter, examples of which are illustrated in the accompanying drawings. While various embodiments are discussed herein, it will be understood that they are not intended to limit to these embodiments. On the contrary, the presented embodiments are intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the various embodiments as defined by the appended claims. Furthermore, in this Description of Embodiments, numerous specific details are set forth in order to provide a thorough understanding of embodiments of the present subject matter. However, embodiments may be practiced without these specific details. In other instances, well known methods, procedures, components, and circuits have not been described in detail as not to unnecessarily obscure aspects of the described embodiments.
Ultrasonic transducers (to include air-coupled Piezoelectric Micromachined Ultrasonic Transducers (PMUTs)), ultrasonic transmitters, and ultrasonic receivers can be used for a large variety of sensing applications. Conventionally, however, the application field for such ultrasonic sensing devices is limited by numerous factors to include their size, transmission capabilities, and their power consumption. Any significant reduction in the overall size, the size of a component, the amount of surface area or “real estate” required in silicon or the overall power consumed could open new applications or improve efficiency of existing applications.
The transmitter charge sharing technology described herein utilizes a selectable switch which can electrically couple and decouple differential electrodes of a differential sonic transducer or transmitter. By selectively timing the opening and closing of the switch during the driving of the sonic transducer/transducer, the differential electrodes can be briefly coupled together to share or equalize the charge across them rather than dumping or shunting unneeded charge to ground. As differential electrodes in a differential sonic transducer/transmitter are, by design, equal or nearly equal in size, they have very similar capacitances (typically varying by 10% or less) when viewed as plates of a capacitor. In a case where the sizes of electrodes are not closely matched, power savings using the charge sharing techniques described herein may be diminished. Having very similar capacitances, allows the differential electrodes to become fairly equalized in charge when they are coupled together electrically. In this manner, during differential drive, a differential electrode which is about to be driven low can be partially discharged into the other of the differential electrodes which is about to be driven high. This charge sharing technique provides about half the charge needed to drive a differential electrode to its high state, thus obviating the need to supply this half of the charge from an application specific integrated circuit (ASIC) or other drive circuitry/components coupled with the differential sonic transducer/transmitter.
The transmitter charge sharing technology described herein presents improvements to the transmit function of a sonic transducer or sonic transmitter, and more particularly reduces the power and charge needed to be supplied to a differential sonic transducer/transmitter (by approximately one half) by recycling about half of the charge on the transmitter electrodes of the transducer/transmitter through the described charge sharing. This reduction in power and charge needs reduces the physical size required for power handling and charge supplying components on an ASIC or other integrated circuit, thus reducing the area or “real estate” used by such components on the substrate of the ASIC/integrated circuit versus a conventional (non-charge sharing) approach. The combination of charge-sharing and the reduced size of these power handling and charge producing components permits an ASIC/integrated circuit to be designed which can operate a differential sonic transducer/transmitter at a relatively high voltage differential (e.g., a 40 volt differential), while using zero or minimal off-ASIC components. That is, in some embodiments, off-ASIC transmitters, capacitors, and charge pumps are not required and the size of the ASIC can still be kept very small. This enables a very small package for an overall device which includes an ASIC and a paired ultrasonic transducer. In-turn, this small package size and reduced power requirements for the device permits an increased number of uses in applications which need one or both of smaller size or reduced power consumption; or, put differently, provides nearly double the ultrasonic output for the same power consumption of a device operated without the techniques for charge sharing described herein.
Discussion begins with a description of notation and nomenclature. Discussion then shifts to description of some block diagrams of example components of some example devices which may operate a differential sonic emitter or transducer in the manner described herein. The device may be any type of device which utilizes a differential sonic transducer or differential sonic transmitter. For example, any device which uses conventional differential PMUTs could utilize the transmitter charge sharing techniques described herein. An example depiction of a differential sonic sensing device (in the form of an ASIC coupled with a differential PMUT) is described. Utilization of an example transmitter for transmitting signals with the charge sharing technique is described. Operation of an example ultrasonic sensing device for transmitting signals using the charge sharing technique is then described. Finally, operation of various components of an ultrasonic transducer device, with the charge sharing technique, is described in conjunction with description of a method of operating a differential piezoelectric micromachined ultrasonic transducer comprising a first electrode with a positive voltage to displacement coefficient and a second electrode with a negative voltage to displacement coefficient.
Some portions of the detailed descriptions which follow are presented in terms of procedures, logic blocks, processes, modules and other symbolic representations of operations on data bits within a computer memory. These descriptions and representations are the means used by those skilled in the data processing arts to most effectively convey the substance of their work to others skilled in the art. In the present application, a procedure, logic block, process, module, or the like, is conceived to be one or more self-consistent procedures or instructions leading to a desired result. The procedures are those requiring physical manipulations of physical quantities. Usually, although not necessarily, these quantities take the form of electrical or magnetic signals capable of being stored, transferred, combined, compared, and otherwise manipulated in an electronic device/component.
It should be borne in mind, however, that all of these and similar terms are to be associated with the appropriate physical quantities and are merely convenient labels applied to these quantities. Unless specifically stated otherwise as apparent from the following discussions, it is appreciated that throughout the description of embodiments, discussions utilizing terms such as “electrically coupling,” “electrically decoupling,” “generating,” “processing,” “decoupling,” “coupling,” “switching,” “opening,” “closing,” accomplishing one or more actions during a time period, or the like, may refer to the actions and processes of an electronic device or component such as: a host processor, a sensor processing unit, a sensor processor, a controller or other processor, a memory, some combination thereof, or the like; and/or a component such as a switch or an emitter, receiver, or transducer operating under control of a host processor, a sensor processing unit, a sensor processor, a controller or other processor, or the like. The electronic device/component manipulates and transforms data represented as physical (electronic and/or magnetic) quantities within the registers and memories into other data similarly represented as physical quantities within memories or registers or other such information storage, transmission, processing, or display components.
Embodiments described herein may be discussed in the general context of processor-executable instructions residing on some form of non-transitory processor-readable medium, such as program modules or logic, executed by one or more computers, processors, or other devices. Generally, program modules include routines, programs, objects, components, data structures, etc., that perform particular tasks or implement particular abstract data types. The functionality of the program modules may be combined or distributed as desired in various embodiments.
In the figures, a single block may be described as performing a function or functions; however, in actual practice, the function or functions performed by that block may be performed in a single component or across multiple components, and/or may be performed using hardware, using software, or using a combination of hardware and software. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure. Also, the example electronic device(s) described herein may include components other than those shown, including well-known components.
The techniques described herein may be implemented in hardware, or a combination of hardware with firmware and/or software, unless specifically described as being implemented in a specific manner. Any features described as modules or components may also be implemented together in an integrated logic device or separately as discrete but interoperable logic devices. If implemented in software, the techniques may be realized at least in part by a non-transitory computer/processor-readable storage medium comprising computer/processor-readable instructions that, when executed, cause a processor and/or other components of a computer or electronic device to perform one or more of the methods described herein. The non-transitory processor-readable data storage medium may form part of a computer program product, which may include packaging materials.
The non-transitory processor-readable storage medium (also referred to as a non-transitory computer-readable storage medium) may comprise random access memory (RAM) such as synchronous dynamic random access memory (SDRAM), read only memory (ROM), non-volatile random access memory (NVRAM), electrically erasable programmable read-only memory (EEPROM), FLASH memory, other known storage media, and the like. The techniques additionally, or alternatively, may be realized at least in part by a processor-readable communication medium that carries or communicates code in the form of instructions or data structures and that can be accessed, read, and/or executed by a computer or other processor.
The various illustrative logical blocks, modules, circuits and instructions described in connection with the embodiments disclosed herein may be executed by one or more processors, such as host processor(s) or core(s) thereof, digital signal processors (DSPs), general purpose microprocessors, application specific integrated circuits (ASICs), application specific instruction set processors (ASIPs), field programmable gate arrays (FPGAs), sensor processors, microcontrollers, or other equivalent integrated or discrete logic circuitry. The term “processor” or the term “controller” as used herein may refer to any of the foregoing structures, any other structure suitable for implementation of the techniques described herein, or a combination of such structures. In addition, in some aspects, the functionality described herein may be provided within dedicated software modules or hardware modules configured as described herein. Also, the techniques could be fully implemented in one or more circuits or logic elements. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a plurality of microprocessors, one or more microprocessors in conjunction with an ASIC or DSP, or any other such configuration or suitable combination of processors.
In various example embodiments discussed herein, a chip is defined to include at least one substrate typically formed from a semiconductor material. A single chip may for example be formed from multiple substrates, where the substrates are mechanically bonded to preserve the functionality. Multiple chip (or multi-chip) includes at least two substrates, wherein the two substrates are electrically connected, but do not require mechanical bonding.
A package provides electrical connection between the bond pads on the chip (or for example a multi-chip module) to a metal lead that can be soldered to a printed circuit board (or PCB). A package typically comprises a substrate and a cover. An Integrated Circuit (IC) substrate may refer to a silicon substrate with electrical circuits, typically CMOS (complementary metal-oxide-semiconductor) circuits but others are possible and anticipated. A MEMS substrate provides mechanical support for the MEMS structure(s). The MEMS structural layer is attached to the MEMS substrate. The MEMS substrate is also referred to as handle substrate or handle wafer. In some embodiments, the handle substrate serves as a cap to the MEMS structure.
Some embodiments may, for example, comprise an ultrsonic transducer device. This ultrasonic transducer device may operate in any suitable ultrasonic range. In some embodiments, the ultrasonic transducer device may be or include a differential electrode ultrasonic transducer which may be an air coupled PMUT. In some embodiments, the ultrasonic transducer device may include a digital signal processor (DSP) or other controller or processor which may be disposed as a part of an ASIC which may be integrated into the same package as the differential ultrasonic transducer.
The host processor 110 may, for example, be configured to perform the various computations and operations involved with the general function of device 100. Host processor 110 can be one or more microprocessors, central processing units (CPUs), DSPs, general purpose microprocessors, ASICs, ASIPs, FPGAs or other processors which run software programs or applications, which may be stored in host memory 111, associated with the general and conventional functions and capabilities of device 100.
Communications interface 105 may be any suitable bus or interface, such as a peripheral component interconnect express (PCIe) bus, a universal serial bus (USB), a universal asynchronous receiver/transmitter (UART) serial bus, a suitable advanced microcontroller bus architecture (AMBA) interface, an Inter-Integrated Circuit (I2C) bus, a serial digital input output (SDIO) bus, or other equivalent and may include a plurality of communications interfaces. Communications interface 105 may facilitate communication between SPU 120 and one or more of host processor 110, host memory 111, transceiver 113, ultrasonic transducer device 150, and/or other included components.
Host memory 111 may comprise programs, modules, applications, or other data for use by host processor 110. In some embodiments, host memory 111 may also hold information that that is received from or provided to sensor processing unit 120 (see e.g.,
Transceiver 113, when included, may be one or more of a wired or wireless transceiver which facilitates receipt of data at device 100 from an external transmission source and transmission of data from device 100 to an external recipient. By way of example, and not of limitation, in various embodiments, transceiver 113 comprises one or more of: a cellular transceiver, a wireless local area network transceiver (e.g., a transceiver compliant with one or more Institute of Electrical and Electronics Engineers (IEEE) 802.11 specifications for wireless local area network communication), a wireless personal area network transceiver (e.g., a transceiver compliant with one or more IEEE 802.15 specifications (or the like) for wireless personal area network communication), and a wired a serial transceiver (e.g., a universal serial bus for wired communication).
Ultrasonic transducer device 150 includes a differential ultrasonic transducer similar to or of the type described herein (e.g., uses differential transmitter drive) and is configured to emit and receive ultrasonic signals. In some embodiments, ultrasonic transducer device 150 may include a controller 151 for controlling the operation of the differential ultrasonic transducer and/or other components of ultrasonic transducer device 150. The controller 151 may be any suitable controller, many types of which have been described here. For example, controller 151 may turn amplifiers on or off, turn transmitters on or off, and/or operate selectable switches to electrically couple or decouple certain components during transmitting or during receiving and/or couple a transmitter electrodes to a driver, to ground, etc. Controller 151 may enable different modes of operation (e.g., transmitting, receiving, or continuous operation). Additionally, or alternatively, in some embodiments, one or more aspects of the operation of ultrasonic transducer device 150, or components thereof, may be controlled by an external component such as sensor processor 130 and/or host processor 110; for example, an external device may select times to transmit and/or receive with ultrasonic transducer device 150.
Sensor processor 130 can be one or more microprocessors, CPUs, DSPs, general purpose microprocessors, ASICs, ASIPs, FPGAs or other processors that run software programs, which may be stored in memory such as internal memory 140 (or elsewhere), associated with the functions of SPU 120. In some embodiments, one or more of the functions described as being performed by sensor processor 130 may be shared with or performed in whole or in part by another processor of a device 100, such as host processor 110.
Internal memory 140 can be any suitable type of memory, including but not limited to electronic memory (e.g., read only memory (ROM), random access memory (RAM), or other electronic memory). Internal memory 140 may store algorithms, routines, or other instructions for instructing sensor processor 130 on the processing of data output by one or more of ultrasonic transducer device 150 and/or other sensors. In some embodiments, internal memory 140 may store one or more modules which may be algorithms that execute on sensor processor 130 to perform a specific function. Some examples of modules may include, but are not limited to: statistical processing modules, motion processing modules, object detection modules, and/or decision-making modules.
Ultrasonic transducer device 150, as previously described, includes a differential ultrasonic transducer of or similar to the type described herein and is configured to emit and receive ultrasonic signals. In some embodiments, ultrasonic transducer device 150 may include a controller 151 for controlling the operation of the differential ultrasonic transducer and/or other components of ultrasonic transducer device 150. The controller 151 may be any suitable controller and operates in the manner previously described.
Additionally, or alternatively, in some embodiments, one or more aspects of the operation of electrodes ultrasonic transducer device 150 or components thereof may be controlled by an external component such as sensor processor 130 and/or host processor 110. Ultrasonic transducer device 150 is communicatively coupled, in some embodiments, with sensor processor 130 by a communications interface, bus, or other well-known communication means.
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It should be appreciated that electrical traces are required to be coupled to the electrodes to route various signals and/or provide various couplings (such as to another electrode, to ground, etc.), however in the interest of clarity these traces are not illustrated. Any suitable routing may be used for such these traces.
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In some embodiments, center electrode TE1 is equal or substantially equal (e.g., within manufacturing tolerances of a few percent) in surface area to outer electrode TE2. That is, in some embodiments the plan view surface area of TE1=the surface area of TE2.
In some embodiments the center electrode TE1 and outer electrode TE2 are positioned on the piezoelectric layer 203 based on a curvature of the piezoelectric layer 203 when it is displaced up or down (shown displaced up in
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Although described herein as an ultrasonic transducer, the principles of the differential piezoelectric transducer 200 illustrated in
Drivers T1 and T2 are illustrated as invertors to represent that they are not linear amplifiers, but instead have two states as outputs: a high voltage (e.g., VDD); and a low voltage (VSS). Drivers T1 and T2 also have a high impedance state when their respective series switch (SW1, SW2) is in an open position. In some embodiments, driver T1 and series switch SW1 may be replaced with an inverter which has a tri-state output (high, low, and high impedance); likewise, driver T2 and series switch SW2 may be replaced with an inverter which has a tri-state output (high, low, and high impedance). In some embodiments, VDD may be between 10 and 30 volts, such as 20 volts. In some embodiments, VSS may simply be ground, while in others it may be a specific voltage such as zero volts or some negative voltage.
In some embodiments, a pulse generator (not depicted) may also be coupled with driver T1 and driver T2, to provide a repeating waveform (e.g., square wave 402 and square wave 404) as an input to each. Other suitable waveforms may be similarly used.
In some embodiments, a charge pump (not depicted) may also be coupled with driver T1 and driver T2, to provide charge. This may be a single charge pump for each driver or a shared charge pump. A charge pump, when included, supplies additional charge for drive transmitters (e.g., T1, T2) to level-shift the lower CMOS voltage levels (e.g., 0 to 5 volts) of the square wave which is input to each of the respective drive transmitters (e.g., T1, T2). In some embodiments, for example, a charge pump may be included when aluminum nitride (AlN) is used in the piezoelectric layer 203 as certain configurations of such a differential transducer may require additional supplied charge (voltage), over the voltage natively provided by drivers (T1, T2), to transmit.
The timing marks (t1, t2, t3, t4, and t5) on the input waveforms 402, 404, the drive waveforms 412 and 414, and the effective waveform 416 depict the implementation and effect of charge sharing between transmitter electrodes TE1 and TE2. At times t1, t3, and t5, switches SW1 and SW2 are open, while switch SW3 is closed to electrically couple transmitter electrodes TE1 and TE2 to facilitate sharing and equalize charge between them. At times t2 and t4, switches SW1 and SW2 are closed, while switch SW3 is opened to electrically decouple transmitter electrodes TE1 and TE2; during these times, the transmitter electrodes T1 and T2 are driven or discharged from their equalized states.
The timing of the opening and closing of series switches SW1 and SW2 and the shunt switch SW3 is used to share charge between the TE1 and TE2 transmitter electrodes. To begin, assume that TE1 is charged to VSS and TE2 is charged to VDD just prior to time t1. At time t1, logic of controller 151 operates to open SW1 and SW2 to disconnect transmitter electrodes TE1 and TE2 from output drivers T1 and T2, respectively; while at the same time or shortly thereafter logic of controller 151 then closes shunt switch SW3 to short transmitter electrodes TE1 and TE2 together. Transmitter electrode TE1 forms one plate of a first capacitor, while the other plate is formed by bottom electrode BE; similarly, transmitter electrode TE2 forms one plate of a second capacitor while the other plate is formed by BE. When the first and second capacitors are equal or nearly equal in value (as occurs with a differential drive arrangement), the voltage of the shorted TE1 and TE1 will stabilize to the average of VDD and VSS: ½ (VDD+VSS). The charge exchange between the first and second capacitors is charge that will not have to come from the supply (e.g., it will not have to come from controller 151) during the next phase of the operation. In a case where the first capacitor and the second capacitor are equal, this charge is: C(VDD-½ (VDD+VSS)).
During the next timing phase, beginning at time t2, logic of controller 151 opens the shunt switch SW3 and simultaneously or shortly thereafter closes the series switches SW1 and SW2. This results in transmitter electrode TE1 being driven the rest of the way from its equalized state to VDD by transmitter T1, and transmitter electrode TE2 being driven the rest of the way from its equalized state to VSS by transmitter T2.
At time t3, logic of controller 151 operates to open SW1 and SW2 to disconnect transmitter electrodes TE1 and TE2 from output drivers T1 and T2, respectively; while at the same time or shortly thereafter logic of controller 151 then closes shunt switch SW3 to short transmitter electrodes TE1 and TE2 together. As previously described, transmitter electrode TE1 forms one plate of a first capacitor, while the other plate is formed by bottom electrode BE; similarly, transmitter electrode TE2 forms one plate of a second capacitor while the other plate is formed by BE. When the first and second capacitors are equal or nearly equal in value (as occurs with a differential drive arrangement), the voltage of the shorted TE1 and TE1 will stabilize to the average of VDD and VSS: ½ (VDD+VSS). The charge exchange between the first and second capacitors is charge that will not have to come from the supply (e.g., it will not have to come from controller 151) during the next phase of the operation. In a case where the first capacitor and the second capacitor are equal, this charge is: C(VDD−½ (VDD+VSS)).
During the next timing phase, beginning at time t4, logic of controller 151 opens the shunt switch SW3 and simultaneously or shortly thereafter closes the series switches SW1 and SW2. This results in transmitter electrode TE1 being driven the rest of the way from its equalized state to VSS by driver T1, and transmitter electrode TE2 being driven the rest of the way from its equalized state to VDD by driver T2.
At time t5, the process repeats with the actions at time t5 being the same as the actions as at time t1.
In the Tx mode illustrated in
In a conventional differential drive technique (absent charge sharing), the charge required from the VDD supply is C(VDD-VSS). However, in the charge sharing differential drive technique of
Five time periods (t1, t2, t3, t4, and t5) are described in flow diagram 500. Prior to the first time period, t1, a first electrode (e.g., transmitter electrode TE1) of a differential ultrasonic transducer 200 is charged to VSS and a second electrode (e.g., transmitter electrode TE2) of the differential ultrasonic transducer 200 is charged to VDD.
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Put differently, the equalization of charge during the first time period reduces, during the second time period, an amount of charge required from the first driver and from the second driver to operate the ultrasonic transducer device. That is, the equalization took each of TE1 and TE2 was about halfway to then next state it was going to be driven toward, thus reducing the amount of charged required from the first driver T1 to drive electrode TE1 the rest of the way to its next state and also reducing the amount of charge required from the second driver T2 to drive electrode TE2 the rest of the way to its next state.
As can be seen from the timing diagrams in
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The examples set forth herein were presented in order to best explain, to describe particular applications, and to thereby enable those skilled in the art to make and use embodiments of the described examples. However, those skilled in the art will recognize that the foregoing description and examples have been presented for the purposes of illustration and example only. The description as set forth is not intended to be exhaustive or to limit the embodiments to the precise form disclosed. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.
Reference throughout this document to “one embodiment,” “certain embodiments,” “an embodiment,” “various embodiments,” “some embodiments,” or similar term means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, the appearances of such phrases in various places throughout this specification are not necessarily all referring to the same embodiment. Furthermore, the particular features, structures, or characteristics of any embodiment may be combined in any suitable manner with one or more other features, structures, or characteristics of one or more other embodiments without limitation.
Number | Name | Date | Kind |
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5969621 | Getman | Oct 1999 | A |
7579753 | Fazzio | Aug 2009 | B2 |
Number | Date | Country | |
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20220355339 A1 | Nov 2022 | US |