Patent Application
20080285678
The entire disclosure of Japanese Patent Application No. 2007-123357, filed May 8, 2007 is expressly incorporated by reference herein.
1. Technical Field
An aspect of the present invention relates to an asynchronous data transfer.
More particularly, the invention relates to a communication system for implementing a signaling method that performs a variable-length serial burst data transfer at high speed in communication using two-phase to four-phase handshaking.
2. Related Art
A data transfer between asynchronous systems is performed by means of two-phase to four-phase handshaking.
As such a technique, the technique is known that is disclosed in Design Wave Magazine, July, 2005, pp. 64-91, Case studies on “asynchronous processors”, Complete cure for noise and power consumption problems with digital LSI, by Nobuo Karaki.
However, the two-phase to four-phase handshaking disclosed in the above article has a problem in that handshaking by bit in transferring serial data blocks causes overhead, requiring a long transfer time.
Accordingly, there is another problem in that high-speed serial data transfer cannot be achieved by an asynchronous data transfer method using two-phase to four-phase handshaking.
An advantage of the present invention is to provide a communication system that allows high-speed serial data transfer by an asynchronous data transfer method using two-phase to four-phase handshaking.
A transmitter according to a first aspect of the invention is one for use in a variable-length serial burst data transfer system having the transmitter and a receiver that are connected by at least two data transmission lines and a burst start line.
The transmitter includes a two-line encoder and a burst start signal receiving portion.
During transmitting variable-length serial transmit data made up of binary digits, the transmitter encodes the transmit data into transmit data symbols that are each associated with each piece of transmit data in advance, inserts an identification symbol for identifying the transmit data symbols from one another between the transmit data symbols resulting from encoding to encode the transmit data, and transmits the encoded transmit data via the two data transmission lines to the receiver.
During non-transmit, the transmitter transmits a non-transmit symbol representing a non-transmit state via the two data transmission lines to the receiver.
The burst start signal receiving portion receives a burst start signal, which represents start of burst transmission of the variable-length serial transmit data, via the burst start line from the receiver.
The two-line encoder transmits the identification symbol to the receiver at the start of the burst transmission, and performs the burst transmission of the variable-length serial transmit data in response to the burst request signal receiving portion receiving the burst start signal from the receiver in accordance with the transmitted identification symbol.
According to the first aspect of the invention, effects are obtained such that overhead caused in handshaking in asynchronous communication can be suppressed in asynchronous communication, in which communication is started in response to a request for start of communication from the transmitter; between the transmitter and the receiver, and that the strength against environmental variations is achieved and high-speed communication at low power consumption is enabled because of the asynchronous communication.
A transmitter according to a second aspect of the invention is one for use in a variable-length serial burst data transfer system having the transmitter and a receiver that are connected by at least two data transmission lines and a burst request line.
The transmitter includes a burst request signal receiving portion that receives a burst request signal via the burst request line from the receiver, and a two-line encoder.
The burst request signal is a signal representing a request for burst transmission of variable-length serial transmit data.
Responding to the burst request signal receiving portion receiving the burst start signal, during transmitting variable-length serial transmit data made up of binary digits, the two-line encoder encodes the transmit data into transmit data symbols that are each associated with each piece of transmit data in advance, inserts an identification symbol for identifying the transmit data symbols from one another between the transmit data symbols resulting from encoding to encode the transmit data, and transmits the encoded transmit data via the two data transmission lines to the receiver.
During non-transmit, the two-line encoder transmits a non-transmit symbol representing a non-transmit state via the two data transmission lines to the receiver.
According to the second aspect of the invention, effects are obtained such that overhead caused in handshaking in asynchronous communication can be suppressed in asynchronous communication, in which communication is started in response to a request for start of communication from the transmitter, between the transmitter and the receiver, and that the strength against environmental variations is achieved and high-speed communication at low power consumption is enabled because of the asynchronous communication.
A receiver according to a third aspect of the invention is one for use in a variable-length serial burst data transfer system having a transmitter and the receiver that are connected by at least two data transmission lines and a burst start line.
The receiver includes a storage, a two-line decoder, a data invalid signal generator, a burst start signal generator and a burst start signal transmitting portion.
The storage has received data stored therein and outputs a data empty signal if being free of data stored.
The two-line decoder receives variable-length serial transmit data from the transmitter.
The variable-length serial transmit data is such that, during transmitting the variable-length serial transmit data made up of binary digits, the transmit data is encoded into transmit data symbols that are each associated with each piece of transmit data in advance, an identification symbol for identifying the transmit data symbols from one another is inserted between the transmit data symbols resulting from encoding to encode the transmit data, and the encoded transmit data is transmitted via the two data transmission lines to the receiver, although during non-transmit, a non-transmit symbol representing a non-transmit state is transmitted via the two data transmission lines to the receiver.
The two-line decoder also outputs an identification symbol signal if the identification symbol included in the received variable-length serial transmit data is decoded and outputs a non-transmit symbol signal if the non-transmit symbol included in the received variable-length serial transmit data is decoded, and decodes the transmit data symbols resulting from encoding based on the identification symbol included in the received variable-length serial transmit data and stores the decoded transmit data symbols as the received data in the storage.
The non-transmit symbol signal and the identification symbol signal are input from the two-line decoder to the data invalid signal generator, and the data invalid signal generator generates a data invalid signal from input of the non-transmit symbol signal to input of the identification symbol signal.
The data invalid signal represents that the received data is free from being stored into the storage.
The data invalid signal and the data empty signal are input to the burst start signal generator, and the burst start signal generator generates a burst start signal if both the data invalid signal and the data empty signal are input.
The burst start signal is a signal representing start of the burst transmission of the variable-length serial transmit data.
The burst start signal transmitting portion transmits to the transmitter the burst start signal generated by the burst start signal generator.
A receiver according to a fourth aspect of the invention is one for use in a variable-length serial burst data transfer system having a transmitter and the receiver that are connected by at least two data transmission lines and a burst request line.
The receiver includes a storage, a burst request signal transmitting portion, a two-line decoder, a data invalid signal generator and a burst end signal generator.
The storage has received data stored therein and outputs a data empty signal if being free of data stored.
The burst request signal transmitting portion transmits a burst request signal via the burst request line to the transmitter.
The burst request signal is a signal that represents a request for burst transmission of variable-length serial transmit data.
Responding to the transmitter receiving the burst request signal, the two-line decoder receives variable-length serial transmit data from the transmitter.
The variable-length serial transmit data is such that, during transmitting the variable-length serial transmit data made up of binary digits, the transmit data is encoded into transmit data symbols that are each associated with each piece of transmit data in advance, an identification symbol for identifying the transmit data symbols from one another is inserted between the transmit data symbols resulting from encoding to encode the transmit data, and the encoded transmit data transmitted via the two data transmission lines to the receiver, although during non-transmit, a non-transmit symbol representing a non-transmit state is transmitted via the two data transmission lines to the receiver.
The two-line decoder also outputs an identification symbol signal if the identification symbol included in the received variable-length serial transmit data is decoded and outputs a non-transmit symbol signal if the non-transmit symbol included in the received variable-length serial transmit data is decoded, and decodes the transmit data symbols resulting from encoding based on the identification symbol included in the received variable-length serial transmit data and stores the decoded transmit data symbols as the received data in the storage.
The non-transmit symbol signal and the identification symbol signal are input from the two-line decoder to the data invalid signal generator, and the data invalid signal generator generates a data invalid signal from input of the non-transmit symbol signal to input of the identification symbol signal.
The data invalid signal represents that the received data is free from being stored into the storage.
The data invalid signal and the data empty signal are input to a burst end signal generator, and the burst end signal generator generates and outputs a burst start signal if both the data invalid signal and the data empty signal are input.
The burst end signal represents end of receiving the variable-length serial transmit data.
In the receiver according to the third aspect of the invention, the two-line decoder may output the received data to the storage and transmit, during output of the received data to the storage, a write signal to the storage to cause the received data to be stored into the storage.
The receiver may include a strobe signal generator to which the write signal output by the two-line decoder is input and that outputs the input write signal to the storage.
The strobe signal generator may mask the write signal, responding to the data invalid signal being input from the data invalid signal generator.
According to this aspect of the invention, effects are obtained such that if a hazard occurs in received data to be received by the receiver, the receiver can receive the received data without being affected by the hazard.
In the receiver according to the third aspect of the invention, the two-line decoder outputs the received data, and the transmitter includes a serial-parallel converter that converts the received data output parallel by the two-line decoder by a predetermined number of bits and causes the received data converted parallel to be stored into the storage.
According to this aspect of the invention, effects are obtained such that serial data received by the receiver can be stored as parallel data.
A transmitting method according to a fifth aspect of the invention is one of a transmitter for use in a variable-length serial burst data transfer system having the transmitter and a receiver that are connected by at least two data transmission lines and a burst start line.
The transmitting method includes, during transmitting variable-length serial transmit data made up of binary digits, encoding the transmit data into transmit data symbols, the transmit data symbols each associated with each piece of transmit data in advance, inserting an identification symbol for identifying the transmit data symbols from one another between the transmit data symbols resulting from encoding to encode the transmit data, and transmitting the encoded transmit data via the two data transmission lines to the receiver, and during non-transmit, transmitting a non-transmit symbol representing a non-transmit state via the two data transmission lines to the receiver; receiving a burst start signal via the burst start line from the receiver, the burst start signal representing start of burst transmission of the variable-length serial transmit data; and transmitting the identification symbol to the receiver at the start of the burst transmission, and performing the burst transmission of the variable-length serial transmit data in response to the burst request signal receiving portion receiving the burst start signal from the receiver in accordance with the transmitted identification symbol.
A transmitting method according to a sixth aspect of the invention is one of a transmitter for use in a variable-length serial burst data transfer system having the transmitter and a receiver that are connected by at least two data transmission lines and a burst request line.
The transmitting method includes receiving a burst request signal via the burst request line from the receiver, the burst request signal being a signal that represents a request for burst transmission of variable-length serial transmit data; and in response to the burst request signal receiving portion receiving the burst start signal, during transmitting variable-length serial transmit data made up of binary digits, encoding the transmit data into transmit data symbols, the transmit data symbols each associated with each piece of transmit data in advance, inserting an identification symbol for identifying the transmit data symbols from one another between the transmit data symbols resulting from encoding to encode the transmit data, and transmitting the encoded transmit data via the two data transmission lines to the receiver, and during non-transmit, transmitting a non-transmit symbol representing a non-transmit state via the two data transmission lines to the receiver.
A receiving method according to a seventh aspect of the invention is one of a receiver for use in a variable-length serial burst data transfer system having a transmitter and the receiver that are connected by at least two data transmission lines and a burst start line.
The receiving method includes receiving variable-length serial transmit data from the transmitter, the variable-length serial transmit data being such that, during transmitting the variable-length serial transmit data made up of binary digits, the transmit data is encoded into transmit data symbols that are each associated with each piece of transmit data in advance, an identification symbol for identifying the transmit data symbols from one another is inserted between the transmit data symbols resulting from encoding to encode the transmit data, and the encoded transmit data transmitted via the two data transmission lines to the receiver, although during non-transmit, a non-transmit symbol representing a non-transmit state is transmitted via the two data transmission lines to the receiver, outputting an identification symbol signal if the identification symbol included in the received variable-length serial transmit data is decoded and outputting a non-transmit symbol signal if the non-transmit symbol included in the received variable-length serial transmit data is decoded, and decoding the transmit data symbols resulting from encoding based on the identification symbol included in the received variable-length serial transmit data and storing the decoded transmit data symbols as the received data in a storage; outputting a data empty signal if the storage is free of data stored therein; receiving input of the non-transmit symbol signal and the identification symbol signal, and generating a data invalid signal from input of the non-transmit symbol signal to input of the identification symbol signal, the data invalid signal representing that the received data is free from being stored into the storage; receiving input of the data invalid signal and the data empty signal, and generating a burst start signal if both the data invalid signal and the data empty signal are input; and transmitting the generated burst start signal to the transmitter.
A receiving method according to an eighth aspect of the invention is one of a receiver for use in a variable-length serial burst data transfer system having a transmitter and the receiver that are connected by at least two data transmission lines and a burst request line.
The receiving method includes transmitting a burst request signal via the burst request line to the transmitter, the burst request signal being a signal that represents a request for burst transmission of variable-length serial transmit data; receiving, in response to the transmitter receiving the burst request signal, variable-length serial transmit data from the transmitter, the variable-length serial transmit data being such that, during transmitting the variable-length serial transmit data made up of binary digits, the transmit data is encoded into transmit data symbols that are each associated with each piece of transmit data in advance, an identification symbol for identifying the transmit data symbols from one another is inserted between the transmit data symbols resulting from encoding to encode the transmit data, and the encoded transmit data is transmitted via the two data transmission lines to the receiver, although during non-transmit, a non-transmit symbol representing a non-transmit state is transmitted via the two data transmission lines to the receiver, outputting an identification symbol signal if the identification symbol included in the received variable-length serial transmit data is decoded and outputting a non-transmit symbol signal if the non-transmit symbol included in the received variable-length serial transmit data is decoded, and decoding the transmit data symbols resulting from encoding based on the identification symbol included in the received variable-length serial transmit data and storing the decoded transmit data symbols as the received data in the storage; outputting a data empty signal if the storage being free of data stored therein; receiving input of the non-transmit symbol signal and the identification symbol signal, and generating a data invalid signal from input of the non-transmit symbol signal to input of the identification symbol signal, the data invalid signal representing that the received data is free from being stored into the storage; and receiving input of the data invalid signal the data empty signal, and generating and outputting a burst start signal if both the data invalid signal and the data empty signal are input, the burst end signal representing end of receiving the variable-length serial transmit data.
In the receiving method according to the seventh aspect of the invention, the receiver outputs the received data to the storage and transmits, during output of the received data to the storage, a write signal to the storage to cause the received data to be stored into the storage, and masks the write signal in response to the data invalid signal being input.
In the receiving method according to the seventh aspect of the invention, the receiver converts the received data parallel by a predetermined number of bits and causes the received data converted parallel to be stored into the storage.
A variable-length serial burst data transfer system according to a ninth aspect of the invention includes a transmitter and a receiver that are connected by at least two data transmission lines and a burst start line.
The transmitter includes a two-line encoder and a burst start signal receiving portion.
The two-line encoder, during transmitting variable-length serial transmit data made up of binary digits, encodes the transmit data into transmit data symbols, the transmit data symbols each associated with each piece of transmit data in advance, inserts an identification symbol for identifying the transmit data symbols from one another between the transmit data symbols resulting from encoding to encode the transmit data, and transmits the encoded transmit data via the two data transmission lines to the receiver, and during non-transmit, transmits a non-transmit symbol representing a non-transmit state via the two data transmission lines to the receiver.
The burst start signal receiving portion receives a burst start signal via the burst start line from the receiver, the burst start signal being a signal that represents start of burst transmission of the variable-length serial transmit data.
In this case, the two-line encoder transmits the identification symbol to the receiver at the start of the burst transmission, and performs the burst transmission of the variable-length serial transmit data in response to the burst request signal receiving portion receiving the burst start signal from the receiver in accordance with the transmitted identification symbol.
The receiver includes a storage, a two-line decoder, a data invalid signal generator, a burst start signal generator and a burst start signal transmitting portion.
The storage has received data stored therein and outputs a data empty signal if being free of data stored.
The two-line decoder receives the encoded variable-length serial transmit data from the transmitter, outputs an identification symbol signal if the identification symbol included in the received variable-length serial transmit data is decoded and outputs a non-transmit symbol signal if the non-transmit symbol included in the received variable-length serial transmit data is decoded, and decodes the transmit data symbols resulting from encoding based on the identification symbol included in the received variable-length serial transmit data and stores the decoded transmit data symbols as the received data in the storage.
The non-transmit symbol signal and the identification symbol signal are input from the two-line decoder to the data invalid signal generator, and the data invalid signal generator generates a data invalid signal from input of the non-transmit symbol signal to input of the identification symbol signal, the data invalid signal representing that the received data is free from being stored into the storage.
The data invalid signal and the data empty signal are input to the burst start signal generator, and the burst start signal generator generates a burst start signal if both the data invalid signal and the data empty signal are input.
The burst start signal transmitting portion transmits to the transmitter the burst start signal generated by the burst start signal generator.
A variable-length serial burst data transfer system according to a tenth aspect of the invention includes a transmitter and a receiver that are connected by at least two data transmission lines and a burst request line.
The receiver includes a burst request signal transmitting portion that transmits a burst request signal via the burst request line to the transmitter, the burst request signal being a signal that represents a request for burst transmission of variable-length serial transmit data.
The transmitter includes a burst request signal receiving portion and a two-line encoder.
The burst request signal receiving portion receives the burst request signal via the burst request line from the receiver.
Responding to the burst request signal receiving portion receiving the burst start signal, during transmitting variable-length serial transmit data made up of binary digits, the two-line encoder encodes the transmit data into transmit data symbols, the transmit data symbols each associated with each piece of transmit data in advance, inserts an identification symbol for identifying the transmit data symbols from one another between the transmit data symbols resulting from encoding to encode the transmit data, and transmits the encoded transmit data via the two data transmission lines to the receiver, and during non-transmit, the two-line encoder transmits a non-transmit symbol representing a non-transmit state via the two data transmission lines to the receiver.
The receiver includes a storage, a two-line decoder, a data invalid signal generator and a burst end signal generator.
The storage has received data stored therein and outputs a data empty signal if being free of data stored.
The two-line decoder receives the encoded variable-length serial transmit data from the transmitter, outputs an identification symbol signal if the identification symbol included in the received variable-length serial transmit data is decoded and outputs a non-transmit symbol signal if the non-transmit symbol included in the received variable-length serial transmit data is decoded, and decodes the transmit data symbols resulting from encoding based on the identification symbol included in the received variable-length serial transmit data and stores the decoded transmit data symbols as the received data in the storage.
The non-transmit symbol signal and the identification symbol signal are input from the two-line decoder to the data invalid signal generator, and the data invalid signal generator generates a data invalid signal from input of the non-transmit symbol signal to input of the identification symbol signal, the data invalid signal representing that the received data is free from being stored into the storage.
The data invalid signal and the data empty signal are input to the burst end signal generator, and the burst end signal generator generates and outputs a burst start signal if both the data invalid signal and the data empty signal are input, the burst end signal representing end of receiving the variable-length serial transmit data.
In the variable-length serial burst data transfer system according to the ninth aspect of the invention the data transmission lines may be each a metal line.
In the variable-length serial burst data transfer system according to the ninth aspect of the invention, the data transmission lines may be each an optical fiber; the two-line encoder may include a light emitter that outputs a transmit symbol via the optical fiber, the transmit symbol being a transmit data symbol, an identification symbol or a non-transmit symbol; and the two-line decoder may include a light receiver that receives the transmit symbol via the optical fiber.
According to this aspect of the invention, effects are obtained such that the high-speed serial data transfer system can perform communication under the reduced influence of electromagnetic waves and the like from the outside.
In the variable-length serial burst data transfer system according to this aspect of the invention, the light emitter may modulate an optical output with high frequency in accordance with the transmit symbol; and the light receiver may receive high-frequency light modulated in accordance with the transmit symbol and decodes the data.
A semiconductor device according to a eleventh aspect of the invention has the variable-length serial burst data transfer system according to the ninth aspect of the invention formed on one silicon substrate.
According to this aspect of the invention, effects are obtained such that a circuit in the semiconductor device formed on one silicon substrate can perform communication by the high-speed serial data transfer system.
A hybrid semiconductor device according to a twelfth aspect of the invention has the variable-length serial burst data transfer system according to the ninth aspect of the invention formed on a plurality of different silicon substrates.
According to this aspect of the invention, effects are obtained such that the circuit in one semiconductor device including different silicon substrates can perform communication by the high-speed serial data transfer system.
The invention will be described with reference to the accompanying drawings, wherein like numbers reference like elements.
Embodiments of the invention will be described below with reference to the accompanying drawings.
The high-speed serial data transfer system according to this first embodiment is in a configuration of active send-passive receive.
The term “active send-passive receive” as used herein refers to a communication system in which a transmitter transmits a request for start of communication to a receiver and the receiver starts receiving in response to the request for start of communication from the transmitter.
This high-speed serial data transfer system is composed of a high-speed serial data transmitter 10 and a high-speed serial data receiver 20.
The high-speed serial data transmitter 10 and the high-speed serial data receiver 20 are connected by two data transmission lines d0 and d1.
The high-speed serial data transmitter 10 and the high-speed serial data receiver 20 are connected also by a burst start signal line burststart1.
Hereinafter, the “high-speed serial data transmitter 10” will be referred to as the “transmitter 10”, and the “high-speed serial data receiver 20” as the “receiver 20”, for ease of description.
For example, the data transmission line d0 and the data transmission line d1 are each a metal line.
The burst start signal line burststart1 is also a metal line.
The transmitter 10 transmits and receives transmit data data1, a send control signal send, a burst stop signal burststop and a burst start signal burststart2 via a transmitting bus 30.
The receiver 20 transmits and receives a read signal read, data data3, a read acknowledgement signal ack1 and a burst request signal burstreq via a receiving bus 40.
Connected to the transmitting bus 30 is a transmitting bus master including a central processing unit (CPU) that performs transmission and a transmitting circuit, and the transmitting bus master controls the transmitter 10 to transmit data to the receiver 20.
Connected to the receiving bus 40 is a receiving bus master including a CPU that performs receiving and a receiving circuit, and the receiving bus master controls the receiver 20 to receive transmit data from the transmitter 10.
Encoding on the two data transmission lines d0 and d1, which connect the transmitter 10 with the receiver 20, will next be described.
Transmit data is encoded, e.g., by means of a combination of a high level and a low level and transmitted to the two data transmission lines d0 and d1.
Hereinafter, a “high level” will be represented as “H” or “1”, and a “low level” as “L” or “0”.
Symbols encoded on the two data transmission lines d0 and d1 are determined in advance between a transmitter and a receiver as shown in
Here, a case where the data transmission line d0 is 1 and the data transmission line d1 is 1 is represented as a symbol “Invalid”.
A case where the data transmission line d0 is 0 and the data transmission line d1 is 0 is represented as a symbol “Null”.
A case where the data transmission line d0 is 1 and the data transmission line d1 is 0 is represented as a symbol “0”.
A case where the data transmission line d0 is 0 and the data transmission line d1 is 1 is represented as a symbol “1”.
The symbol “0” and the symbol “1” represent binary transmit data; the symbol “0” corresponds to the transmit data 0, and the symbol “1” corresponds to the transmit data 1.
Hereinafter, a symbol “0” will be represented as a “symbol 0”, and a symbol “1” as a “symbol 1”, and also a symbol 0 or a symbol 1 will be represented as a “transmit data symbol”.
Further, a symbol “Invalid” will be represented as a “symbol I”, and a symbol “Null” as a symbol N.
Hereinafter, encoding described above will be referred to “two-line encoding”.
In the two-line encoding, transmit data that is 0 or 1 is encoded into symbols 0 or symbols 1, which correspond to the transmit data.
Further, a symbol N is added to a position before the symbol 0 or symbol 1 obtained by encoding.
The addition of the symbol N to the position before the obtained symbol 0 or symbol 1 results in that the symbol N is inserted between the symbols 0 or symbols 1.
The symbol N enables a break between the symbols 0 or symbols 1 to be detected.
With reference to
In the figure, parts corresponding to parts in
The transmitter 10 includes an encoder 100 and a burst start signal receiving portion 101.
The encoder 100 starts burst transmission in response to the fact that the burst stop signal burststop at L is input from the transmitting bus 30.
After the start of burst transmission, the send control signal send and the transmit data data1 are input from the transmitting bus 30 to the encoder 100.
The encoder 100 encodes the input transmit data data1 on the basis on the input send control signal send, and the encoded transmit data is transmitted via the two data transmission lines d0 and d1 to the receiver 20.
For example, in this encoding of the encoder 100, if the burst stop signal burststop is at H and the send control signal send is at L, data is encoded as the symbol I.
If the burst stop signal burststop is at L and the send control signal send is at L, the encoder 100 encodes the data as the symbol N.
If the burst stop signal burststop is at L and the send control signal send is at H, the encoder 100 encodes the transmit data data1 as the symbol 0 if the data is data 0, but on the other hand, the encoder 100 encodes the transmit data data1 as the symbol 1 if the data is data 1.
Namely, during periods of transmitting variable-length serial transmit data that is made up of binary digits, the encoder 100 encodes transmit data into transmit data symbols (symbols 0 or symbols 1) that are each associated with each piece of transmit data in advance, inserts identification symbols (symbols N) for identifying transmit data symbols from one another between the transmit data symbols resulting from encoding to encode the transmit data, and then transmits the encoded transmit data via the two data transmission lines to the receiver.
During periods of not transmitting the transmit data, a non-transmit symbol (symbol I) representing such a non-transmit state is transmitted via the two data transmission lines to the receiver.
A burst start signal that is at H on the burst start signal line burststart1 is input from the receiver 20 via the burst start signal line burststart1 to the burst start signal receiving portion 101, and the burst start signal receiving portion 101 outputs the signal as the burst start signal burststart2 to the transmitting bus 30.
With reference to
In the figure, parts corresponding to parts in
The receiver 20 includes a decoder 200, a first-in first-out (FIFO) 201, a data invalid signal generator 202, a strobe signal generator 203, a burst start signal generator 204 and a burst start signal transmitting portion 205.
The decoder 200 decodes two-line encoded transmit data that is input from the transmitter 10 via the data transmission line d0 and the data transmission line d1, and outputs the received data in accordance with the symbol 0 or symbol 1 of the decoded transmit data, as the received data data2, to the FIFO 201.
The decoder 200 changes the level of a data receive signal receive to H in response to the change of the decoded data from the symbol I or symbol N to the symbol 0 or symbol 1, and outputs the signal to the strobe signal generator 203.
The decoder 200 generates this data receive signal receive, e.g., by an EXOR circuit having one input terminal thereof connected to the data transmission line d0 and the other input terminal thereof connected to the data transmission line d1.
The decoder 200 decodes the two-line encoded transmit data that is input from the transmitter 10 via the data transmission line d0 and the data transmission line d1, and changes the level of a symbol I signal inv to H when the decoded transmit data is symbol I, whereas it changes the level to L when the decoded transmit data is not symbol I.
The decoder 200 outputs the symbol I signal inv via a symbol I signal line to the data invalid signal generator 202.
The decoder 200 generates the symbol I signal inv, e.g., by an AND circuit having one input terminal thereof connected to the data transmission line d0 and the other input terminal thereof connected to the data transmission line d1.
The decoder 200 decodes the two-line encoded transmit data that is input from the transmitter 10 via the data transmission line d0 and the data transmission line d1.
The decoder 200 changes the level of a symbol N signal null to H when the decoded transmit data is the symbol N, whereas it changes the level to L when the decoded transmit data is not the symbol N.
The decoder 200 outputs the symbol N signal null via a symbol N signal line to the data invalid signal generator 202.
The decoder 200 generates the symbol N signal null, e.g., by a NOR circuit having one input terminal thereof connected to the data transmission line d0 and the other input terminal thereof connected to the data transmission line d1.
The symbol I signal inv and the symbol N signal null are input from the decoder 200 to the data invalid signal generator 202, and the data invalid signal generator 202 generates data invalid signals datadis at H (true) for a period from a time when the level of the input symbol I signal inv becomes H (true) to a time when the level of the symbol N signal null becomes H (true).
The data invalid signal generator 202 outputs the generated data invalid signal datadis to the strobe signal generator 203 and the burst start signal generator 204.
Input to the strobe signal generator 203 are the data invalid signal datadis from the data invalid signal generator 202 and the data receive signal receive from the decoder 200.
Only when the input data invalid signal datadis is at L (false), the input data receive signal receive is output as a strobe signal strobe to the FIFO 201.
The strobe signal generator 203, by way of example, includes an inverter circuit 231 and an AND circuit 232.
Input to an input terminal of the inverter circuit 231 is a data invalid signal datadis from the data invalid signal generator 202.
The data invalid signal datadis inversed by the inverter circuit 231 is input to one input terminal of the AND circuit 232.
The data receive signal receive is input from the decoder 200 to the other input terminal of the AND circuit 232.
The strobe signal strobe output from an output terminal of the AND circuit 232 is input to the FIFO 201.
The received data data2 is input from the decoder 200 to the FIFO 201, and the FIFO 201 stores the input received data data2 in the inside thereof in response to the fact that the strobe signal strobe is input from the data invalid signal generator 202.
For example, the FIFO 201 stores the received data data2 input from the decoder 200 in the inside thereof in response to the fact that the strobe signal strobe input from the data invalid signal generator 202 is raised from L to H.
The FIFO 201 outputs data stored in the inside thereof as the data data3 to the receiving bus 40 in the order of storing the data in response to the fact that a read signal read is input from the receiving bus 40, and also outputs the read acknowledgement signal ack1 at H when the data data3 is output.
The FIFO 201 monitors data stored in the inside thereof, and outputs a data empty signal empty at H to the burst start signal generator 204 when no data is stored.
The data invalid signal datadis is input from the data invalid signal generator 202 and the data empty signal empty is also input from the FIFO 201 to the burst start signal generator 204.
When the input data invalid signal datadis is at H (true) and the input data empty signal empty is at H (true), the burst start signal generator 204 generates a burst start signal such that a burst start signal burststart0 is at H (true), and outputs the generated burst start signal to the burst start signal transmitting portion 205.
The burst start signal generator 204 also outputs the burst start signal burststart0 as burst request signal burstreq to the receiving bus 40.
The burst start signal transmitting portion 205 transmits the input burst start signal burststart0 via the burst start signal line burststart1 to the transmitter 10.
With reference to
Here, a case where the transmitter 10 performs burst transmission of two pieces of transmit data, data 0 and data 1, will next be described.
Note that hereinafter description on time will be given assuming that time t(i)<time t (i+1), where i is any natural number.
At a time t100 before burst communication, the encoder 100 of the transmitter 10 transmits the symbol I via the two data transmission lines d0 and d1 to the receiver 20.
Next, at a time t101, the burst stop signal burststop at L is input to the encoder 100 of the transmitter 10 from the transmitting bus 30.
At a time t 102, 0 is input as the value of the transmit data data1 from the transmitting bus 30.
In response to the fact that the burst stop signal burststop at L is input from the transmitting bus 30 at the time t101, the encoder 100 of the transmitter 10 transmits the symbol N via the two data transmission lines d0 and d1 to the receiver 20 at and after a time t103
Here, in the symbol I, the level of data on the data transmission line d0 and the level of data on the data transmission line d1 are H, and in the symbol N, the level of data on the data transmission line d0 and the level of data on the data transmission line d1 are L.
Accordingly, if a change is made from the symbol I to the symbol N, the levels of data of the data transmission line d0 and the data transmission line d1 are to be simultaneously changed from H to L.
However, due to a difference in wiring length between circuits, a difference in delay time of an element for performing transmission, and the like, the data transmission line d0 and the data transmission line d1 may differ from each other in time taken for a change from H to L.
Therefore, if a change is made from the symbol I to the symbol N, a hazard may occur.
The description herein will be given assuming that the level of data of the data transmission line d1 changes from H to L at the time t101 and the level of data of the data transmission line d0 changes from H to L at the time t103, so that the transmit data is represented as the symbol 0 in a period from the time t101 to the time t103.
This symbol 0 in the period from the time t101 to the time t103 is a hazard.
In general, the transmit data can be represented as the symbol 0 or the symbol 1 in the period from the time t101 to the time t103, and thus this symbol 0 is indefinite.
At the time t101, the decoder 200 of the receiver 20 that has received the symbol 0 being indefinite changes the level of the symbol I signal inv to L and the level of the data receive signal receive to H in response to receiving the symbol 0, and outputs data 0 as the received data data2.
In addition, at this time t101, although the decoder 200 of the receiver 20 changes the level of the data receive signal receive to H because the data invalid signal datadis that the data invalid signal generator 202 of the receiver 20 outputs is at H, the strobe signal strobe that the strobe signal generator 203 of the receiver 20 outputs is maintained to be at L.
Therefore, data is not written into the FIFO 201 of the receiver 20.
That is, the strobe signal generator 203 of the receiver 20 can mask a signal at H of the data receive signal receive output by the decoder 200 of the receiver 20 in response to received data, which is indefinite, caused by a hazard with the data invalid signal datadis output by the data invalid signal generator 202 of the receiver 20.
Next, at the time t103, in response to receiving the symbol N, the decoder 200 of the receiver 20 changes the level of the symbol N signal null to H and the level of the data receive signals receive to L.
Also, at the time t103, in response to the change of the level of the symbol N signal null to H, the data invalid signal generator 202 of the receiver 20 changes the level of the data invalid signal datadis to L.
At the time t103, in response to the fact that the data invalid signal generator 202 of the receiver 20 outputs the data invalid signal datadis at L, the burst start signal generator 204 of the receiver 20 changes the level of a signal on the burst start signal line burststart1 to L and transmits the burst start signal to the transmitter 10, and changes the level of the burst request signal burstreq to L and outputs the signal to the receiving bus 40.
At the time t103, when receiving the signal at L on the burst start signal line burststart1 from the receiver 20, the burst start signal receiving portion 101 of the transmitter 10 outputs the received signal at L on the burst start signal line burststart1 as the burst start signal burststart2 to the transmitting bus 30.
Then, the receiving bus master connected to the transmitting bus 30 starts burst transmission in response to receiving the burst start signal.
Next, at a time t104, the send control signal send at H is input from a transmitting bus master of the transmitting bus 30 to the encoder 100 of the transmitter 10.
At the time t104, the encoder 100 of the transmitter 10 outputs the symbol 0 to the receiver 20 in response to the input of the send control signal send at H.
At the time t104, the decoder 200 of the receiver 20 receives the symbol 0.
At the time t104, in response to receiving the symbol 0, the decoder 200 of the receiver 20 changes the level of the symbol N signal null to L and the level of the data receive signals receive to H, and outputs data 0 as the received data data2.
Also, at the time t104, since the data invalid signal datadis that the data invalid signal generator 202 of the receiver 20 outputs is at L, the strobe signal generator 203 changes the level of the strobe signal strobe to H in response to the fact that the level of the data receive signals receive is changed to H.
Also, at the time t104, in response to the change of the level of the strobe signal strobe to H, the FIFO 201 stores the data 0 input as the received data data2 and changes the level of the data empty signal empty to L.
Next, at a time t105, when the send control signal send at L is input from the transmitting bus master of the transmitting bus 30 to the encoder 100 of the transmitter 10, the encoder 100 of the transmitter 10 outputs the symbol N to the receiver 20.
Also, at the time t105, the decoder 200 of the receiver 20 receives the symbol N, and changes the level of the symbol N signal null to H, and the level of the data receive signal receive to L, in response to receiving the symbol N.
Next, at a time t106, the transmit data 1 is input from the transmitting bus master of the transmitting bus 30 to the encoder 100 of the transmitter 10 and, at a time t107, the send control signal send at H is input from the transmitting bus master of the transmitting bus 30 to the encoder 100 of the transmitter 10.
The encoder 100 of the transmitter 10 outputs the symbol 1 to the receiver 20 at this time t107 in response to the input of the send control signal send at H.
The decoder 200 of the receiver 20 causes the FIFO 201 to store the data 1 input as the received data data2 at the time t107 in response to receiving the symbol 1 in the same way as operations at the time t104.
In addition, at the time t107, in response to burst transmission of two pieces of transmit data, the burst stop signals burststop at the H level are input from a transmitting bus master of the transmitting bus 30 to the encoder 100 of the transmitter 10.
Next, at a time t108, the send control signal send at L is input from the transmitting bus master of the transmitting bus 30 to the encoder 100 of the transmitter 10.
At the time t108, the send control signal send at L is input, and the encoder 100 of the transmitter 10 outputs the symbol I to the receiver 20 because the input burst stop signal burststop is at H.
At the time t108, the decoder 200 of the receiver 20 receives the symbol I.
At the time t108, the decoder 200 of the receiver 20 changes the level of the symbol I signal inv to H, and the level of the data receive signal receive to L, in response to receiving the symbol I.
Here, in response to the fact that the burst start signal generator 204 of the receiver 20 outputs the burst request signal burstreq to the receiving bus 40 at the time t103, the receiving bus master connected to the receiving bus 40 reads data from the FIFO 201 of the receiver 20 one by one in the order in which the data is written into the FIFO 201 of the receiver 20 at and after the time t103.
The description herein is given assuming that all the data stored in the FIFO 201 of the receiver 20 has read by the receiving bus master at a time t109.
At the time t109, the FIFO 201 of the receiver 20 outputs the data empty signal empty at H.
At the time t109, in response to the fact that the data empty signal empty at H is input from the FIFO 201 of the receiver 20, the burst start signal generator 204 of the receiver 20 transmits a signal at H on the burst start signal line burststart1 to the transmitter 10, and the burst request signal burstreq at H to the receiving bus 40.
Receipt of the signal at H on the burst start signal line burststart1 from the receiver 20 allows the transmitter 10 and the transmitting bus master to detect that the transmit data transmitted by burst transmission is normally received in the receiver 20.
The input of the burst request signal burstreq at H allows the receiving bus master to detect that all the received data from the burst transmission has been read.
Note that regarding the transmitter 10 and the receiver 20 at the time of starting the burst transmission, the encoder 100 transmits the symbol N to the receiver 20 at the start of the burst transmission.
In response to the fact that the burst start signal receiving portion 101 receives the burst start signal burststart1 from the receiver 20 in response to the transmitted symbol N, variable-length serial transmit data is burst transmitted to the receiver 20.
Next, referring to
In the figure, parts corresponding to parts in
In the high-speed serial data transfer system according to the first embodiment, the receiver 20 stores serial data and serially outputs the stored serial data to the receiving bus 40.
As different from the high-speed serial data transfer system according to the first embodiment, a high-speed serial data transfer system according to the second embodiment allows a receiver 21 corresponding to the receiver 20 to store parallel data and to output the stored parallel data in parallel to the receiving bus 40.
In the receiver 21 according to the second embodiment in
The FIFO 201 of the first embodiment successively stores 1-bit data and successively outputs 1-bit data.
On the other hand, the FIFO 221 of the second embodiment successively stores data by a predetermined number of bits and successively outputs data by a predetermined number of bits.
That is, the FIFO 201 stores serial data and outputs serial data.
On the other hand, the FIFO 221 stores parallel data and outputs parallel data.
Note that the data data3 that the FIFO 201 outputs is changed to data data5 that the FIFO 221 outputs.
The data data3 is serial data, and data data5 is parallel data of n bits.
In the receiver 21 according to the second embodiment in
The serial-parallel converter 220 converts the serial data data2 decoded by the decoder 200 by a predetermined number of bits (n bits) to parallel data data4, and outputs the data4 that has been changed to parallel data.
For example, input to the serial-parallel converter 220 are the serial data data2 from the decoder 200 and the strobe signal strobe from the strobe signal generator 203.
In response to the input of the strobe signal strobe, the serial-parallel converter 220 converts the serial data data2 input by a predetermined number of bits to the parallel data data4, and outputs the data4 converted to the parallel data to the FIFO 221.
The serial-parallel converter 220 outputs the strobe signal strobe by a predetermined number of bits to the FIFO 221 in response to the input of the strobe signal strobe.
The parallel data data4 and the strobe signal strobe are input from the serial-parallel converter 220 to the FIFO 221.
In response to the strobe signal strobe, the parallel data data4 is stored inside the FIFO 221.
In response to the input of the read signal read from the receiving bus 40, the FIFO 201 outputs data stored in the inside thereof as the parallel data data5 of a predetermined number of bits in the order of storing the data to the receiving bus 40.
Other components and their operations in the second embodiment are the same as those in the first embodiment, and the description thereof is omitted.
As described above, in the high-speed serial data transfer system according to the second embodiment, as compared to the high-speed serial data transfer system according to the first embodiment, the received data can be stored by the serial-parallel converter 220 and the FIFO 221.
With the high-speed serial data transfer system according to the second embodiment, data stored in parallel can be output by a predetermined number of bits to the receiving bus 40 or the receiving bus master connected thereto.
While the first embodiment is a high-speed serial data transfer system in a case of active send-passive receive, this third embodiment is a high-speed serial data transfer system in a case of passive send-active receive.
In the figure, parts corresponding to parts in
While the transmitter 10 and the receiver 20 of
While the burst start signal burststart2 is transmitted and received between the transmitter 10 and the transmitting bus 30 of
While the burst request signal burstreq is transmitted and received between the receiver 20 and the receiving bus 40 of
Further, a burst request signal burstreq1 is transmitted and received between the receiver 25 and the receiving bus 40 of
In the high-speed serial data transfer system according to the first embodiment of
That is, in the first embodiment, the transmitter 10 starts communication.
On the other hand, in the high-speed serial data transfer system according to the third embodiment of
Then, in response to receiving the burst request signal, which is at H on the burst request signal line burstreq2, the transmitter 15 transmits an acknowledgement signal ack via the data transmission line d0 and the data transmission line d1 to the receiver 25.
Note that the content of this acknowledgement signal ack is that the symbol transmitted via the data transmission line d0 and the data transmission line d1 is one being not the symbol I, namely, the symbol 0 or the symbol 1, or the symbol N.
Accordingly, the transmit data to be burst transmitted is included in the acknowledgement signal ack.
As described above, in the high-speed serial data transfer system according to the third embodiment, the receiver 25 starts communication.
Referring to
In
The burst request signal receiving portion receives the burst request signal, which is at H on the burst request signal line burstreq2, via the burst request signal line burstreq2 from the receiver 25.
The burst request signal receiving portion outputs the received burst request signal as the burst request signal burstreq3 to the transmitting bus 30.
The transmitting bus master connected to the transmitting bus 30 receives the burst request signal burstreq3 via the transmitting bus 30 to start burst transmission.
The burst request signal receiving portion 110 of
Therefore, the description on other operations will be omitted.
Referring to
A burst end signal generator 214 of
Other components and operations of the burst end signal generator 214 of
The burst request signal transmitting portion 210 of
Other components and operations of the burst request signal transmitting portion 210 of
However, there is a difference in that while the burst start signal burststart0 of
Referring to
Only the different operations of the transmitter 15 and the receiver 25 of
First, a first difference is described.
At the time t101, the burst request signal transmitting portion 210 of the receiver 25 changes the level of a burst request signal on the burst request signal line burstreq2 to H and transmits the signal to the transmitter 15.
At the time t101, the transmitter 15 transmits the burst request signal to the transmitting bus master.
Then, in response to receiving the burst request signal, the transmitting bus master changes the burst stop signal burststop to L at the time t101.
Then, a second difference is described.
At the time t103, in response to the change of the level of the burst end signal burstend to L, the receiving bus master changes the burst request signal to L, and at the time t103, the burst request signal transmitting portion 210 of the receiver 25 changes the level of a signal on the burst request signal line burstreq2 to L.
Other components and their operations in the third embodiment are the same as those in the first embodiment, and the description thereof is omitted.
Referring to
In the figure, parts corresponding to parts in
Similarly to the receiver 21 according to the second embodiment of
Similarly in the receiver 26 according to the fourth embodiment of
Accordingly, as different from the high-speed serial data transfer system according to the third embodiment, in the high-speed serial data transfer system according to the fourth embodiment, data can be output in parallel by a predetermined number of bits to the receiving bus 40 or the receiving bus master connected thereto by the serial-parallel converter 220 and the FIFO 221.
This is the same relation as that of the second embodiment to the first embodiment.
Other components and their operations in the fourth embodiment are the same as those in the third embodiment, and the description thereof is omitted.
Note that in the description on the first to fourth embodiments, communication between the transmitter and the receiver is performed using a four-phase handshake.
However, communication may be performed using a two-phase handshake.
In the description on the first to fourth embodiments, only two pieces of transmit data are burst transmitted between a transmitter and a receiver.
However, this is not limitative, and burst transmission of any number of pieces of transmit data is possible.
In the description on the first to fourth embodiments, each of the data transmission line d0 and the data transmission line d1 is a metal line.
However, the data transmission line d0 and the data transmission line d1 may be replace by optical fibers for performing communication.
In this case, the encoder 100 is designed to have a light emitter that outputs a transmit symbol, which is a transmit data symbol, an identification symbol or a non-transmit symbol, via optical fibers, and the decoder 200 is designed to have a light receiver that receives a transmit symbol via optical fibers.
The light emitter also modulates the optical output with high frequency in accordance with the transmit symbol, and the light receiver receives high-frequency light modulated in accordance with the transmit symbol and decodes the data.
In such a way as described above, high-speed serial data transfer systems according to the first to fourth embodiments can perform communication under the reduced effects of electromagnetic waves and the like from the outside when optical fibers are used for communication.
The high-speed serial data transfer systems according to the first to fourth embodiments can be formed on one silicon substrate to constitute a semiconductor device.
This enables a circuit in the semiconductor device formed on one silicon substrate to perform communication by a high-speed serial data transfer system.
The high-speed serial data transfer systems according to the first to fourth embodiments can be formed an a plurality of different silicon substrates to constitute a hybrid semiconductor device.
This enables a circuit in one semiconductor device composed of different silicon substrates to perform communication by a high-speed serial data transfer system.
A transmitter described as the transmitter 10 or 15 and a receiver described as the receiver 20, 21, 25 or 26 may be ones each realized by the dedicated hardware, and may also be realized by means of a memory and a microprocessor.
In addition, this transmitter or receiver may be one realized by the dedicated hardware, and may also include a memory and a CPU.
In the latter case, a program for implementing functions of the transmitter or receiver is loaded onto the memory and executed, thereby implementing the functions.
Hereinabove, the embodiments of this invention have been described in detail with reference to the accompanying drawings.
However, specific configurations are not limited to the embodiments, and designs and the like without departing from the scope of this invention are included.
A high-speed serial data transfer system according to an embodiment of the invention is suited for communication devices connecting various manufacturing devices in a factory.
A high-speed serial data transfer system according to an embodiment of the invention is also suited for communication devices in semiconductor devices that operate at high speed and require low power consumption and that can be bent because they are made of flexible materials such as films.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2007-123357 | May 2007 | JP | national |
