Patent Application
20110051833
1. Technical Field
The present inventions relate to circuits for transceivers and, more particularly, relate to compensation of transmit leakage into a receiver.
2. Description of the Related Art
Duplexers are typically used to couple transmitters and receivers to a shared antenna. When both a transmitter and a receiver operate simultaneously they allow full duplex operation. Typically in full duplex operation the transmitter and receiver operate in frequency bands that are different from one another. In a transceiver, however, even when the transmitter and the receiver operate in different frequency bands, leakage will bleed from the transmitter to the receiver. This occurs both within the duplexer itself and between components of the transmitter and the receiver.
Typically a receive signal is the weakest and the transmit signal is the strongest. The transmitted signal can be 90 dB higher than the received signal. A duplexer can have less than 50 dB suppression of the transmitted signal. The transmitted signal is the largest signal in the receiver. The receiver then has to extract the desired receive signal in the presence of this much larger transmit signal. Transmitter signal leakage into a receiver thus causes reduction in sensitivity of the receiver. Besides reducing transmit leakage into a receiver, it is desired to also improve sensitivity of the receiver.
Prior techniques for mitigating transmit leakage into a receiver used an additional receiver to cancel the transmit signal in the receive path. Two papers describing prior techniques for mitigating transmit leakage into a receiver were: “An integrated LMS Adaptive Filter of TX Leakage for CDMA Receiver Front Ends”, V. Aparin, G. J. Ballantyne and C. J. Persico, IEEE Journal of Solid State Circuits, Vol. 41, No. 5, May 2006 and “Integrated Blocker Filtering RF Front Ends”, A. Safarian, A. Shameli, A. Rofougaran, M. Rofougaran and F. D. Flaviis, IEEE Radio Frequency Integrated Circuits Symposium, 2007.
The present invention is illustrated by way of example and is not limited by the accompanying figures, in which like references indicate similar elements. Elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale.
The details of the preferred embodiments will be more readily understood from the following detailed description when read in conjunction with the accompanying drawings wherein:
Embodiments as described herein reduce transmit leakage into a receiver by adding a transmit signal into the receive path to cancel out the leakage. The transmit signal added into the receive path is a compensating signal derived from the transmit path using an equalizer.
Merely subtracting the transmit value from the receive path is not good enough to cancel because the transmit path adds propagation delay and attenuation. Thus the phase and amplitude of the correction signal is considered for accuracy. The embodiments as described herein create an attenuated version of the transmitted signal with both amplitude and phase control. This can be injected into a receive path. The amplitude and phase of the injected signal can be tuned individually to minimize the amplitude or power of out of band signals of the received signal after it has been mixed down to baseband.
In the transmit path a modulator 110 modulates orthogonal baseband transmit signals 101 to produce modulated transmit signals. Orthogonal signals are ninety degrees out of phase from one another and can be the quadrature I and Q signals as illustrated in
In the receive path the duplexer 130 passes receive signals from the antenna to a demodulator 160, with a receive low noise amplifier 157 and a subtraction circuit 153 coupled therebetween.
The subtraction circuit 153 determines a difference between the receive signal and a compensation signal 183 to produce a compensated receive signal 159 prior to demodulation by the demodulator 160. The subtraction by the subtraction circuit 153 reduces the transmit energy in the receive path. An equalizer 170 both amplitude adjusts and phase adjusts the orthogonal baseband transmit signals 101 based on the difference 159 from the subtraction circuit to produce the compensation signal. An auxiliary modulator 180 between the equalizer and the subtraction circuit modulates the compensation signal 183. The output I′, Q′171 of the equalizer 170 is preferably modulated by the auxiliary modulator 180 before becoming the compensation signal 183 however the output of the equalizer 170 itself can be the compensation signal.
The subtraction circuit 153 has a differential function and can also have a low noise amplifier integral within. Alternately, the subtraction circuit 153 can have no amplification and a low noise amplifier 157 placed between subtraction circuit 153 and the duplexer 130. A further alternate would be to use the low noise amplifier 157 after the subtraction circuit 153 as illustrated in the one exemplary embodiment of
The demodulated receive signal output of the demodulator 160 is low pass filtered by a low pass filter 165 and converted from analog to digital in the analog to digital converter 163 to produce the orthogonal baseband receive signals 103. A subtractor 193 determines a difference between the demodulated signal and the low pass filtered demodulated signal. An auxiliary analog to digital converter provides the input to the digital tuning circuit 198. This provides an image of the compensated signal for determining the variables to the equalizer by the digital tuning circuit 198.
The digital tuning circuit 198 has an input signal representative of the transmit signal energy in the receive path. The digital tuning circuit 198 provides inputs to the equalizer 170, such as amplitude and phase adjustments, in order to minimize the transmit energy in the receive path. More about the digital tuning circuit 198 and the equalizer 170 will be described below by equations 4 or equation 5 and with reference to
Detailed examples of the digital tuning circuit 198 and the equalizer 170 will be discussed with reference to
The embodiments as described herein can permit the sizes of the analog to digital converters to be reduced because there is less risk of saturating the input stage. This innovation reduces the linearity and performance requirements for the receiver lineup and thus saves power and results in higher overall performance.
The equalizer 170 can be constructed with a polarity switch 275, 375 to simplify construction by reducing the degree of attenuation necessary. The polarity switch 275, 375 is used to adjust the polarity of both the I and Q components to select at least one quadrant in which to adjust both the amplitude and the phase of the orthogonal baseband transmit signals 101. Digital tuning circuit 198 provides sign bits for Q, I 276, 376 for controlling the polarity switches 275, 375. The polarity switches 275, 375 set the sign of I′ and Q′ according to the state of sign bits for Q, I 276, 376. One embodiment of polarity switches 275, 375 consists of simply multiplying the I, Q signals by either +1 or −1 according to the state of sign bits for Q, I 276, 376. By applying a polarity switch 275, 375, the desired degree of attenuation can still be achieved with a variable attenuation 277, 370 of smaller attenuation as will be described with reference to Table A.
As can be seen from Table A, less adjustment bits are needed with two quadrant bits. Depending on the application, a polarity switch might even be used as the variable attenuator without additional adjustment bits if the desired reduction can be obtained.
Reducing the transmitter signal leakage by even 10 dB greatly reduces the power consumption of the low noise amplifier 157, demodulator 160 and analog-to-digital converter 163. Besides reducing transmit leakage into a receiver, the present inventions can improve sensitivity of the receiver. The linearity and dynamic range requirements of the receive path all the way up to the ADC are partly determined by the leaked transmit signal. Reducing the transmit signal level in the receiver by 10 dB or 20 dB greatly reduces the performance requirement of this critical receiver circuit. The power consumption, size and cost of the transceiver is reduced as the transmit signal in the receiver is reduced.
I and Q vector components for a given phase angle are illustrated in
I=A cos θ
Q=A sin θ (equation 1)
For the case where the phase changes by an arbitrary amount, φ, the vector components are illustrated in the
The new I′ and Q′ values can be expressed in terms of the original I and Q as follows:
I′=A cos(θ+φ)
I′=A cos θ cos φ−A sin θ sin φ
I′=I cos φ−Q sin φ (equation 2)
Q′=A sin(θ+φ)
Q′=A sin θ cos φ+A cos θ sin φ
Q′=Q cos φ+I sin φ (equation 3)
An amplitude change is made by simply multiplying (scaling) each I and Q component by a constant, k. Therefore, the equalizer 170 receives the original I and Q transmit components and adjusts the amplitude by a factor k and adjusts the phase by a factor φ to produce a resulting I′ and Q′ components according to the following equations:
I′=k·(I cos φ−Q sin φ)
Q′=k·(Q cos φ−I sin φ) (equation 4)
wherein:
Note that this is independent of polar or Cartesian coordinates. For Cartesian coordinates it can be simply expressed as:
I′=L·I
Q′=W·Q (equation 5)
wherein:
The Cartesian implementation of
The signal processing techniques disclosed herein with reference to the accompanying drawings are preferably implemented on one or more digital signal processors (DSPs) or other microprocessors. Nevertheless, such techniques could instead be implemented wholly or partially as hardwired circuits. Further, it is appreciated by those of skill in the art that certain well known digital processing techniques are mathematically equivalent to one another and can be represented in different ways depending on choice of implementation.
Although the invention is described herein with reference to specific embodiments, various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of the present invention. The receiver and the transmitter can have different circuit configurations than the examples illustrated in the drawings. Any benefits, advantages, or solutions to problems that are described herein with regard to specific embodiments are not intended to be construed as a critical, required, or essential feature or element of any or all the claims.
Any letters designations such as (a) or (b) etc. used to label steps of any of the method claims herein are step headers applied for reading convenience and are not to be used in interpreting an order or process sequence of claimed method steps. Any method claims that recite a particular order or process sequence will do so using the words of their text, not the letter designations.
Unless stated otherwise, terms such as “first” and “second” are used to arbitrarily distinguish between the elements such terms describe. Thus, these terms are not necessarily intended to indicate temporal or other prioritization of such elements.
