This application claims the benefit of CN application 201110422823.X, filed on Dec., 15, 2011, and incorporated herein by reference.
Embodiments of the present invention generally relate to electronic circuits, and more particularly, relate to TRIAC dimmer compatible LED drivers and methods thereof.
Currently, it is a major trend to replace existing bulbs with light emitting diodes (LED). However, how to make the LED driver compatible with traditional TRIAC dimmers becomes a challenge. The traditional TRIAC dimmer is designed for pure resistive loads, such as incandescent or halogen lamp. The TRIAC dimmer adjusts the ON time of a TRIAC (triode AC semiconductor switch) to control the power supplied to the load, so as to realize dimming. Since the LED is not a pure resistive load, its dimming performance with TRIAC dimmer is often unsatisfactory.
The charge time of the capacitor C1 can be changed through adjusting the potentiometer POT1, so as to change the conduction phase of the voltage supplied to the load (the AC chopped voltage Vtr). The conduction phase is corresponding to the ON time of the TRIAC TR1 in one cycle. When the potentiometer POT1 is adjusted to its maximum resistance, it is deemed as open. The resistor R1 and R2 are serially connected and the conduction phase of the AC chopped voltage Vtr reaches its minimum value. When the potentiometer POT1 is adjusted to be zero resistance, the resistor R1 is shorted. The conduction phase of the AC chopped voltage Vtr reaches its maximum value.
As shown in
Furthermore, the conduction phase of the AC chopped voltage Vtr can not be adjusted to zero because of the resistor R1. So the brightness of the LED can not reach zero. The dimming range of the LED is narrow, especially under high AC input voltage Vac.
Moreover, the line regulation of the prior LED driver is poor. When the TRIAC dimmer is eliminated, the AC chopped voltage Vtr is equal to the AC input voltage Vac. Since the time when the DC chopped voltage Vbus is increased to reach the threshold voltage Vth varies with the AC input voltage Vac, the duty cycle D of the dimming signal DIM and the brightness of the LED are different under different AC input voltage Vac.
The present invention is directed to a TRIAC dimmer compatible LED driver and method thereof. In one embodiment of the present disclosure, the LED driver comprises a TRIAC dimmer, a rectifier, a switching converter having at least one switch, a feedback circuit and a controller. The TRIAC dimmer receives an AC input voltage and generates an AC chopped voltage having regulated conduction phase based on the AC input voltage. The rectifier rectifies the AC chopped voltage to generate a DC chopped voltage. The switching converter converts the DC chopped voltage into a driving signal to drive the LED. The feedback circuit is coupled to the switching converter to generate a feedback signal indicative of the current flowing through the LED.
The controller comprises a dimming signal generator, a dimming signal processor and a switch control circuit. The dimming signal generator is coupled to the TRIAC dimmer and generates a dimming signal with regulated duty cycle in accordance with the AC chopped voltage. The dimming signal processor is coupled to the dimming signal generator and generates a processed dimming signal in accordance with the dimming signal. The duty cycle of the processed dimming signal is a sum of a predetermined duty cycle and the duty cycle of the dimming signal. The switch control circuit is coupled to the dimming signal processor and the feedback circuit. Based on the processed dimming signal and the feedback signal, the switch control circuit generates a control signal to control the at least one switch in the switching converter.
In one embodiment, the controller further comprises a reference signal generator coupled between the dimming signal processor and the switch control circuit. The reference signal generator generates a reference signal in accordance with the processed dimming signal. The average value of the reference signal is the difference between the product of a first constant and the duty cycle of the processed dimming signal, and a second constant, wherein the first constant is larger than the second constant. The switch control circuit generates the control signal based on the reference signal and the feedback signal.
In one embodiment, the dimming signal processor is not necessary. The reference signal generator may be directly coupled to the dimming signal generator, and generate the reference signal in accordance with the dimming signal. The average value of the reference signal is the difference between the product of a first constant and the duty cycle of the dimming signal, and a second constant.
The present invention can be further understood with reference to the following detailed description and the appended drawings, wherein like elements are provided with like reference numerals.
Reference will now be made in detail to the preferred embodiments of the invention, examples of which are illustrated in the accompanying drawings. While the invention will be described in conjunction with the preferred embodiments, it will be understood that they are not intended to limit the invention to these embodiments. On the contrary, the invention is intended to cover alternatives, modifications and equivalents, which may be included within the spirit and scope of the invention as defined by the appended claims. Furthermore, in the following detailed description of the present invention, numerous specific details are set forth in order to provide a thorough understanding of the present invention. However, it will be obvious to one of ordinary skill in the art that the present invention may be practiced without these specific details. In other instances, well-known methods, procedures, components, and circuits have not been described in detail so as not to unnecessarily obscure aspects of the present invention.
The feedback circuit 408 is coupled to the switching converter 403 to generate a feedback signal FB indicative of the current flowing through the LED. In one embodiment, the feedback circuit 408 comprises a sensing resistor serially coupled to the LED.
The dimming signal generator 404 is coupled to the TRIAC dimmer 401, and generates a dimming signal DIM in accordance with the AC chopped voltage Vtr. The duty cycle of the dimming signal DIM is regulated by the conduction phase of the AC chopped voltage Vtr. In one embodiment, the dimming signal generator 404 comprises a comparing circuit. The comparing circuit receives a voltage sensing signal indicative of the DC chopping voltage Vtr, and compares it with a first threshold voltage to generate the dimming signal DIM. In another embodiment, the dimming signal generator 404 rectifies the AC chopped voltage Vtr, and compares the rectified voltage with a threshold voltage to generate the dimming signal DIM. In still another embodiment, the dimming signal generator 404 compares the AC chopped voltage Vtr with two threshold voltage to generate the dimming signal DIM. The sign of the two threshold voltage are opposite (one positive and one negative) while their absolute value are the same.
The dimming signal processor 405 is coupled to the dimming signal generator 404, and generates a processed dimming signal PRO in accordance with the dimming signal DIM. The duty cycle of the processed dimming signal PRO is a sum of a predetermined duty cycle D1 and the duty cycle D of the dimming signal DIM. The switch control circuit 407 is coupled to the dimming signal processor 405, and generates a control signal CTRL based on the processed dimming signal PRO and the feedback signal FB to control the at least one switch in the switching converter 403.
Generally, the predetermined duty cycle D1 is chosen to be a little bit larger than 1−Dmax, wherein Dmax is the rated maximum duty cycle of the dimming signal DIM. In one embodiment, Dmax is 80% and D1 is 25%. Since the duty cycle of the processed dimming signal PRO is a sum of the predetermined duty cycle D1 and the duty cycle D of the dimming signal DIM, whenever D is larger than or equal to 1−D1, the duty cycle of the processed dimming signal PRO is 1. So the maximum brightness of the LED under different conditions is uniform.
In one embodiment, the controller further comprises a reference signal generator 406. The reference signal generator 406 is coupled between the dimming signal processor 405 and the switch control circuit 407, and generates a reference signal REF in accordance with the processed dimming signal PRO. The average value of the reference signal REF is the difference between the product of a first constant K1 and the duty cycle of the processed dimming signal PRO, and a second constant K2, wherein K1 and K2 are both positive, and K1 is larger than K2. That means the average value of the reference signal REF is K1*(D+D1)−K2. The switch control circuit 407 generates the control signal CTRL based on the reference signal REF and the feedback signal FB. Generally, the constant K1 and K2 are chosen to let K2/K1 be a little bit larger than D1+Dmin, wherein Dmin is the rated minimum duty cycle of the dimming signal DIM.
In one embodiment, the reference signal REF is an AC pulse signal of which the duty cycle is equal to that of the dimming signal DIM. The high level of the reference signal REF is positive, and the low level of the reference signal REF is negative. In another embodiment, the reference signal REF is a DC pulse signal of which the duty cycle is K1*(D+D1)−K2. In one embodiment, the duty cycle D of the dimming signal DIM is converted into a digital signal. The dimming signal processor 405 and the reference signal generator 406 are both realized by a digital signal processor through executing some programs.
In one embodiment, the switch control circuit 407 converts the reference signal REF into a DC signal through a filter, and compares the DC signal with a triangular wave signal to generate a signal for PWM dimming. In another embodiment, the switch control circuit 407 compares the reference signal REF with the feedback signal FB to generate a compensation signal, and generates the control signal CTRL based on the compensation signal. The switch control circuit 407 may use any known control method, such as quasi-resonant control, fixed frequency peak current control, constant on time control, off time control and so on. The switch control circuit 407 may also comprise the function of power factor correction.
Although the maximum conduction phase of the AC chopped voltage Vtr is different under different AC input voltage Vac or different TRIAC dimmers, the duty cycle of their corresponding processed dimming signal PRO are all equal to 1. So the maximum brightness of the LED is uniform under different conditions. For the same reason, although the minimum conduction phase of the AC chopped voltage Vtr are different under different conditions, the duty cycle of their corresponding processed dimming signal PRO are all equal to 0. So the minimum brightness of the LED is uniform under different conditions. Since the minimum brightness of the LED is zero, the dimming range of the LED is extended.
Furthermore, the line regulation of the LED driver shown in
The dimming signal generator 604 comprises a comparator COM1. The non-inverting input terminal of the comparator COM1 is coupled to the voltage sensing circuit 609 to receive the voltage sensing signal Vsense1, the inverting input terminal of the comparator COM1 receives a threshold voltage Vth1. The comparator COM1 provides the dimming signal DIM at its output terminal. The switch control circuit 607 comprises an error amplifier EA and a logic circuit 610. The error amplifier EA is coupled to the reference signal generator 606 and the feedback circuit 608, and generates a compensation signal COMP based on the reference signal REF and the feedback signal FB. The error amplifier EA may be an operational amplifier or a transconductance amplifier. The logic circuit 610 is coupled to the output terminal of the error amplifier EA, and generates the control signal CTRL based on the compensation signal COMP. In one embodiment, there is a filter coupled between the reference signal generator 606 and the error amplifier EA.
In one embodiment, the dimming signal processor 705 further comprises a delay circuit 712, a sample and hold circuit 713 and a voltage divider 714. The sample and hold circuit 713 has a first input terminal, a second input terminal and an output terminal. The first input terminal is coupled to the output terminal of the one shot circuit 711, the second input terminal is coupled to the first terminal of the capacitor C2. Based on the output signal of the one shot circuit 711 and the voltage Vc across the capacitor C2, the sample and hold circuit 713 provides a sample and hold signal PEAK indicative of the peak voltage across the capacitor C2 at its output terminal. The delay circuit 712 is coupled between the output terminal of the one shot circuit 711 and the gate of the switch S2, so as to ensure the peak voltage across the capacitor C2 can be sensed well and truly. The input terminal of the voltage divider 714 is coupled to the sample and hold circuit 713 to receive the sample and hold signal PEAK. The output terminal of the voltage divider 714 is coupled to the inverting input terminal of the comparator COM2 to provide the threshold voltage Vth2.
In one embodiment, the voltage divider 714 is a resistor divider comprising two serially connected resistors, R3 and R4. The predetermined duty cycle D1 can be adjusted through changing the ratio of the voltage divider 714. In one embodiment, the resistance of the resistor R3 is three times of that of the resistor R4, so the threshold voltage Vth2 is equal to PEAK/4 and the predetermined duty cycle D1 is 25%.
The reference signal generator 906 comprises switches S3, S4 and a NOT gate NOT2. The switch S3 has a first terminal, a second terminal and a gate. The first terminal of the switch S3 receives a positive voltage VH (VH>0), the gate is coupled to the dimming signal processor 905 to receive the processed dimming signal PRO. The input terminal of the NOT gate NOT2 is coupled to the dimming signal processor 905 to receive the processed dimming signal PRO. The switch S4 has a first terminal, a second terminal and a gate. The first terminal of the switch S4 and the second terminal of the switch S3 are coupled together to provide the reference signal REF. The second terminal of the switch S4 receives a negative voltage VL (VL>0), the gate of the switch S4 is coupled to the output terminal of the NOT gate NOT2.
The reference signal REF is an AC pulse signal. Its duty cycle is equal to that of the processed dimming signal PRO, D+D1. The high level of the reference signal REF is equal to the positive voltage VH, and the low level of the reference signal REF is equal to the negative voltage VL. The average value of the reference signal REF is VH*(D+D1)+VL*(1−D−D1). That means K1=VH−VL, and K2=−VL.
The current sensing circuit 917 senses the current flowing through the switch S1 and generates a current sensing signal Isense. In one embodiment, the current sensing circuit 917 comprises a sensing resistor coupled between the source of the switch S1 and the ground.
The switch voltage sensing circuit 918 senses the voltage across the switch S1 and generates a switch voltage sensing signal Vsense2. In one embodiment, the switch voltage sensing circuit 918 comprises a resistor divider coupled to the auxiliary winding of the transformer T1.
The switch control circuit 907 comprises an error amplifier EA and a logic circuit 910. The error amplifier EA is an operational amplifier. The non-inverting input terminal of the error amplifier EA is coupled to the reference signal generator 906 to receive the reference signal REF, the inverting input terminal is coupled to the feedback circuit to receive the feedback signal FB. Based on the reference signal REF and the feedback signal FB, the error amplifier EA provides a compensation signal COMP at its output terminal.
The logic circuit 910 comprises a multiplier 915, a flip flop FF2 and comparators COM3, COM4. The multiplier 915 is coupled to the error amplifier EA and the voltage sensing circuit 909, multiplies the compensation signal COMP and the voltage sensing signal Vsense1 to generate a product signal MULO. The comparator COM3 is coupled to the multiplier 915 and the current sensing circuit 917, compares the product signal MULO with the current sensing signal Isense. The comparator COM4 is coupled to the switch voltage sensing circuit 918, and compares the switch voltage sensing signal Vsense2 with a threshold voltage Vth3. The flip flop FF2 has a set terminal, a reset terminal and an output terminal. The reset terminal of the flip flop FF2 is coupled to the output terminal of the comparator COM3, the set terminal is coupled to the output terminal of the comparator COM4, the output terminal is coupled to the gate of the switch S1.
When the switch S1 is ON, energy is stored in the transformer T1. The current flowing through the switch S1 and the current sensing signal Isense are increased. When the current sensing signal Isense is increased to be larger than or equal to the product signal MULO, the comparator COM3 generates a high level to reset the flip flop FF2. The switch S1 is turned off.
When the switch S1 is OFF, the energy stored in the transformer T1 is transferred to the load, LED. After all the stored energy being transferred to the load, the magnetization inductance of the transformer T1 and the parasitic capacitance of the switch S1 become resonant. When the voltage across the switch S1 reaches its valley to let the switch voltage sensing signal Vsense2 be smaller than or equal to the threshold voltage Vth3, the comparator COM4 generates a high level to set the flip flop FF2. The switch S1 is turned on.
In one embodiment, the feedback circuit comprises an output current calculator 916. The output current calculator 916 is coupled to the current sensing circuit 917 and the logic circuit 910, receives the current sensing signal Isense and the control signal CTRL and generates an output current estimate signal indicative of the current flowing through the LED. The output current estimate signal is provided to the error amplifier EA as the feedback signal FB.
In
Furthermore, when the duty cycle D of the dimming signal DIM is smaller than or equal to −VL/(VH−VL)−D1, the average value of the reference signal REF is zero and the LED is off.
The error amplifier EA is a transconductance amplifier. It regulates the average value I3+I2*(1−D−D1) of the current flowing from its inverting input terminal to be equal to the current I4 flowing into its non-inverting input terminal. That means the current value I3 corresponding to the feedback signal FB is regulated to I4−I2*(1−D−D1). Comparing with the formula K1*(D+D1)−K2, we can get K1=I2, K2=I2−I4. In one embodiment, I2 is 31 uA and I4 is 25 uA.
In the embodiments mentioned above, the dimming signal processor is not necessary. The reference signal generator may be directly coupled to the dimming signal generator to receive the dimming signal DIM, and generate the reference signal REF in accordance with the dimming signal DIM. The average value of the reference signal REF is K1*D−K2. The switch control circuit generates the control signal CTRL based on the reference signal REF and the feedback signal FB.
At Step S1201, an AC chopped voltage with regulated conduction phase is received from a TRIAC dimmer.
At Step S1202, the AC chopped voltage is rectified to generate a DC chopped voltage.
At Step S1203, the DC chopped voltage is converted into a driving signal to drive LED through a switching converter having at least one switch.
At Step S1204, a dimming signal with regulated duty cycle is generated in accordance with the AC chopped voltage. In one embodiment, this step comprises: sensing the DC chopping voltage to generate a voltage sensing signal; and comparing the voltage sensing signal with a first threshold voltage to generate the dimming signal.
At Step S1205, a processed dimming signal is generated in accordance with the dimming signal, wherein the duty cycle of the processed dimming signal is a sum of a predetermined duty cycle and the duty cycle of the dimming signal.
At Step S1206, a feedback signal indicative of the current flowing through the LED is generated.
At Step S1207, a control signal is generated based on the processed dimming signal and the feedback signal to control the at least one switch in the switching converter.
In one embodiment, the step of generating the control signal comprises: generating a reference signal in accordance with the processed dimming signal, wherein the average value of the reference signal is the difference between the product of a first constant and the duty cycle of the processed dimming signal, and a second constant, and wherein the first constant is larger than the second constant; and generating the control signal based on the reference signal and the feedback signal. In one embodiment, the reference signal is an AC pulse signal, and the duty cycle of the reference signal is equal to that of the processed dimming signal.
In one embodiment, the generation of the processed dimming signal is not necessary. The reference signal may be generated directly in accordance with the dimming signal. The average value of the reference signal is the difference between the product of a first constant and the duty cycle of the dimming signal, and a second constant.
Obviously many modifications and variations of the present invention are possible in light of the above teachings. It is therefore to be understood that within the scope of the appended claims the invention may be practiced otherwise than as specifically described. It should be understood, of course, the foregoing disclosure relates only to a preferred embodiment (or embodiments) of the invention and that numerous modifications may be made therein without departing from the spirit and the scope of the invention as set forth in the appended claims. Various modifications are contemplated and they obviously will be resorted to by those skilled in the art without departing from the spirit and the scope of the invention as hereinafter defined by the appended claims as only a preferred embodiment(s) thereof has been disclosed.
Number | Date | Country | Kind |
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201110422823.X | Dec 2011 | CN | national |