The present application relates generally to communications, and more specifically, to a tunable dual-antenna system.
Wireless communication devices, such as mobile phones, may have a single antenna for transmitting and receiving signals. A desire to support multiple frequency bands and multiple wireless communication standards may require increasing the size of the existing antenna or installing additional antennas. These options create problems for newer wireless devices with small form factor.
Some wireless communication devices, such as “world phones,” are intended to operate with multiple frequency bands (“multi-band”) and multiple communication standards (“multi-mode”), which may need a multi-band antenna and/or multiple antennas to function properly. A law of physics dictates a multi-band antenna to be electrically bigger than a single-band antenna to function over the required frequency bands. A “multi-band” device can use one transmit/receive antenna for each frequency band and thus have multiple transmit/receive antennas (
Similarly, a “multi-mode” device can use one transmit/receive antenna for each communication standard and thus have multiple transmit/receive antennas (
As an example, an ideal transmit frequency band may be 824-849 Megahertz (MHz), and an ideal receive frequency band may be 869-894 MHz in one configuration. As shown in
The antennas 202, 203 may be sufficiently small and sized to fit inside a particular communication device. The transmit and receive circuitries 206, 208 are shown as separate units, but may share one or more elements, such as a processor, memory, a pseudo-random noise (PN) sequence generators, etc. The device 220 may not require a duplexer 104 as in
The separate transmit and receive tunable antennas 202, 203 have frequency tuning/adapting elements, which may be controlled by frequency controller 210 to enable communication in multiple frequency bands (multi-band) (also called frequency ranges or set of channels) and/or according to multiple wireless standards (multiple modes). The antenna system 200 is configured to adaptively optimize its performance for a specific operating frequency. This may be useful for a user that wishes to use the device 200 in various countries or areas with different frequency bands and/or different wireless standards.
For example, the antennas 202, 203 may be tuned to operate in any frequency band of multi-band wireless applications, such as Code Division Multiple Access (CDMA) 450 MHz, CDMA 800 MHz, Extended Global System for Mobile communications (EGSM) 900 MHz, Global Positioning System (GPS) 1575 MHz, CDMA1800 MHz, CDMA1900 MHz, Digital Cellular System (DCS) 1700 MHz, Universal Mobile Telecommunications System (UMTS) 1900 MHz, etc. The antennas 202, 203 may be used for CDMA 1×EV-DO communication, which may use one or more 1.25-MHz carriers. The system 200 may use multiple wireless standards (multiple modes), such as CDMA, GSM, Wideband CDMA (WCDMA), Time-Division Synchronous CDMA (TD-SCDMA), Orthogonal Frequency Division Multiplexing (OFDM), WiMAX, etc.
The tuning elements of antennas 202, 203 may be separate elements or integrated as a single element. The tuning elements may be controlled by separate control units in the transmit and receive circuitries 206, 208 or be controlled by a single control unit, such as frequency controller 210.
The tuning elements may be used to change the operating frequency of the TX and RX antennas 202, 203. The tuning elements may be voltage-variable micro-electro mechanical systems (MEMS), voltage-variable Ferro-Electric capacitors, varactors, varactor diodes or other frequency adjusting elements. For example, a different voltage or current applied to a tuning element may change a capacitance of the tuning element, which changes a transmit or receive frequency of the antenna 202 or 203.
The dual antenna system 200 may have one or more benefits. The dual antenna system 200 may be highly-isolated (low coupling, low leakage). A pair of orthogonal antennas as shown in
By using separate and small TX and RX antennas 202, 203 with narrow instantaneous bandwidth to provide high isolation between the antennas 202, 203, the system 200 may allow certain duplexers, multiplexers, switches and isolators to be omitted from radio frequency (RF) circuits in multi-band and/or multi-mode devices, which saves costs and reduces circuit board area.
Smaller antennas provide more flexibility in selecting antenna mounting locations in the device 220.
The system 200 may enhance harmonic rejection to provide better signal quality, i.e., better voice quality or higher data rate.
The system 200 may enable integration of antennas with transmitter and/or receiver circuits to reduce wireless device size and cost. The frequency-tunable transmit and receive antennas 202, 203 of system 200 may enable size and cost reduction of host multi-mode and/or multi-band wireless devices by reducing the size and/or number of antennas.
The system 200 may be used to implement a diversity feature, e.g., polarization diversity (
The antennas 202, 203 of
In block 902, the device 220 determines whether there has been a change in frequency range and/or mode. If not, the antenna system 200 may continue in block 900. If there was a change, then the system 200 transitions to block 904. The device 220 may determine whether a frequency range and/or second wireless communication mode provides better communication (pilot or data signal reception, signal-to-noise ratio (SNR), frame error rate (FER), bit error rate (BER), etc.) than the first frequency range and/or wireless communication mode.
In block 904, the system 200 tunes the antennas 202, 203 with elements 210, 212 according to a second frequency range associated with the first wireless communication mode or a second wireless communication mode. The second frequency range may be a set of channels, e.g., channels defined by different codes and/or frequencies.
In block 906, the system 200 transmits signals with the first antenna 202 and receives signals with the second antenna 203 using the second frequency range.
Those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a general purpose processor, a Digital Signal Processor (DSP), an Application Specific Integrated Circuit (ASIC), a Field Programmable Gate Array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in Random Access Memory (RAM), flash memory, Read Only Memory (ROM), Electrically Programmable ROM (EPROM), Electrically Erasable Programmable ROM (EEPROM), registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
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