Tunable integrated RF filter having switched field effect capacitors

Information

  • Patent Application
  • 20020097084
  • Publication Number
    20020097084
  • Date Filed
    January 23, 2002
    22 years ago
  • Date Published
    July 25, 2002
    22 years ago
Abstract
A filter (3) is described, which filter is provided with field effect (FET) capacitors (M1-32; M′1-32) arranged for controlling their respective capacity values, each such FET capacitor (M1-32; M′1-32) having a source (S) and a drain (D). The source (S) and the drain (D) of each FET capacitor (M1-32; M′1-32) are coupled to one another. The filter acting as an impedance transformer is a passive low power consuming and tunable filter, such as for a radio frequency (RF) receiver. It occupies only a very small area, while integrated on chip.
Description


[0001] The present invention relates to a filter provided with field effect (FET) capacitors arranged for controlling their respective capacity values, each such FET capacitor having a source and a drain.


[0002] The present invention also relates to a receiver and/or transmitter provided with such a filter.


[0003] Such a filter is known from U.S. Pat. No. 4,092,619. The filter disclosed therein concerns a metal oxide semiconductor field effect (MOSFET) voltage controlled low-pass filter. The MOSFET filter comprises a plurality of easy to integrate semiconductor filtering devices coupled in series through an active buffer, which may be a source follower. The semiconductor filtering devices each have a control input or gate and form capacitors, whose capacitor values are controlled by a voltage source connected to the gates. The controllable capacitor values enable the filter cut-off frequency to be controllable too. This way a tunable, but not solely passive low-pass filter for only the audio range is realised.


[0004] Therefore it is an object of the present invention to provide a tunable, but passive filter, capable of also operating in a higher frequency range, such as the radio frequency (RF) range and capable of being integrated on chip, on only a limited IC area.


[0005] Thereto the filter according to the invention is characterised in that the source and the drain of each FET capacitor are coupled to one another.


[0006] It is an advantage of the filter according to the present invention that it is also capable of operating in the RF range and that it can in particular be used as a tunable band-pass filter in a receiver, transmitter or combined transceiver. The filter is entirely passive and therefore does virtually not consume a lot of power. Although the coupled source drain could be used as a control input for controlling the capacitor values of the respective FET capacitors, it is preferred to control the FET capacitors on their respective gates. This is because if the gate would be present in the signal path, this would result in a necessary so called Electro Static Discharge (ESD) resistor in said signal path, which would decrease a wanted high Q-factor of the filter.


[0007] An embodiment of the filter according to the invention is characterised in that each FET capacitor has a control input for voltage dependent capacity value control.


[0008] This control input will thus preferably be the gate of the FET capacitor, also because advantageously the gate current is practically virtually neglectable. A high Q-factor of the filter results, because the above mentioned ESD resistor is omitted in the signal path.


[0009] A further embodiment of the filter according to the invention is characterised in that the filter is provided with control means coupled to FET capacitor control inputs.


[0010] These control means may even advantageously be simple switching means and/or decoding means capable of switching one or more FET capacitors or FET capacitor banks into the signal path of the filter and/or capable of correspondingly controlling the capacitor values concerned respectively.


[0011] A still further embodiment of the filter according to the invention is characterised in that the FET capacitors are split in equally controlled pairs of FET capacitors.


[0012] This is particularly advantageous if the filter is built up as a symmetrically filter having a symmetrical input and a symmetrical output, because it provides a large degree of design freedom.


[0013] At wish two or more of the FET capacitors are connected in series, in order to allow larger capacitor values to be created, which in addition are variable over a large capacitor value range.


[0014] Preferably the FET capacitors are metal oxide semiconductor (MOSFET) capacitors, capable of providing small but accurately controllable capacitor values, in order to enable the filter according to the invention to be an RF filter, which is particularly suitable for operating in the radio frequency range.


[0015] The present invention also relates to a transmitter, receiver, or transceiver having an above mentioned filter, which filter is provided with field effect (FET) capacitors arranged for controlling their respective capacity values, each such FET capacitor having a source and a drain, and characterised in that the source and the drain of each FET capacitor are coupled to one another.


[0016] The above advantages also apply to the transmitters, receivers and/or transmitter/receivers concerned.






[0017] At present the filter according to the invention will be elucidated further together with its additional advantages while reference is being made to the appended drawing, wherein similar components are being referred to by means of the same reference numerals. In the drawing:


[0018]
FIG. 1 shows a front end for a schematically depicted receiver, which is provided with a filter according to the invention; and


[0019]
FIG. 2 shows an embodiment of the filter according to the invention, which is implemented in an radio frequency (RF) filter.






[0020]
FIG. 1 shows in particular an RF front-end 1 of a receiver or receiver part of for example a transmitter/receiver. The receiver part is generally coupled to mixing means (not shown). The RF front-end 1 as shown comprises an antenna 2, a filter 3 in the form of an RF filter, and a low noise amplifier section 4, respectively coupled to one another. The RF filter 3 is mostly equipped as a band-pass filter, in order to filter out the relevant frequency range, which is then processed further by the low noise amplifier and mixer sections. Recent attempts have been made to fully integrate a receiver on a IC chip area having only a minor area. This poses very strong demands on the complexity of the circuitry to be integrated, in particular concerning circuit characteristics, heat developed on chip, power consumption and the like. Nevertheless a sufficient amount of design flexibility has to be maintained. This also concerns the filters, such as the RF filter 3, which also has to provide accurate and reproducible filter characteristics. In addition the filter 3 has to be tunable and has to provide for input impedance and output impedance matching and adjustment.


[0021]
FIG. 2 shows an embodiment of such a filter 3, which is implemented as a tunable RF filter. The filter 3 is an RF band-pass filter having a high quality (Q) factor. The filter 3 also transforms an RF input impedance zi at filter input 5 to an RF output impedance Z0 at filter output 6. Basically the filter 3 as shown comprises capacitors C1, C2 and coil L. Additional FET, such as MOSFET capacitors may be added to the filter 3. In this case filter input 5 is coupled to two FETs M0 and M′0, whose respective gates G0 and G′0 are coupled to switching means 7 providing a switching signal Vswitch for switching the filter 3 ON and OFF. In this case N-FETs and P-FETs M0 and M′0 act as filter switches. Apart from possible high frequency blocking coils (not shown) the filter input 5 is coupled to a series arrangement of pairs of—in this case each 32—FET capacitors M1 . . . M32, in addition to further FET capacitor pairs M′1 . . . M′32, which are also added to the filter 3 after the capacitors C1. The filter 3 comprises control means (Contr.), here in the form of separate decoders 8 and 9, coupled to each of the gates G1 . . . G32 and G′1 ... G′32 respectively. Drains (D) and sources (S) of each of the pairs MOSFET capacitors M1 . . . M32 and M′1 . . . M′32 are short circuited, as shown. By properly implementing the split up decoders 8 and 9 to provide respective control signals—in this case voltages—at said respective control gates G1 . . . G32 and G′1. . . G′32 in order to control their respective voltage dependent capacitor values, a proper high Q tuning as well as adjustment of a wanted input-output impedance matching can be achieved, while the power consumption due to the filter 3 being passive is minimized.


[0022] Off course the filter 3 may be designed as a symmetrical or not-symmetrical low-pass filter, a high-pass filter, or a band-stop or band-pass filter or any wanted combination thereof. All types of suitable capacitor controllable FET semiconductors may be used as FET capacitors. Whilst the above has been described with reference to essentially preferred embodiments and best possible modes it will be understood that these embodiments are by no means to be construed as limiting examples of the filter concerned, because various modifications, features and combination of features falling within the scope of the appended claims are now within reach of the skilled person.

Claims
  • 1. A filter (3) provided with field effect (FET) capacitors (M1-32; M′1-32) arranged for controlling their respective capacity values, each such FET capacitor (M1-32; M′1-32) having a source (S) and a drain (D), characterised in that the source (S) and the drain (D) of each FET capacitor (M1-32; M′1-32) are coupled to one another.
  • 2. The filter (3) according to claim 1, characterised in that each FET capacitor (M1-32; M′1-32) has a control input (G1-32; G′1-32) for voltage dependent capacity value control.
  • 3. The filter (3) according to claim 1 or 2, characterised in that the filter (3) is provided with control means (Contr.) coupled to FET capacitor control inputs (G1-32; G′1-32).
  • 4. The filter (3) according to one of the claims 1-3, characterised in that the FET capacitors (M1-32; M′1-32) are slit in equally controlled pairs of FET capacitor s (M1-32; M′1-32).
  • 5. The filter (3) according to one of the claims 1-4, characterised in that the filter (3) is built up as a symmetrically filter (3) having a symmetrical input (5) and a symmetrical output (6).
  • 6. The filter (3) according to one of the claims 1-5, characterised in that two or more of the FET capacitors (M1-32; M′1-32) are connected in series.
  • 7. The filter (3) according to one of the claims 1-6, characterised in that the FET capacitors ()M1-32; M′1-32 are metal oxide semiconductor (MOSFET) capacitors (M1-32; M′1-32).
  • 8. A transmitter, receiver, or transceiver having a filter (3) according to one of the claims 1-7, which filter (3) is provided with field effect (FET) capacitors (M1-32; M′1-32) arranged for controlling their respective capacity values, each such FET capacitor (M132; M′1-32) having a source (S) and a drain (D), characterised in that the source (S) and the drain (D) of each FET capacitor (M1-32; M′1-32) are coupled to one another.
Priority Claims (1)
Number Date Country Kind
01200239.0 Jan 2001 EP