Claims
- 1. An ultrasonic flaw detector comprising:
- (a) means including a signal generator for applying a transmitting pulse to a probe, said probe transmitting an ultrasonic wave to an object having a flaw to be detected;
- (b) receiver means for receiving a reflected ultrasonic wave arriving at said probe from a flaw in the object being detected due to reflection of said transmitting ultrasonic wave from said flaw;
- (c) gate circuit means including a gate signal generator which produces plural output signals, said plural output signals occurring without a gap from a preceding one of said signals, AND circuits, peak hold circuits and analog-digital converters, each of said AND circuits receiving the output signal from said gate signal generator sequentially, and an output signal from each of said AND circuits being supplied through each of said peak hold circuits to each of said analog-digital converters;
- (d) means for coupling an output from said receiver means to said gate circuit means;
- (e) clock pulse generating means for producing a clock pulse;
- (f) preset means for receiving the clock pulse from said clock pulse generating means and said transmitting pulse from said signal generator and producing an output signal for a fixed count of clock pulses from said clock pulse generating means;
- (g) delay circuit means coupled to an output of said preset means and producing a single output signal for each cycle of said signal generator, said single output signal being applied to said gate circuit means, said plural output signals from said gate signal generator being produced in response to said single output signal from said delay circuit means; and
- (h) counter indication means including latch circuits and display elements, each of said display elements receiving an output signal from each of said analog-digital converters through each of said latch circuits to give quantitative data concerning a flaw magnitude in said object being detected in response to measurements of said reflected ultrasonic wave.
- 2. An ultrasonic flaw detector as claimed in claim 1 in which said gate circuit means includes a plurality of gate circuits and the same number of analog to digital converters and said counter indication means includes a plurality of independent indication elements, the output from each of said analog to digital converters being applied to a corresponding indication element to numerically indicate the magnitude and position of the detected flaw.
- 3. An ultrasonic flaw detector as claimed in claim 1 in which a common analog to digital converter is inserted between said receiver and said gate circuit means.
- 4. An ultrasonic flaw detector as claimed in claim 1 in which the signal generator is coupled to said preset member for controlling the same, reset means coupled to the counter indication means, said signal generator being also coupled to said reset means for time-controlling the counter indication means.
Priority Claims (1)
Number |
Date |
Country |
Kind |
47-70589 |
Jul 1972 |
JA |
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CROSS REFERENCE TO RELATED APPLICATION
This is a continuation-in-part of our copending application Ser. No. 378,804 filed July 13, 1973, now abandoned.
US Referenced Citations (8)
Continuation in Parts (1)
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Number |
Date |
Country |
Parent |
378804 |
Jul 1973 |
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