The present invention concerns an ultrasound imaging system.
It is known an ultrasound imaging system comprising:
According to a first known embodiment, illustrated on the
In that case, the interface board comprises a predetermined and limited number of input signals, and the PLD or DSP has a limited computational power. If the number of transducers is increased, a new interface board must be designed, which is very expensive.
According to a second known embodiment, illustrated in the
Depending on the number of transducers, the data channels existing inside a standard computer are usually not able to absorb the input data rate from the transducers. Even though the data channels are efficient, the microprocessor of the computer is then unable to operate the beamforming process upon such a huge quantity of input data.
One object of the present invention is to provide an ultrasound imaging system so that the above limitations are removed.
To this effect, the ultrasound imaging system comprises a processing device located between the probe and the computer, and said processing device comprises:
Thanks to these features, the ultrasound imaging device is able to manage a first channel high rate from the probe to the memory, and is able to manage a second channel low rate from the memory to the computer. Such ultrasound imaging device architecture is therefore not dependent to the number of transducers, and it is easily scalable.
The processing unit can be chosen in a list of processing unit having a channel compatible with said switch unit. The processing unit can be a standard commercial processing unit, and is not expensive.
The computer does not need to be a powerful computer. A laptop computer may be used. The ultrasound imaging system is therefore more compact and less expensive.
In various embodiments of the ultrasound imaging device, one and/or other of the following features may optionally be incorporated.
According to another aspect of the invention:
According to another aspect of the invention, the second channel is a PCI express bus.
According to another aspect of the invention, the processing unit and the memory form a sub-assembly that is connected to the switch unit via a PCI express bus.
According to another aspect of the invention, the switch unit is a PCI express switch.
According to another aspect of the invention, the processing unit and the memory form a sub-assembly that is integrated inside a single electronic board.
According to another aspect of the invention, the processing unit and the memory are integrated inside a single electronic circuit.
According to another aspect of the invention, the processing unit is a graphic processing unit.
According to another aspect of the invention, the ultrasound imaging system comprises:
According to another aspect of the invention, the input and second channels of each processing units are PCI express buses and the third channel is a PCI express bus.
Another object of the invention is to provide a processing device for use in an ultrasound imaging system, said ultrasound imaging system comprising:
In preferred embodiments of the processing device, one and/or the other of the following features may optionally be incorporated.
According to another aspect of the invention:
According to another aspect of the invention, the first channel is a PCI express bus.
According to another aspect of the invention, the second channel is a PCI express bus.
According to another aspect of the invention, the switch unit is a PCI express switch.
According to another aspect of the invention, the processing unit is a graphic processing unit.
Other features and advantages of the invention will be apparent from the following detailed description of four of its embodiments given by way of non-limiting example, with reference to the accompanying drawings. In the drawings:
In the various figures, the same reference numbers indicate identical or similar elements.
Referring back to the prior art
The DAB 5 comprises an analog transmitter receiver multiplexer 5a connected to said transducers 3a, a plurality of amplifiers 5b to amplify the transducers signals into amplified signals, and analog to digital converters (ADC) 5c to convert the amplified signals into first digital values and providing said first digital values to a circuit 5d, said circuit 5d being a programmable logic device (PLD) 7b, for example a field-programmable gate array (FPGA) or a digital signal processor (DSP).
The circuit 5d implements a logic corresponding to a beamforming method and provides output data of beamformed data on the second channel 6 for the computer 20.
The implemented beamformed method is programmed inside the circuit 5d during the system start up from the computer 20 or from an on-board flash memory, and can hardly be changed after. The implemented beamformed method can process a predetermined number of transducers signals. Therefore, such ultrasound imaging system architecture is predetermined at manufacturing; it is not modular and not easily scalable. For example, any change in the number of transducers signals or any change in the imaging method, will incur the need to design a new board or at least to program a new circuit 5d. Additionally, the known circuits are not enough powerful if the number of transducers signals increases a lot, and for example for a number of transducers signals higher than two hundreds, the known circuits 5d are not able to process a beamforming method on these signals.
As usual, the computer 20 comprises:
The second channel 6 is a bidirectional channel. The computer 20 also provides second digital values to the DAB 5 for emitting an ultrasound wave inside the medium 2.
The circuit 5d sends said second digital values to a digital analog converter 5e to produce signals. These signals are amplified by an amplifier 5f, and multiplexed by the analog transmitter receiver multiplexer 5a. The amplified signals are therefore sent to the probe transducers 3a for generating an ultrasound wave inside the medium 2.
Referring to the prior art
The computer 20 comprises a bridge 21 that interconnects the computer inner data channels. The bridge 21 connects the second channel 6 from the DAB 5, a memory 22 and a microprocessor 23. The computer 20 executes a beamforming software stored inside an hard drive 24. The beamforming software implements a beamforming method that uses the first digital values from the transducers. For example, the beamforming software implements known beamforming method, wherein the first digital values from the plurality of transducers 3a are each delayed with a predetermined delay, and summed together to compute an image of a slice inside the medium 2.
Such ultrasound imaging system is modular and scalable.
However, all the first digital values are transferred to the computer 20 and all the data processing is done by the computer 20. If the number of transducers is huge, for example several hundreds, the data channels usually embedded inside a standard computer, such as a USB or PCI express, are not able to absorb directly the input data rate from these transducers. A plurality of data channels may be used in parallel to increase the allowable rate, but the microprocessor and optional coprocessor embedded inside the computer may then be unable to operate the beamforming process upon such huge quantity of input data.
Therefore, even if such ultrasound imaging system architecture is pleasant and completely modular, it can not be carried out for a huge number of transducers, and therefore can not be carried out for producing accurate 2D real time images or for 3D images.
In this first embodiment, the system comprises a DAB 5 after the probe 3. The processing device 10 is therefore connected between the DAB 5 and the computer 20.
The processing device 10 comprises at least:
The memory 14 is adapted to store the input and output data.
The processing unit 15 is adapted to process a beamforming method or any imaging method based upon said input data, so that to provide the output data.
The processing unit 15 may be a graphic processing unit (GPU).
The switch unit 13 is therefore able to manage different channel rates. The second channel rate can be low, and the computer can be a low cost computer. Thanks to such architecture comprising a switch unit, the ultrasound imaging system is scalable.
The first channel may be a PCI express bus, or a USB bus, or the like.
The second channel may be a PCI express bus, or a USB bus, or the like.
The memory 14 and the processing unit 15 may form a sub-assembly. Such sub-assembly may be integrated inside a single electronic board.
The sub-assembly may be connected to the switch unit 13 via a PCI express bus or the like.
The sub-assembly may be a Mobile PCI-Express Module (MXM).
Thanks to these features, the processing device 10 may use standard commercial processing units that are low cost. The ultrasound imaging system of the invention is less expensive than the equivalent (having same number of transducers) and than the prior art systems.
The second channel 12 is advantageously a bidirectional channel. The computer 20 can therefore provide digital values to the DAC 5e for generating the emitted ultrasound wave inside the medium 2.
Advantageously, the second channel 12 is also adapted for providing at least a processing program and processing data from the computer 20 to the memory 14, said processing program being the program that implements a beamforming or an imaging method. The processing unit 15 is then able to operate this processing program stored in memory 14.
The processing program can be updated or changed, and the ultrasound imaging system is scalable and upgradable.
Thanks to the switch 13 and the second channel 12, the processing unit 15 is seen from the computer as an internal resource; as it is located inside the computer 20. In case of a plurality of processing units 15, they are all seen as inside the computer. The program implementing the imaging method is easily developed because the program developed for the second prior art is very similar, and need only minor changes to be adapted to the new ultrasound imaging system architecture.
The system switch 18 gathers all the output data from all the processing devices 101 . . . 10N and sends these data to the computer 20 via a third channel 19 (system channel).
Thanks to such architecture, the ultrasound imaging system is scalable. The computing power of all the processing devices grows with the number of transducers. The computer 20 is independent to said transducers number, and can still be a laptop computer.
The processing devices 10i may also be connected to each other via an optional connexion channel 16i, in a linear architecture as represented on
In this embodiment, the switch unit 13 of each processing device 10i comprises a first additional channel for connecting the previous processing device and a second additional channel for connecting the next processing device 10i+1.
Thanks to these features the processing units 151 . . . 15N of the system may communicate to each other, to operate a more complex imaging method based on a number of transducers higher than the number of transducers connected to one DAB 5.
The connexion channel may be a PCI Express bus or the like.
In this embodiment, the first channel 11 may be a USB 3.0 bus.
The features of this fifth embodiment may be used in all previous embodiments to provide a full digital architecture to the ultrasound imaging device.
The second channels in the previous embodiments are advantageously PCI express buses. Each of them may comprise a plurality of lane (between 1 and 32 lanes). The number of used lanes can be adapted to the needed rate for a predetermined ultrasound imaging system, and depending on the number of transducers, the imaging method used. Thanks to this feature the ultrasound imaging system is again more scalable.
Such new architecture of ultrasound imaging system makes it now possible to build a fast 3D ultrasound imaging system.
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/IB2011/003328 | 12/12/2011 | WO | 00 | 6/6/2014 |
Publishing Document | Publishing Date | Country | Kind |
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WO2013/088196 | 6/20/2013 | WO | A |
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Number | Date | Country | |
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20140347954 A1 | Nov 2014 | US |