Undesired signal canceller

Abstract

Apparatus for cancelling undesired signals for a radient energy receiver having first and second antennas which are spaced a distance apart and including a phase compensation circuit connected to one of the antennas and a variable phase shift circuit connected to the second antenna with the variable phase shift circuit comprising a plurality of series connected inductors wherein adjacent inductors are magnetically coupled together and a plurality of voltage variable capacitors with adjacent ones of the voltage variable capacitors connected between ground and the junction points between adjacent ones of the series connected inductors and adding means connected to the outputs of the phase compensation circuit and the variable phase shift circuit and means for supplying a variable DC voltage to the variable voltage capacitors to control their capacitance.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

This invention relates generally to an undesired signal canceller, and is directed more particularly to an undesired signal canceller for use in a ghost canceller and so on of a television receiver.

2. Description of the Prior Art

In the art, an undesired signal canceller shown in FIG. 1 is already proposed. In the example of FIG. 1, two antennas 1 and 2 are arranged apart with a distance d. The signal received by the antenna 1 is applied through a phase compensation circuit 3 with the phase shift of .phi.1 to a subtraction type circuit 4, while the signal received by the antenna 2 is supplied to the subtraction type circuit 4 through a variable phase shifter 5 with the phase shift of .phi.2.

In this case, it is known that the total directivity coefficient D(.theta.) of the above antenna device or arrangement is expressed as follows: ##EQU1## where k is a propagation constant and f(.theta.) is the directivity of each antenna.

Accordingly, in order to make a null point or null direction (which is a point when the receiving sensitivity is 0) on the direction angle .theta., it is sufficient if the following equation (2) is established. ##EQU2## In the above equation (2), if n=0 and .phi.2-.phi.1 is varied within the range of .+-.kd, the null point can be presented in a desired direction. Further, if .phi.2-.phi.1 is proportional to a frequency F(.phi.2-.phi.1=KF), k(=(2.pi.F)/(C), C is the velocity of light) is also proportional to the frequency F. Therefore, a null point .theta..sub.N is expressed as follows: ##EQU3## Thus, the null point .theta..sub.N can be set in a constant direction irrespective of received signal frequencies.

In this case, a coaxial cable is generally employed as the phase shifter 5 whose phase shift amount is proportional to the frequency F.

In this case, however, since the phase shift amount of the coaxial cable corresponds to its length, the phase adjustment thereof is very difficult. For this reason, a plurality of coaxial cables are prepared and they are switchably used. This adjustment, however, is rather complicated and it is also troublesome to change the null point after it has once been. Further, it is impossible to adjust the null point while a user stays near a television receiver.

OBJECTS AND SUMMARY OF THE INVENTION

Accordingly, an object of this invention is to provide a novel undesired signal canceller free from the defects inherent to the prior art.

Another object of the invention is to provide an undesired signal canceller by which a null point can be easily adjusted.

A further object of the invention is to provide an undesired signal canceller in which once a null point has been adjusted is not varied for received signal frequencies.

According to an aspect of the present invention, an undesired signal canceller is provided which comprises:

(A) a pair of antennas arranged in parallel for receiving an input signal within a predetermined frequency range, said input signal including desired and undesired signals; (B) a variable phase shifter connected to one of said pair of antennas, said variable phase shifter including a low pass filter network consisting of a plurality of L-C stages each of which includes a coil and a capacitor; and (C) an adding circuit connected between said variable phase shifter and the other of said pair of antennas, the degree of coupling between two neighboring coils of said low pass filter network is sequentially designed such that said undesired signal is effectively eliminated in the output of said adding circuit regardless of the frequency of said input signal within said predetermined frequency range.

The other objects, features and advantages of the present invention will become apparent from the following description taken in conjunction with the accompanying drawings through which the like references designate the same elements and parts.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a block diagram showing a ghost canceller used for explaining the present invention;

FIG. 2 is a connection diagram showing an example of the variable phase shifter of a low pass filter type used in the invention;

FIG. 3 is a circuit diagram showing an example of the fundamental circuit of the ghost canceller according to the invention;

FIG. 4 is a circuit diagram used for explaining the operation of the fundamental unit circuit of the phase shifter used in the example of FIG. 3;

FIG. 5 and FIGS. 6A to 6C are respectively characteristic diagrams of the circuit shown in FIG. 3;

FIG. 7 is a circuit diagram used to explain the operation of the variable phase shifter used in the example of FIG. 3;

FIGS. 8 and 9 are respectively characteristic diagrams of the variable phase shifter used in the example of FIG. 3;

FIG. 10 is a characteristic diagram of the variable capacitance diode used in the example of FIG. 3;

FIG. 11 is a top plan view showing an example of the variable phase shifter used in the example of FIG. 3;

FIGS. 12 and 13 are respectively characteristic diagrams of the coils shown in FIG. 11;

FIG. 14 is a directivity characteristic diagram of FIG. 3 when using the coil arrangement shown in FIG. 11;

FIG. 15 is a characteristic diagram of the variable capacitance diode used in the example of FIG. 3;

FIG. 16 is a circuit diagram showing an improved variable phase shifter useable in the invention; and

FIG. 17, FIGS. 18A to 18C and FIG. 19 are respectively circuit diagrams used to explain the improved point of the variable phase shifter shown in FIG. 16.

DESCRIPTION OF THE PREFERRED EMBODIMENT

This invention will be hereinafter described with reference to the attached drawings.

In an example of the invention, a low pass filter type variable phase shifter is used as the phase shifter 5 in the prior art example of FIG. 1.

An example of the low pass filter type variable phase shifter used in the invention will be now described with reference to FIG. 2. As shown in FIG. 2, the variable phase shifter of this example is formed of a plurality of variable capacitance elements 11.sub.1 to 11.sub.n each of which is grounded at its one end and a plurality of coils 12.sub.1 to 12.sub.n-1 which are respectively connected between other ends of adjacent variable capacitance elements. Further, coils 15a and 15b, each of which has an inductance which is one half of that of each of the coils 11.sub.1 to 11.sub.n, are connected between an input terminal 13 and the first variable capacitance element 11.sub.1 at the input side and between the last variable capacitance element 11.sub.n at the output side and an output terminal 14, respectively.

The amount of phase shift of this variable phase shifter is expressed as follows: ##EQU4## where n is the number of L-C stages, C.sub.0 is the capacitance value of each of the variable capacitance elements 11.sub.1 to 11.sub.n and L.sub.0 is the inductance value of each of the coils 12.sub.1 to 12.sub.n-1.

Accordingly, if in the above variable phase shifter, for example, voltage controlled variable capacitance diodes are used as the variable capacitance elements 11.sub.1 to 11.sub.n and C.sub.0 thereof is varied, a certain desired amount of phase shift can be obtained.

In the invention, a phase compensation circuit, which is formed to have a construction similar to that of the above variable phase shifter 5, is used as the phase compensation circuit 3 of the prior art. In this case, the capacitance value of the respective capacitance elements 11.sub.1 to 11.sub.n shown in FIG. 2 is fixed at a desired value to form the capacitance elements 11.sub.1 to 11.sub.n as fixed capacitor.

Turning to FIG. 3, an example of the antenna device or arrangement used in the invention, in which the above variable phase shifter and phase compensation circuit are used, will be described.

In the example of FIG. 3, the signals from the antennas 1 and 2 are derived through a switching circuit 7. For example, the signal from the antenna 2 through the switching circuit 7 is supplied to a subtraction type circuit 4 through the variable phase shifter 5, while the signal from the antenna 1 through the switching circuit 7 is supplied to the circuit 4 through the phase compensation circuit 3. The transmission line from the phase shifter 5 and that from the phase compensation circuit 3 are connected together through a primary winding 31 of a transformer in the adding circuit 4. A secondary winding 32 of the transformer has one end grounded through a capacitor 33 and the other end is connected to a terminal 34. The windings 31 and 32 are connected through a choke coil 35, and the middle point of the primary winding 31 is grounded through a capacitor 36 and a resistor 37.

Thus, in the antenna device of FIG. 3, the signals from the variable phase shifter 5 and phase compensation circuit 3 are combined and delivered to the terminal 34 and then to the antenna input terminal of a television receiver (not shown). When at the side of the television receiver a control DC voltage is superimposed on the transmission line connected to the terminal 34, this DC voltage is applied through the choke coil 35 and the primary winding 31 to the variable phase shifter 5 and the capacitive value of its variable capacitance diodes 11.sub.1 to 11.sub.n are controlled.

In this case, the impedance value Z.sub.0 of the variable phase shifter 5 is given by the following formula (5); ##EQU5## And, if the variable range of the respective capacitive value C.sub.0 of the variable capacitance diodes 11.sub.1 to 11.sub.n is selected in the range from 3 to 12pF, the design value of C.sub.0 is selected as 6pF and the impedance value Z.sub.0 is selected as 75.OMEGA., the inductance value of each of the coils 12.sub.1 to 12.sub.n-1 becomes 33.8 nH.

Further, when the number of L-C stages in the variable phase shifter 5 is selected as 10, its amount of phase shift .phi.2 becomes as follows: ##EQU6##

The amount of phase shift .phi.1 of the phase compensation circuit 3 is given by the following formula (7) when the capacitive value of each of the capacitors is selected as 7pF, the inductance value of each of the coils is selected as 36 nH and the number of L-C stages is selected to be 4, ##EQU7##

Accordingly, the null point .theta..sub.N of the antenna device shown in FIG. 3 is given as follows: ##EQU8##

When d=135 cm, the expressions (6) and (7) are substituted into the expression (8) and the variable range of C.sub.0 is selected from 3 to 12pF, the null point .theta..sub.N is varied as in the following table in which 1 to 12 channels show the Japanese television channels.

TABLE______________________________________C.sub.0 Received Channel .theta..sub.N______________________________________3pF 1 13.0343pF 2 13.0293pF 3 13.0253pF 4 13.9163pF 5 13.9813pF 6 14.0253pF 7 14.0473pF 8 14.0513pF 9 14.0473pF 10 14.0353pF 11 14.0193pF 12 14.0006pF 1 32.1306pF 2 32.1566pF 3 32.1846pF 4 32.6266pF 5 32.6766pF 6 32.7286pF 7 32.7826pF 8 32.8206pF 9 32.8786pF 10 32.9396pF 11 33.0036pF 12 33.0709pF 1 49.7269pF 2 49.9469pF 3 50.1159pF 4 50.7989pF 5 51.0509pF 6 51.3119pF 7 51.6039pF 8 51.7469pF 9 51.9209pF 10 52.0169pF 11 52.0549pF 12 52.07112pF 1 76.98512pF 2 77.00712pF 3 77.00112pF 4 83.99812pF 5 85.00012pF 6 84.99912pF 7 83.99912pF 8 83.00112pF 9 82.99812pF 10 82.99812pF 11 84.00112pF 12 84.001______________________________________

According to the simple analysis of the antenna device shown in FIG. 3, as will be apparent from the above table, the null point .theta..sub.N varies in accordance with the received signal frequencies.

In view of the above point, according to the invention, the coupling inductance or mutual inductance M between arbitrary adjacent coils of the phase compensation circuit 3 and the variable phase shifter 5 in the antenna device of FIG. 3 is selected to satisfy the following formula.

(M/L.sub.0 .perspectiveto.-0.2 Thus, the non-linearity of the phase shifting amount can be remarkably improved.

If a simple fundamental L-C phase shifting circuit shown in FIG. 4 is considered, the four-terminal parameters of this circuit become as follows: ##EQU9## where z is j.omega. (L.sub.0 -M) and y is j.omega.C/(1-.omega..sup.2 CM).

Further, the image impedance Z.sub.0 of this synmetrical four-terminal network becomes as follows: ##EQU10##

The phase constant .beta..sub.I of this circuit becomes as follows in the range (pass band) of A<1: ##EQU11##

When the factor representing the degree of coupling between adjacent coils is taken as k(=M/L.sub.0) and the factor representing variation of capacitance is taken as K(=C/C.sub.0), the above formulae (10) and (11) can be respectively rewritten as follows: ##EQU12##

Accordingly, the amount of group delay d.beta..sub.I /d.omega. is expressed as follows: ##EQU13##

If the above equation (14) becomes constant for the received signal frequency of the VHF band, the phase characteristic of the circuit shown in FIG. 4 becomes proportional to the received signal frequency.

If the equation (14) is differentiated again, the following equation is obtained. ##EQU14##

If the equation (15) is for the received signal frequency in the VHF band, it is sufficient. Accordingly, the following equation (16) is derived from the equation (15).

f(x,k)=B 5k+1-3a(1+k)x.sup.2 =5k+1-6Kx (16)

The condition which makes the equation (16) zero is sufficient.

The variation of f(x, k), when K=1 and k is taken as a parameter, is shown in the graph of FIG. 5.

From the graph of FIG. 5 it will be apparent that if the degree of coupling k is selected as about (k=)-0.2, the amount of phase shift .beta..sub.I can be varied approximately linearly for the frequency.

FIGS. 6A, 6B and 6C are graphs respectively showing the frequency to amount of phase shift .beta..sub.I characteristics when eight stages of L-C unit circuits, each being selected to have k=-0.2, are connected in cascade. In these graphs, a phase error .DELTA..beta..sub.I is the deviation from the straight line (error from linearity) connecting the respective amounts of phase shift at the frequencies of 0 and 90 MH.sub.z, which is calculated.

As will be apparent from the graphs of FIGS. 6A to 6C, when it is selected that k=-0.2 the error from linearity will fall within .+-.5.degree. in the range of 0.5<K<2.0.

In the above analysis, it is assumed that the circuit of FIG. 4 is formed of a lossless transmission line. In fact, however, there is a loss caused by the deterioration in Q of the L-C circuit formed by the coil and the variable capacitance diode, and this loss poses a problem when a plurality of the circuits, such as shown in FIG. 4, are connected in cascade.

Therefore, a case where n-stages of the circuits shown in FIG. 4 are connected in cascade will be analized while the resistance R of its coils and the conductance G of its capacitors are taken into consideration. That is, since the phase characteristic is approximately linear as shown in the previous analysis, the circuit formed by connecting n-stages of the circuits of FIG. 4 in cascade may be considered equivalent to a distributed constant circuit. Accordingly, when a transmission signal is of high frequency, the propagation constant r=(.alpha.+j.beta.) is given by the following equations (17) and (18). ##EQU15## where .omega..sub.L >>R and .omega..sub.C >>G.

Thus, when the transmission line which has the characteristic impedance Z.sub.0 and the propagation constant r as shown in FIG. 7 is considered, the relationship of voltage V.sub.0 to, current I.sub.0 between input terminals 13a and 13b to voltage V.sub.l, to current I.sub.l between output terminals 14a and 14b becomes as follows: ##EQU16##

In this case, when the transmission line is terminated with the terminal resistance R.sub.L =R.sub.0, the actual transmission coefficient S.sub.B is given as follows: ##EQU17##

From the above S.sub.B, the actual amount of attenuation .alpha..sub.B is given as follows:

.alpha..sub.B =10 log .vertline.S.sub.B .vertline..sup.2 [dB](21)

While, the propagation constant r.sub.n when n-stages of the circuits are connected in cascade is given as follows:

r.sub.n =n.alpha.+jn.beta..sub.I (22) The characteristic impedance Z.sub.0 and the phase constant .beta..sub.I are given by the equations (12) and (13), respectively.

Accordingly, from the equations (19) and (20), the following equation (23) is derived. ##EQU18## And, the actual phase .beta..sub.B becomes as follows: ##EQU19##

From the above equations (21) and (24), when the degree of coupling k=-0.2 is selected and number of stages n=10, the inductance of the coil of each stage L=25.0 nH and that the voltage V.sub.c applied to the variable capacitance diode is taken as a parameter, the theoretical values of the frequency characteristic of errors .DELTA..alpha..sub.B and .DELTA..beta..sub.B from linearity of the actual attenuation degree .alpha..sub.B of the frequency characteristic and actual phase .beta..sub.B become as indicated by the solid lines in the graphs of FIGS. 8 and 9, respectively. Further, the converting characteristic curve of the applied voltage V.sub.c to Q value of the variable capacitance diode becomes as shown in the graph of FIG. 10.

As will be apparent from the above graphs, by selecting the degree of coupling k=-0.2, the errors .DELTA..alpha..sub.B and .DELTA..beta..sub.B from linearity of the actual degree of attenuation .alpha.HD B and the amount of phase shift .beta..sub.B can be greatly reduced.

Therefore, if, for example, as shown in FIG. 11 conductive line patterns are formed or coated on both surfaces of a circuit board having a predetermined thickness to locate respective coils in close proximity, the coil arrangement can be formed in which the degree of coupling k between adjacent certain coils is -0.2. In detail, as shown in FIG. 11, on both or front and rear surfaces of the circuit board 51, respectively are formed printed coils 52a and 52b each formed of, for example, a spiral form of metal foil. In FIG. 11, the solid line represents the printed coil 52a on the front surface of the circuit board 51 and the broken line represents coil 52b on the rear surface thereof, respectively. In this case, the coil 52b on the rear surface of the circuit board 51 is displaced from the coil 52a on the front surface in the directions both to the right and down by 1 mm and the unit of the numerals on the sheet is in millimeters.

At the center portion 53 of the spiral of each of the printed coils 52a and 52b, a bore 54 is formed through the circuit board 51, and the cathode lead of the variable capacitance diode 11 is inserted into the bore 54 and soldered to the printed coils 52a and 52b on the front surface and rear surface of the circuit board 51, respectively.

Thus, the circuit portion shown in FIG. 11 which is surrounded by the one-dot chain line is equal to the fundamental circuit shown in FIG. 4. In this case, through the printed coils 52a and 52b, currents respectively flow in the direction indicated by the solid and broken lines arrows, in other words, through the opposing portions of printed coils 52a and 52b the currents flow in the same direction, so that the coupling therebetween is negative. By selecting the size and shape of the printed coils 52a and 52b as indicated in FIG. 11, the inductance L of the coils can be set as, for example, 25.0 nH and the degree of coupling k between the coils can be set at -0.2.

FIG. 12 is a graph showing the frequency characteristic of the printed coils 52a and 52b at Q values, and FIG. 13 is a graph showing the actually measured values of the frequency characteristic of the resistance values of the printed coils 52a and 52b, respectively.

When the circuit surrounded by the one-dot chain line in FIG. 11 is connected in cascade with 10 stages, the actual measured values of the frequency characteristics of errors .DELTA..alpha..sub.B and .DELTA..beta..sub.B from linearity of the frequency characteristic of the actual degree of attenuation .alpha..sub.B and actual amount of phase shift .beta..sub.B respectively become as shown in the graphs of FIGS. 8 and 9 by the broken lines which are approximately equal to the theoretical or calculated values.

FIG. 14 is a graph showing an example of the directional characteristics of an undesired signal canceller which uses the above coil device, in which C.sub.0 =3p.sup.F. From this graph it will be apparent that the cancelling ratio of about -30 dB is obtained at the null point .theta..sub.N.

The above example is the case where the undesired signal arrives from the right side relative to a desired signal, but in the case where the undesired signal arrives from the left side, by changing the switching circuit 7, the null direction can be formed at the left front.

As described above, if the degree of coupling between the adjacent coils in the circuit of FIG. 3 is selected as about -0.2, it is apparent that the null direction can be stabilized regardless of the received signal frequencies.

In the circuit of FIG. 3, the control bias voltage (V.sub.c) versus capacity (C.sub.0) characteristic of the variable capacitance diode is now-linear as shown in the graph of FIG. 15. As a result, an electric field of, for example, more than 90 dB is applied thereto, and beat interference may be generated in the circuit of FIG. 3. That is, when the signals of, for example, the first and third channels are mixed, a beat interference may be caused in the eighth channel.

An improved phase shifter according to the invention, which will avoid the generation of the above beat interference, is shown in FIG. 16, the circuit elements corresponding to those of the phase shifter of FIG. 2 or 3 are marked with the corresponding reference numerals and letters.

In the example of FIG. 16, capacitors 17 and 18 are respectively connected to the input and output terminals 13 and 14, and a fixed bias is applied through a resistor 19 to the input coil 15a from a terminal 20. Further, the polarities of diodes 11.sub.1 to 11.sub.n are alternately made opposite, and the cold ends of the respective diodes are individually grounded through capacitors 22.sub.1, 22.sub.2 - - - 22.sub.n. The connection points between the anodes of every other diodes 11.sub.1, 11.sub.3 - - - 11.sub.n-1 and the capacitors 22.sub.1, 22.sub.3 - - - 22.sub.n-1 are connected together through resistors 21.sub.1, 21.sub.3 - - - 21.sub.n-1 to a bias terminal 23a, and the connection points between the cathodes of the diodes 11.sub.2, - - - 11.sub.n and the capacitors 22.sub.2 - - - 22.sub.n are connected together through resistors 21.sub.2 - - - 21.sub.n to another bias terminal 23b.

In the circuit of FIG. 16, the bias voltage at the terminal 20 is fixed, and two control voltages, which vary oppositely with the fixed bias voltage as the center, are applied to the bias terminals 23a and 23b, respectively, so that the capacitance value C.sub.0 of the diodes 11.sub.1 to 11.sub.n is controlled in a manner similar to the example of FIG. 3, whereby a desired amount of phase shift .phi. is obtained.

The fact that the circuit of FIG. 16 greatly reduces the beat interference as compared with the circuit of FIG. 3 will be now explained in detail.

The capacitance (C.sub.0)-DC bias voltage (V.sub.c) characteristic of the variable capacitance diodes is approximately expressed by the following equation (25). ##EQU20## where 2 V.ltoreq.V.sub.c .ltoreq.13 V, a=3.6728.times.10.sup.10, b=1.7034.times.10.sup.10, c=-1.1924.times.10.sup.9 and d=8.0065.times.10.sup.7.

Now, if it is assumed that when a signal .DELTA.e is applied to a variable capacitance diode which is biased with a DC voltage V.sub.c, its capacitance C(V.sub.c) changes by .DELTA.C and, the following equation is established.

C=A.sub.1 .DELTA.e+A.sub.2 (.DELTA.e).sup.2 +A.sub.3 (.DELTA.e).sup.3 + - - - (26) where ##EQU21##

Thus, since the relation of .DELTA.e to .DELTA.C becomes non-linear when, an input with a large amplitude is applied, higher harmonic components are generated.

Now, consideration is given to the generation of how much harmonic distortion occurs when the above variable capacitance diode is applied to a phase shifter. Thus, such a circuit will be considered in which a fundamental unit circuit is connected in cascade with two stages as shown in FIG. 17. In this case, it is assumed that the load and the signal source resistances are each equal to the characteristic impedance Z.sub.l of the whole phase shifter. However,

Z.sub.1 =j.omega.(L-M) where M/L=-0.2 and ##EQU22## where Z.sub.0 is the characteristic impedance of the phase shifter and C.sub.0 is the various capacitance by the DC bias value.

When the signal source of e is applied to the above phase shifter, voltages e.sub.g1 and e.sub.g2 applied across the variable capacitance diodes of the circuits 1 and 2 in the phase shifter of FIG. 17 are given by the following equations.

e.sub.g1 =K.sub.107 e (27) e.sub.g2 =g.sub.107 K.sub.107 e (28) where ##EQU23##

Under the assumption that when the voltages e.sub.g1 and e.sub.g2 are applied to the variable capacitance diiodes, harmonic distortion is generated, current sources for currents i.sub.1 and i.sub.2 which are shown in FIG. 18A and also given by the following equations will be considered: ##EQU24##

Further, since the amplitude of the harmonic components is small as compared with that of the fundamental wave component, it is considered that in the section other than that in question harmonic components are generated by only the fundamental wave component. The output e.sub.out of the circuit shown in FIG. 18A may be considered as follows. That is, the circuit of FIG. 18A is separated as shown in FIGS. 18B and 18C, and outputs e.sub.1 out and e.sub.2 out thereof are added to provide the output e.sub.out. The outputs e.sub.1 out and e.sub.2 out are given by the following equations (31) and (32), respectively. ##EQU25## Therefore, ##EQU26##

From the above discussion, it will be considered that two sine waves which are different in frequency are simultaneously applied to the above non-linear circuit i.e. the signal e expressed by the following equation (34) is applied to the non-linear circut.

e=E.sub.1 cos .omega..sub.1 t+E.sub.2 cos .omega..sub.2 t (34) If the above equation (34) is substituted into the equations (27) and (28), the voltages e.sub.g1 and e.sub.g2 across the variable capacitance diodes respectively become as follows: e.sub.g1 =K.sub.107 1 E.sub.1 cos .omega..sub.1 t+K.sub.107 2 E.sub.2 cos .omega..sub.2 t (35) e.sub.g2 =g.sub.107 2 K.sub.107 1 E.sub.1 cos .omega..sub.1 t+g.sub.107 2 K.sub.107 2 E.sub.2 cos .omega..sub.2 t (36)

If the above equations (35) and (36) are substituted into the equations (29) and (30), respectively, the current sources of i.sub.1 and i.sub.2 are obtained as follows: ##EQU27##

The above equations are developed, and considerating only the components of .omega..sub.1 +.omega..sub.2, they are substituted into the equations (31) and (32), respectively. Then, the outputs e.sub.1 out and e.sub.2 out can be expressed as follows:

e.sub.1 out =R.sub.107 1 B.sub..omega.1 sin.sub.107 1 t+R.sub.107 1 +2B.sub.107 1 +.omega.2 sin (.omega.1+.omega.2)t (39) e.sub.2 out =r.sub..omega.1 b.sub..omega.1 sin .omega.1t+r.sub..omega.1 +.omega.2b.sub..omega.1 +.omega.2 sin (.omega.1+.omega.2) t (40) where ##EQU28## Accordingly, the total output e.sub.out becomes as follows: ##EQU29##

From the above, the intermodulation product IP is given as follows: ##EQU30##

Next, a case will be considered in which the polarities of the variable capacitance diodes are alternately inverted.

When the polarity of the DC bias to the variable capacitance diode is reversed, .DELTA.C is given from the equation (26) as follows:

.DELTA.C=A.sub.1 '.DELTA.e+A.sub.2 '(.DELTA.e).sup.2 +A.sub.3 '(.DELTA.e).sup.3 + - - - (44) where ##EQU31## and the dash shows the case where the polarity is inverted.

The relation between A.sub.n in the equation (26) and A.sub.n ' in the equation (44) becomes as follows:

A.sub.n =(-1).sup.n A.sub.n ' (45)

Accordingly, if the above relation is used, the intermodulation product can be similarly obtained even in the case where the polarity of the DC bias is alternately inverted. That is, when as shown in FIG. 19 the polarity of the rear stage of the variable capacitance diode in the fundamental 2 stages is inverted, the following relation is established from the equation (45). ##EQU32## So, from the equation (41), the following equation is established. ##EQU33##

As a result, the intermodulation products IP' when the polarity of the DC bias is inverted can be expressed as follows: ##EQU34##

From the above theoretical analysis, the intermodulation products in the case that the polarities of the DC biases to the variable capacitance diodes are not inverted but selected to be the same (refer to the equation (43)) and the intermodulation products in the case where the polarities are alternately inverted (refer to the equation (48)) are respectively obtained.

When the equations (43) and (48) are compared, it is understood that in the case where the polarities of the DC biases to the variable capacitance diodes are inverted as in FIG. 19, the factors of .omega.1 (denominator) is the form of the sum and the same as that of the former case but the factor of .omega.1+.omega.2 (numerator) is expressed in the form of subtraction which is different from the former case. Therefore, if the following relation is established, the value of intermodulation products can be made zero.

R.sub..omega.1 +.omega.2B.sub..omega.1 +.omega.2=r.sub..omega.1 +.omega.2b.sub..omega.1 +.omega.2

Now, a case where the bias value ratio to the variable capacitance diode is worst is assumed, and then a practical value is applied for comparison.

That is, under the condition that f.sub.1 =91.25 MH.sub.z, f.sub.2 =103.25 MH.sub.z, E.sub.1 =E.sub.2 =45.times.10.sup.-3 V(90 dB.mu.), L=25.sub.n H, M=5.sub.n H and V.sub.c =+3 V(C.sub.0 =12.6.sub.p F), if it is calculated how much the intermodulation product is improved, the following results are obtained.

1. When the polarities of the DC biases are all selected in the same direction, the intermodulation product IP is given from the equation (43) as follows: IP=-45.02 dB 2. When the polarities of the DC biases are varied alternately, the intermodulation product PI' is given from the equation (48) as follows: IP'=-65.08 dB

From the above, the degree of improvement of the intermodulation product becomes as follows: Degree of improvement of intermodulation product=-20.06 dB

Now, a case where the L-C fundamental circuits of 10 stages are connected in cascade will be considered. At first, the intermodulation product IP.sub.n in the case where the L-C fundamental circuits of n stages are connected in cascade is approximately expressed as follows:

IP.sub.n =20 log {(1+intermodulation product of 1 stage).sup.n -1}

Since the value is obtained under the assumption that 2 stages are one set, when the intermodulation product is calculated as n=5, the following results are obtained.

1. When the polarities of the DC biases are all selected in the same direction, the intermodulation product IP becomes as follows: IP=-30.96 dB 2. When the polarities of the DC biases are varied alternately, the intermodulation product IP' becomes as follows: IP'=-51.09 dB

In general, if the intermodulation product is selected higher than -50 dB, no problem appears on a picture screen. Therefore, it will be understood that the phase shifter of the invention shown in FIG. 16 is sufficient for avoiding the harmonic distortion.

Further, the merits of the circuit shown in FIG. 16 have been expedimentally proven.

As described above, according to this invention, the coupling degree k between the coils forming the variable phase shifter is selected to be about or around -0.2, so that errors from linearity of the insertion loss and the phase shift can be reduced and hence a good characteristic is obtained.

Further, in this invention when the respective coils of the variable phase shifter are made of printed coils, the coupling degree between the coils can be easily determined from the design thereof. Thus, the products can be made to have uniform characteristics and need not be adjusted.

Further, in the invention when the shapes of the printed coils are selected to be synmetrical with respect to the front and rear sides, there is not generated any ununiform portions in the characteristic and the characteristics are improved.

Also, in this invention when C.sub.0 is provided by the variable capacitance diode and can be varied by superimposing a DC voltage on the signal path, a user can change the null point while he stays near a television receiver. Thus, the adjustment becomes easy. At this time, since only one signal line is sufficient, the wiring and so on are simple.

Although the present invention has been particularly shown and described with reference to certain preferred embodiments thereof, it will be readily apparent to those of ordinary skill in the art that various changes and modifications in form and details may be made without departing from the spirit and scope of the invention. Therefore, the spirits or scope of the invention should be determined by the appended claims.

Claims

1. An undesired signal canceller for a radient energy receiver comprising first and second antennas spaced a distance (d) apart, a phase compensation circuit connected to said first antenna, a variable phase shift circuit connected to said second antenna, said variable phase shift circuit comprising a plurality of series connected inductors wherein adjacent ones of said inductors are magnetically coupled together and a plurality of voltage variable capacitors with adjacent ones of said plurality of voltage variable capacitors connected between ground and the junction points between adjacent ones of said series connected inductors, adding means connected to the outputs of said phase compensation circuit and said variable phase shift circuit and means for supplying a variable D.C. voltage to said voltage variable capacitors to control their capacitance.

2. An undesired signal canceller according to claim 1, wherein said degree of coupling is designed to be around -0.2.

3. An undesired signal canceller according to claim 2, wherein each of said inductors is formed on a circuit board as a printed coil.

4. An undesired signal canceller according to claim 3, wherein adjacent ones of said inductors are formed on both sides of said circuit board such that the degree of coupling can be easily designed to the desired value.

5. An undesired signal canceller according to claim 1, wherein each of said variable capacitors is formed as a variable capacitance diode, with the capacitance value thereof being variable by a variable DC voltage applied thereto.

6. An undesired signal canceller according to claim 5, wherein said variable DC voltage is applied to each of said variable capacitance diodes from the output side of said adding circuit.

7. An undesired signal canceller according to claim 1, wherein said phase compensation circuit comprises a low pass filter network.

8. An undesired signal canceller according to claim 1 wherein said means for supplying a D.C. voltage includes a choke coil connected in circuit with said voltage variable capacitors.

9. An undesired signal canceller according to claim 8 wherein said plurality of series connected inductors are formed as printed circuits.

10. An undesired signal canceller for a radient energy receiver comprising first and second antennas spaced a distance (d) apart, a phase compensation circuit connected to said first antenna, a variable phase shift circuit connected to said second antenna, said variable phase shift circuit comprising a plurality of series connected inductors and a plurality of voltage variable capacitors with adjacent ones of said plurality of voltage variable capacitors connected between ground and the junction points between adjacent ones of said series connected inductors, adding means connected to the outputs of said phase compensation circuit and said variable phase shift circuit and means for supplying a variable D.C. voltage to said voltage variable capacitors to control their capacitance, including first and second capacitors connected at the input and output respectively of said plurality of series connected inductors, a plurality of capacitors with one connected in series between ground and each of said voltage variable capacitors, adjacent ones of said voltage variable capacitors poled to pass current in opposite directions, a first fixed bias means connected to said series connected inductors, a first variable bias means connected to the first, third and odd alternate ones of said voltage variable capacitors and a second variable bias means connected to the second, fourth and even alternate ones of said voltage variable capacitors.