UNIFIED RECEIVER STRUCTURE FOR TDS-OFDM SIGNALS AND TDS SINGLE CARRIER SIGNALS

Abstract

A receiver adapted to receive both OFDM signals and single carrier signals is provided. The receiver possesses substantially commonly shared circuitry or function blocks, except an IFT (inverse Fourier transform) block adapted a receive frequency domain signals from a channel equalizer for converting the received frequency domain signal to a time domain signal, and a bypass for bypassing the IFT.

Description

BRIEF DESCRIPTION OF THE FIGURES

The accompanying figures, where like reference numerals refer to identical or functionally similar elements throughout the separate views and which together with the detailed description below are incorporated in and form part of the specification, serve to further illustrate various embodiments and to explain various principles and advantages all in accordance with the present invention.

FIG. 1 is an example of a receiver in accordance with some embodiments of the invention.

FIG. 2 is an example of an improved receiver of FIG. 1.

FIG. 3 is an exemplified flowchart of the present invention.

Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of embodiments of the present invention.

DETAILED DESCRIPTION

Before describing in detail embodiments that are in accordance with the present invention, it should be observed that the embodiments reside primarily in combinations of method steps and apparatus components related to have a receiver combines the functions of both types of receivers (for OFDM signals, and for single carrier signals) with in a improved or simplified way. Accordingly, the apparatus components and method steps have been represented where appropriate by conventional symbols in the drawings, showing only those specific details that are pertinent to understanding the embodiments of the present invention so as not to obscure the disclosure with details that will be readily apparent to those of ordinary skill in the art having the benefit of the description herein.

In this document, relational terms such as first and second, top and bottom, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. The terms “comprises, ” “comprising,” or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. An element proceeded by “comprises . . . a” does not, without more constraints, preclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

It will be appreciated that embodiments of the invention described herein may be comprised of one or more conventional processors and unique stored program instructions that control the one or more processors to implement, in conjunction with certain non-processor circuits, some, most, or all of the functions of having a receiver combines the functions of both types of receivers (for OFDM signals, and for single carrier signals) with in a improved or simplified way described herein. The non-processor circuits may include, but are not limited to, a radio receiver, a radio transmitter, signal drivers, clock circuits, power source circuits, and user input devices. As such, these functions may be interpreted as steps of a method to perform the combining of the functions of both types of receivers (for OFDM signals, and for single carrier signals) with in a improved or simplified way. Alternatively, some or all functions could be implemented by a state machine that has no stored program instructions, or in one or more application specific integrated circuits (ASICs), in which each function or some combinations of certain of the functions are implemented as custom logic. Of course, a combination of the two approaches could be used. Thus, methods and means for these functions have been described herein. Further, it is expected that one of ordinary skill, notwithstanding possibly significant effort and many design choices motivated by, for example, available time, current technology, and economic considerations, when guided by the concepts and principles disclosed herein will be readily capable of generating such software instructions and programs and ICs with minimal experimentation.

Referring to FIG. 1, a receiver 10 for implementing a LDPC based TDS-OFDM communication system is shown. In other words, FIG. 1 is a block diagram illustrating the functional blocks of an LDPC based TDS-OFDM receiver 10. Demodulation herein follows the principles of TDS-OFDM modulation scheme. Error correction mechanism is based on LDPC. The primary objectives of the receiver 10 is to determine from a noise-perturbed system, which of the finite set of waveforms have been sent by a transmitter and using an assortment of signal processing techniques reproduce the finite set of discrete messages sent by the transmitter.

The block diagram of FIG. 1 illustrates the signals and key processing steps of the receiver 10. It is assumed the input signal 12 to the receiver 10 is a down-converted digital signal. The output signal 14 of receiver 10 is a MPEG-2 transport stream. More specifically, the RF (radio frequency) input signals 16 are received by an RF tuner 18 where the RF input signals are converted to low-IF (intermediate frequency) or zero-IF signals 12. The low-IF or zero-IF signals 12 are provided to the receiver 10 as analog signals or as digital signals (through an optional analog-to-digital converter 20).

In the receiver 10, the IF signals are converted to base-band signals 22. TDS-OFDM (Time domain synchronous-Orthogonal frequency-division multiplexing) demodulation is then performed according to the parameters of the LDPC (low-density parity-check) based TDS-OFDM modulation scheme. The output of the channel estimation 24 and correlation block 26 is sent to a time de-interleaver 28 and then to the forward error correction block. The output signal 14 of the receiver 10 is a parallel or serial MPEG-2 transport stream including valid data, synchronization and clock signals. The configuration parameters of the receiver 10 can be detected or automatically programmed, or manually set. The main configurable parameters for the receiver 10 include: (1) Sub carrier modulation type: QPSK, 16QAM, 64QAM; (2) FEC rate: 0.4, 0.6 and 0.8; (3) Guard interval: 420 or 945 symbols; (4) Time de-interleaver mode: 0, 240 or 720 symbols; (5) Control frames detection; and (6) Channel bandwidth: 6, 7, or 8 MHz.

The functional blocks of the receiver 10 are described as follows.

Automatic gain control (AGC) block 30 compares the input digitized signal strength with a reference. The difference is filtered and the filter value 32 is used to control the gain of the amplifier 18. The analog signal provided by the tuner 12 is sampled by an ADC 20. The resulting signal is centered at a lower IF. For example, sampling a 36 MHz IF signal at 30.4 MHz results in the signal centered at 5.6 MHz. The IF to Baseband block 22 converts the lower IF signal to a complex signal in the baseband. The ADC 20 uses a fixed sampling rate. Conversion from this fixed sampling rate to the OFDM sample rate is achieved using the interpolator in block 22. The timing recovery block 32 computes the timing error and filters the error to drive a Numerically Controlled Oscillator (not shown) that controls the sample timing correction applied in the interpolator of the sample rate converter.

There can be frequency offsets in the input signal 12. The automatic frequency control block 34 calculates the offsets and adjusts the IF to baseband reference IF frequency. To improve capture range and tracking performance, frequency control is done in two stages: coarse and fine. Since the transmitted signal is square root raised cosine filtered, the received signal will be applied with the same function. It is known that signals in a TDS-OFDM system include a PN sequence preceding the IDFT symbol. By correlating the locally generated PN with the incoming signal, it is easy to find the correlation peak (so the frame start can be determined) and other synchronization information such as frequency offset and timing error. Channel time domain response is based on the signal correlation previously obtained. Frequency response is taking the FFT of the time domain response.

In TDS-OFDM, a PN sequence replaces the traditional cyclic prefix. It is thus necessary to remove the PN sequence and restore the channel spread OFDM symbol. Block 36 reconstructs the conventional OFDM symbol that can be one-tap equalized. The FFT block 38 performs a 3780 point FFT. Channel equalization 40 is carried out to the FFT 38 transformed data based on the frequency response of the channel. De-rotated data and the channel state information are sent to FEC for further processing.

In the TDS-OFDM receiver 10, the time-deinterleaver 28 is used to increase the resilience to spurious noise. The time-deinterleaver 28 is a convolutional de-interleaver which needs a memory with size B*(B−1)*M/2, where B is the number of the branch, and M is the depth. For the TDS-OFDM receiver 10 of the present embodiment, there are two modes of time-deinterleavering. For mode 1, B=52, M=240, and for mode 2, B=52, M=720.

The LDPC decoder 42 is a soft-decision interative decoder for decoding, for example, a Quasi-Cyclic Low Density Parity Check (QC-LDPC) code provided by a transmitter (not shown). The LDPC decoder 42 is configured to decode at 3 different rates (i.e. rate 0.4, rate 0.6 and rate 0.8) of QC_LDPC codes by sharing the same piece of hardware. The iteration process is either stopped when it reaches the specified maximum interation number (full iteration), or when the detected error is free during error detecting and correcting process (partial iteration).

The TDS-OFDM modulation/demodulation system is a multi-rate system based on multiple modulation schemes (QPSK, 16QAM, 64QAM), and multiple coding rates (0.4, 0.6, and 0.8), where QPSK stands for Quad Phase Shift Keying and QAM stands for Quadrature Amplitude Modulation. The output of BCH decoder is bit by bit. According to different modulation scheme and coding rates, the rate conversion block combines the bit output of BCH decoder to bytes, and adjusts the speed of byte output clock to make the receiver 10's MPEG packets outputs evenly distributed during the whole demodulation/decoding process.

The BCH decoder 46 is designed to decode BCH (762, 752) code, which is the shortened binary BCH code of BCH (1023, 1013). The generator polynominal is x̂10+x̂3+1.

Since the data in the transmitter has been randomized using a pseudo-random (PN) sequence before BCH encoder (not shown), the error corrected data by the LDPC/BCH decoder 46 must be de-randomized. The PN sequence is generated by the polynomial 1+x¹⁴+x¹⁵, with initial condition of 100101010000000. The de-scrambler/de-randomizer 48 will be reset to the initial condition for every signal frame. Otherwise, de-scrambler/de-randomizer 48 will be free running until reset again. The least significant 8-bit will be XORed with the input byte stream.

The data flow through the various blocks of the modulator is as follows. The received RF information 16 is processed by a digital terrestrial tuner 18 which picks the frequency bandwidth of choice to be demodulated and then downconverts the signal 16 to a baseband or low-intermediate frequency. This downconverted information 12 is then converted to the Digital domain through an analog-to-digital data converter 20.

The baseband signal after processing by a sample rate converter 50 is converted to symbols. The PN information found in the guard interval is extracted and correlated with a local PN generator to find the time domain impulse response. The FFT of the time domain impulse response gives the estimated channel response. The correlation 26 is also used for the timing recovery 32 and the frequency estimation and correction of the received signal. The OFDM symbol information in the received data is extracted and passed through a 3780 FFT 38 to obtain the symbol information back in the frequency domain. Using the estimated channel estimation previously obtained, the OFDM symbol is equalized and passed to the FEC decoder.

At the FEC decoder, the time-deinterleaver block 28 performs a deconvolution of the transmitted symbol sequence and passes the 3780 blocks to the inner LDPC decoder 42. The LDPC decoder 42 and BCH decoders 46 which run in a serial manner take in exactly 3780 symbols, remove the 36 TPS symbols and process the remaining 3744 symbols and recover the transmitted transport stream information. The rate conversion 44 adjusts the output data rate and the de-randomizer 48 reconstructs the transmitted stream information. An external memory 52 coupled to the receiver 10 provides memory thereto on a predetermined or as needed basis.

Referring to FIG. 2, a specialized case 60 for FIG. 1 is depicted. Controller 62 tracks the type of signals transmitted via signal paths of receiver 10 and determines the type of signals transmitted therethrough. For example, controller 62 determines whether a particular signal going through channel equalizer 40 at a specific time or time period is of a type including OFDM signals or single carrier signals. The signal is channeled through inverse Fourier transformer 64 if the signal is single carrier signal. Upon transferred to the time domain by inverse Fourier transformer 64, the inversely transformed signal is subjected to time de-interleaving by time de-interleaver 28. Otherwise, controller 62 routes the signal to time de-interleaver 28 directly, thereby effectively bypassing inverse Fourier transformer 64. It should be noted that time de-interleaver 28 should be considered as inter-frame de-interleaver. Controller 62 determines the type of signal either via channel equalizer 40 or some other device 66 within receiver 10 of FIG. 1. As con be seen, sometimes the received signals may have the same bandwidth, yet the signals are of different types such a first signal being of the OFDM type and the second signal being of the single carrier type. The present invention contemplates using as many commonly shared components within receiver 10 as possible to effectively receive both types of signals.

Referring to FIG. 3, a flowchart 70 of the present invention is shown. A channel equalizer 40 is provided which may be an existing component of receiver 10 (Step 72). A determination is made as to what types of signals are currently or in the near future to be subjected to equalization (Step 74). This determination may be performed by controller 62 via channel equalizer 40 or other device 66 as the case may be. If it is determined that the signal is of a first type such as single channel type, the signals are subjected to an inverse Fourier transform into time domain (Step 76). The inversely transformed signals are then subjected to time de-interleaving (Step 78). However, if the signal is of a second type such as OFDM signals, Step 76 is skipped and the signal goes straight to time de-interleaving (Step 78).

A method and apparatus for a receiver adapted to receive both OFDM signals and single carrier signals is provided. The receiver possesses substantially commonly shared circuitry or function blocks, except an IFT (inverse Fourier transform) block adapted a receive frequency domain signals from a channel equalizer for converting the received frequency domain signal to a time domain signal, and a bypass for bypassing the IFT.

In the foregoing specification, specific embodiments of the present invention have been described. However, one of ordinary skill in the art appreciates that various modifications and changes can be made without departing from the scope of the present invention as set forth in the claims below. Accordingly, the specification and figures are to be regarded in an illustrative rather than a restrictive sense, and all such modifications are intended to be included within the scope of present invention. The benefits, advantages, solutions to problems, and any element(s) that may cause any benefit, advantage, or solution to occur or become more pronounced are not to be construed as a critical, required, or essential features or elements of any or all the claims. The invention is defined solely by the appended claims including any amendments made during the pendency of this application and all equivalents of those claims as issued.

Claims

1. A receiver adapted to receive both a first type signals and a second type signals comprising: substantially commonly shared circuitry or function blocks for the first type and the second type signal; except:an IFT (inverse Fourier transform) block adapted a receive frequency domain signals from a channel equalizer for converting the received frequency domain signal to a time domain signal; anda bypass means for bypassing the IFT.

2. The receiver of claim 1 further comprising a determining means for determining whether a received signal is an OFDM signal or a single carrier signal.

3. The receiver of claim 1, wherein the first type signals comprise TDS-OFDM signals.

4. The receiver of claim 1, wherein the second signals comprise TDS single carrier signals.

5. The receiver of claim 1, wherein the IFT (inverse Fourier transform) block comprises an IFFT (inverse fast Fourier Transform) block.

6. The receiver of claim 1, wherein the single carrier signals pass through the IFT for an inverse Fourier transform therein.

7. The receiver of claim 1, wherein the OFDM signals bypass the IFT.

8. In receiver adapted to receive both a first type signals and a second type signals, a method comprising the steps of: providing substantially commonly shared circuitry or function blocks for both first type signals and second type signals; except:providing an IFT (inverse Fourier transform) block adapted a receive frequency domain signals from a channel equalizer for converting the received frequency domain signal to a time domain signal; andproviding a bypass means for bypassing the IFT.

9. The method of claim 8 further comprising the step of determining whether a received signal is an OFDM signal or an single carrier signal.

10. The method of claim 8, wherein the first type signals comprise TDS-OFDM signals.

11. The method of claim 8, wherein the second type signals comprise TDS single carrier signals.

12. The method of claim 8, wherein the IFT (inverse Fourier transform) block comprises an IFFT (inverse fast Fourier Transform) block.

13. The method of claim 8, wherein the single carrier signals pass through the IFT for an inverse Fourier transform therein.

14. The method of claim 8, wherein the OFDM signals bypass the IFT.