The Universal Serial Bus (USB) is an industry standard interface that defines a method of connecting two units (usually a computer and a peripheral device) together and communicating between them. The USB interface on each unit contains a USB link controller (Link) and a USB physical interface circuit (PHY). To communicate, one of the units operates as a USB Host which initiates communication requests between the units, and the other operates as a USB Device which responds to those requests.
When the USB standard was developed, it was assumed that the Host and Device functions were separate and permanent, meaning that a Host unit could never function as a Device unit and vice versa.
In recent years, the USB standard was enhanced to add the possibility of a unit that can function in either Host or Device mode. That capability is known as USB On The Go or OTG. For OTG, additional circuitry is added to the Link and the PHY, an additional signal or signals are added between the PHYs, and a new protocol is defined by which the two units can automatically determine which one of them will operate in Host mode and which will operate in Device mode. This approach utilizes a different PHY, a different connector, and a different cable than that utilized by the standard USB technology.
Another approach to providing a unit with both Device and Host capability would be to provide multiple ports, including separate Host and Device ports. This approach has a disadvantage in that it requires multiple connectors, multiple ASIC pins and the like.
Needless to say, these approaches add overhead and increase the cost associated with devices that are implemented with both Host and Device functionality.
This Summary is provided to introduce subject matter that is further described below in the Detailed Description and Drawings. Accordingly, the Summary should not be considered to describe essential features nor used to limit the scope of the claimed subject matter.
In one embodiment, a USB unit comprises a mode selection module configured to determine whether the USB unit is to operate in a Host mode or a Device mode and select one of the Host mode or the Device mode; and a non-OTG USB physical interface circuit (PHY) associated with the mode selection module and configured to enable operation in a selected Host mode or Device mode.
In another embodiment, a USB unit comprises a USB OTG Link controller configured to operate in a Host mode or a Device mode; and a non-OTG USB physical interface circuit (PHY) operably connected to the USB OTG Link controller.
In another embodiment, a method comprises determining whether a USB unit is to operate in a Host or Device mode; selecting one of the Host or Device modes; and operating the USB in a selected mode using a non-OTG physical interface circuit (PHY).
In another embodiment, a system comprises means for determining whether a USB unit is to operate in a Host or Device mode; means for selecting one of the Host or Device modes; and means for operating the USB in a selected mode using a non-OTG physical interface circuit (PHY).
The same numbers are used throughout the drawings to reference like features.
Various embodiments provide a USB interface that can operate in either a Host or Device mode using standard Link and/or physical interface circuit (PHY) components which, in at least some embodiments, do not have additional circuitry that is conventionally utilized to implement the USB OTG standard.
In the discussion that follows, a section entitled “Operating Environment” is provided and describes one example operating environment in which one or more embodiments can be employed. Following this, a section entitled “Multiplexed Link Controllers” describes one example embodiment in which a Host Link and a Device Link can be multiplexed into a standard USB PHY to provide OTG functionality. Next, a section entitled “OTG Link with Standard PHY” describes an embodiment in which an OTG Link is utilized in connection with a standard USB PHY to operate in a desired mode. Following this, a section entitled “Software/Hardware Hybrid Interface” describes an embodiment in which at least some of the Link controller and/or at least some of the PHY are implemented in software such that parts of the interface that are different between the Host mode and Device mode are implemented in software and can thus be changed as desired to switch between modes. Next, a section entitled “Example Methods” describes example methods in accordance with one or more embodiments. Last, a section entitled “Example USB Units” describes some example USB units that can employ the techniques described below.
Operating Environment
In the illustrated and described embodiments, the USB units 102, 104 can utilize a USB interface to exchange data. In at least some embodiments, each of the USB units 102, 104 is configured or configurable as a USB Host or a USB Device. Accordingly, each of the USB units 102, 104 can, in at least some embodiments, operate in either a Host mode or a Device mode using standard Link and/or PHY components which do not have the additional circuitry that is utilized to implement the USB OTG standard. Yet, by virtue of the configuration of the USB units, each can implement both Host and Device functionality as will become apparent below. Accordingly, each USB unit 102, 104 can include a mode selection module 106 and a USB PHY 108, such as those shown for USB unit 102. In the illustrated example, mode selection module 106 is configured to determine and select a particular mode, such as Host mode or Device mode, and then interact with USB PHY 108 to effect operation of the USB unit 102 in the selected mode. In at least some embodiments, USB PHY 108 is a non-OTG PHY meaning that it is not compliant with the USB OTG standard. The mode selection module 106 can be implemented in connection with any suitable hardware, software, firmware or combination thereof, examples of which are provided below.
Having described an example operating environment, consider now a discussion of various embodiments that can provide Host and Device functionality. At least some of the embodiments described below can utilize a single USB port with a standard PHY that can enable a USB unit to operate in either the Host mode or the Device mode.
Multiplexed Link Controllers
In the illustrated and described embodiment, USB unit 202 includes a USB application 206, a USB Host Link 208, a USB Device Link 210, a switch 212 and a USB PHY 214. In this example, a mode selection module can include one or more of the USB application 206, the USB Host Link 208, the USB Device Link 210, or the switch 212. Switch 212 can be embodied as any suitable type of switch. In at least some embodiments, switch 212 is implemented as a multiplexer. USB application 206 is operably connected or connectable to USB Host and Device Links 208, 210 respectively, as well as to switch 212. USB Host Link 208 and USB Device Link 210 are operably connected or connectable to switch 212. Switch 212 is operably connected or connectable to USB PHY 214 as shown.
In this example, USB Host Link 208 and USB Device Link 210 constitute separate link controllers that are non-OTG link controllers. Specifically, by being non-OTG link controllers, the link controllers are not specifically configured with OTG functionality. Further, the USB PHY 214 is a standard, non-OTG USB PHY that is not specifically configured with OTG functionality. In this example, switch 212 is configured by USB application 206 to selectively connect either USB Host Link 208 or USB Device Link 210 to USB PHY 214 depending on the desired mode of operation. For example, if USB unit 202 is to operate in the Host mode, USB application 206 selects the USB Host Link 208 via switch 212. Alternately, if USB unit 202 is to operate in the Device mode, USB application 206 selects the USB Device Link 210 via switch 212. By selecting a particular Link, the switch 212 enables a communication link with USB PHY 214 so that the USB unit 202 can operate in the selected mode.
In at least some embodiments, the USB Host link 208, USB Device Link 210, switch 212 and USB PHY 214 can be implemented by an integrated circuitry chip that is able to be pre-configured into a particular mode, e.g., Host mode or Device mode. This permits flexibility in the design of the integrated circuitry chip by enabling either mode to be selected at some point after manufacture of the integrated circuitry chip.
In at least some other embodiments, USB unit 202 can be configured to switchably alternate, in a dynamic fashion, between the Host mode and the Device mode. Such might be the case, for example, when one of the devices is a portable device, such as a PDA or hand-held device, whose role may change. In these embodiments, USB unit 204 may be compliant with OTG technology if some other unit within USB unit 202, other than USB Host Link 208, USB Device Link 210, and USB PHY 214, provides the additional functionality required for OTG compliance. Such other unit can include the USB application. To accomplish switching in a dynamic fashion, a signal can be provided by a component, such as USB application 206, to switch 212 to enable switch 212 to select a particular mode. In this embodiment, both the USB Host Link 208 and USB Device Link 210 can be standard hardware components. The switch 212 enables mode switching at times other than manufacture time such as, by way of example and not limitation, at power up or more frequently during operation.
To accomplish switching in the manner described above, the component or USB application 206 is knowledgeable of OTG-related protocols and can act on OTG-related communications to effect a mode switch. Examples of OTG-related protocols include Host Negotiation Protocol (HNP) and Session Request Protocol (SRP). HNP describes a way for two USB units to communicate with one another to decide which unit is going to act as a Host and which unit is going to act as a Device. SRP deals with a negotiation protocol in which, in some examples, devices can conserve battery power by shutting off their buses and ascertaining when to wake up and communicate with other devices.
OTG Link with Standard PHY
In the illustrated and described embodiment, USB unit 302 includes a USB application 306, a USB OTG Link 308, and a USB PHY 310. In this example, a mode selection module can include one or more of the application 306 or the USB OTG Link 308. USB application 306 is operably connected or connectable to USB OTG Link 308. In the illustrated example, the connection between USB application 306 and USB OTG Link 308 entering to the right side of the USB OTG Link 308 represents additional signals that the USB OTG link 308 requires to operate with an OTG PHY but which the non-OTG PHY does not have. In this embodiment, those signals are observed and/or controlled by the USB application 306 so that the USB application 306 provides the additional PHY functionality that is not provided by the non-OTG PHY. The USB OTG Link 308 is operably connected or connectable to USB PHY 310. In this example, USB OTG Link 308 is OTG-compliant, meaning that the Link 308 is configured to operate in the Host mode or the Device mode, as well as implement other aspects of OTG functionality. However, USB application 306 is configured to control the USB OTG Link 308 so that it can communicate with a standard, non-OTG USB PHY 310 and use a standard USB cable for the connection between USB units 302, 304. Details of how the control actually occurs can depend on the specifics of the USB OTG Link 308. For instance, a USB OTG Link 308 which includes control registers for switching modes may need the application to perform some register writes to set the USB OTG Link 308 in a different mode. A USB OTG Link 308 with less invasive control capability may require the application to control signals (via the USB application-to-USB OTG Link connection on the right) to emulate portions of the OTG protocol involved in changing modes, e.g., emulating an OTG identification pin to set a particular mode. Other paradigms are possible also.
In the above-described embodiment, communication between the USB OTG Link 308 and the USB PHY 310 takes place using standard USB communication protocols. That is, once a particular mode is selected via the USB OTG Link 308, communication in that particular mode with the USB PHY 310 takes place using standard USB communication protocols. In this case, OTG-specific communication, such as HNP or SRP communication, happens between the USB application 306 or some other component and the USB OTG Link 308.
In this embodiment, and by virtue of using the USB OTG Link 308, less circuitry is required to be employed than in the embodiment described just above. Specifically, because only one Link circuit 308 is used, the additional Link circuitry (208 or 210) utilized in the above-described embodiment can be eliminated. In addition, improvements over standard OTG systems can include the use of a less complex standard USB PHY, rather than a more complex OTG-compliant PHY. Further, standard USB cables and standard USB signals can be utilized while avoiding the additional overhead needed for OTG signaling.
In the illustrated and described embodiment, the USB application 306 can be implemented as any suitable USB application including, by way of example and not limitation, a host software driver, a device software driver, or a driver that functions as both host and device driver.
In at least some embodiments, the USB OTG Link controller 308 and USB PHY 310 can be implemented by an integrated circuitry chip that is pre configurable into a particular mode, e.g., Host mode or Device mode. This permits flexibility in the design of the integrated circuitry chip by enabling either mode to be selected at some point after manufacture of the integrated circuitry chip.
In at least some other embodiments, USB unit 302 can be configured to switchably alternate, in a dynamic fashion, between the Host mode and the Device mode. In these embodiments, USB unit 304 may be compliant with OTG technology if some other unit within USB unit 302, other than USB OTG Link 308 and USB PHY 310, provides the additional functionality required for OTG compliance. Such other unit can include the USB application 306.
Software/Hardware Hybrid Interface
In the illustrated and described embodiment, USB unit 402 includes a USB application 406, a USB link 408, a USB PHY 410, and Link/PHY software 412 embodied on a tangible computer-readable medium. In this example, a mode selection module can include one or more of the USB application 406, the USB link 408, the USB PHY 410, and the Link/PHY software 412. In at least some embodiments, at least some of the functionality performed by USB link 408 and/or USB PHY 410 can be implemented in software by Link/PHY software 412. For example, portions of the USB link 408 and USB PHY 410 that are different as between the Host and Device modes can be implemented in software and can thus be changed as desired. Specifically, those portions of the USB link 408 and USB PHY 410 that are specific to the Host and/or Device modes can be implemented by Link/PHY software 412. In one example, the USB link 408, USB PHY 410, and Link/PHY software 412 together provide all the control and configuration so that together they provide a USB interface capable of operating in either mode so that collectively, they appear as a true OTG interface to a standard OTG-capable application. The application then operates as if a real OTG link and OTG PHY were present. For example, the Link/PHY software 412 can, in some embodiments, vary the signal levels on the USB D+ and D− wires or activate additional pull-down resistors on the D+ and D− wires when the USB application 406 activates the Host mode on the application-link interface. Alternately or additionally, the Link/PHY software 412 can, in some embodiments, activate additional, non-standard functionality in the USB Link 408 or USB PHY 410 that is utilized to switch modes.
In another example, USB application 406 can be either Host- or Device-capable, but not OTG capable. Alternately or additionally, there may be two independent USB applications, one of which is a pure Host application and the other of which is a pure Device application. Either one of these applications can run depending on the particular mode. In either case, the Link/PHY software 412, USB Link 408, and USB PHY 410 act either purely as a Host or Device, depending on the mode.
In at least some embodiments, the Link/PHY software 412 can handle transaction-level protocol. For example, a USB Out transaction is comprised of, in general, an Out token (from Host to Device), a data packet (from Host to Device), and a handshake (from Device to Host). This transaction is used to send data from a Host to a Device. A USB In transaction is comprised of, in general, an In token (from Host to Device), a data packet (from Device to Host), and a handshake (from Host to Device). This transaction is used to send data from a Device to a Host. When operating in Host mode, the Link/PHY software 412 initiates the Out token including maintaining knowledge of a target device's address, target endpoint number, communications capabilities and the like. The Link/PHY software 412 then initiates building and transmitting a data packet, waits for a handshake, and processes associated results accordingly. However, when operating in Device mode, the Link/PHY software 412 detects an incoming In token, then initiates the building and transmitting of a data packet, waits for a handshake, and processes those results accordingly. In both cases, the process of sending data is similar and is composed of similar smaller operations. However, the overall flow is somewhat different. Specifically, the Host decides what actions to take and then initiates those actions, while the Device waits for a request from the Host and then acts on the request. In these instances, the Device can transmit ACK, NAK, and NYET handshakes, while the Host only sends an ACK. In this embodiment, all of these differences are implemented by the Link/PHY software 412. Common features such as building and transmitting packets are implemented in hardware, while the high-level protocol control is implemented in software.
Using Link/PHY software 412 as described above can simplify the design of the USB link 408 and/or the USB PHY 410. Specifically, in at least some embodiments, the design of the USB link 408 and/or the USB PHY 410 can be modified to include those components that are common to the Host and Device modes. Such components can include, by way of example and not limitation, a phase-locked loop (PLL), a serializer/deserializer (SERDES), data encoding and decoding circuits, data buffers, current source circuits, voltage reference circuits, and the like. Further, in at least some embodiments many of the protocol components can be implemented in hardware as well. These protocol components include, by way of example and not limitation, NRZI encoding components, bit stuffing components, CRC generation and checking components, packet formation and stripping components, address/endpoint management components, status generation and tracking components, and the like.
Example Methods
Step 500 determines whether a USB unit is to operate in a Host or a Device mode. This step can be performed in any suitable way. For example, a USB unit might select Host or Device mode based on a choice by the user, e.g. a button press. Alternately or additionally, the USB unit can passively monitor the signaling which another USB unit presents on VBUS, D+, and D− after the USB cable is connected, determine if the other USB unit is acting as a Host or Device, and then choose the alternate mode to allow for communication (e.g., choose Host mode if the other unit is acting in the Device mode and vice versa). Alternately or additionally, the USB unit can actively drive Host signaling onto the USB interface after connection, determine if the other USB unit responds, and if not then select the other mode. Alternately or additionally, mode selection can also be based on the USB connection. For example, OTG utilizes an ID pin in the connector to tell whether the unit is connected as a Host or Device. External hardware, such as a controller, can read the state of a pin, where the pin could be tied high to select one mode and tied low to select the other mode. Mode selection can also be implemented using internal hardware such as an internal ROM or fuse bit, or through embedded software that uses a value programmed into boot ROM.
Step 502 selects one of the Host or Device modes. This step can be performed in any suitable way examples of which are provided just above. For example, a particular mode can be selected under the influence of a USB application executing on the USB unit. In the
Having selected a particular mode, step 504 operates the USB unit in a selected mode using a non-OTG PHY.
Step 600 determines whether a USB unit is to operate in a Host or a Device mode. This step can be performed in any suitable way examples of which are provided above.
Step 602 selects one of the Host or Device modes. This step can be performed in any suitable way. For example, a particular mode can be selected under the influence of a USB application executing on the USB unit.
Step 604 operates the USB unit in a selected mode using one or more of a non-OTG modified link or a non-OTG modified PHY. In the example of
Having considered some example methods, consider now a discussion of some example USB units.
Example USB Units
It is to be appreciated and understood that the example devices illustrated in
Various embodiments described above provide a USB interface that can operate in either a Host or Device mode using standard Link and/or physical interface circuit (PHY) components which, in at least some embodiments, do not have additional circuitry that is utilized to implement the USB OTG standard. The various embodiments described above can permit, in at least some instances, less expensive and more reliable standard non-OTG components to be utilized. This can mitigate concerns associated with particular OTG components which, as of this time, are relatively new and not as widely available as the non-OTG components. Further, some applications may require Host or Device capability, but may not need additional OTG features such as on-the-fly role switching. In these instances, the various embodiments can enable such applications to operate without extraneous hardware and/or software overhead.
In addition, OTG requires measurement and control of different voltages than are required for use by standard USB. Typically, this means that the PHY requires an additional supply voltage and additional analog drive and sensing circuitry. Further, OTG may require more complex protection from over-voltage and transients as well. In at least some embodiments described above, additional voltage supplies, protections, and other circuitry beyond that used in standard USB is not required.
Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described above. Rather, the specific features and acts described above are disclosed as example forms of implementing the claims.
This application claims priority to U.S. Provisional Application No. 61/050,808, filed on May 6, 2008, the disclosure of which is incorporated by reference herein.
Number | Name | Date | Kind |
---|---|---|---|
4611299 | Hori et al. | Sep 1986 | A |
4823340 | Grassman et al. | Apr 1989 | A |
5260905 | Mori | Nov 1993 | A |
5307343 | Bostica et al. | Apr 1994 | A |
5440523 | Joffe | Aug 1995 | A |
5680595 | Thomann et al. | Oct 1997 | A |
5719890 | Thomman et al. | Feb 1998 | A |
5778007 | Thomann et al. | Jul 1998 | A |
5802131 | Morzano | Sep 1998 | A |
5815447 | Thomann | Sep 1998 | A |
5875470 | Dreibelbis et al. | Feb 1999 | A |
5953340 | Scott et al. | Sep 1999 | A |
5996051 | Mergard | Nov 1999 | A |
6021086 | Joffe et al. | Feb 2000 | A |
6034957 | Haddock et al. | Mar 2000 | A |
6067301 | Aatresh | May 2000 | A |
6081528 | Thomann | Jun 2000 | A |
6115389 | Mahale et al. | Sep 2000 | A |
6160814 | Ren et al. | Dec 2000 | A |
6167491 | McAlpine | Dec 2000 | A |
6216205 | Chin et al. | Apr 2001 | B1 |
6230191 | Walker | May 2001 | B1 |
6370624 | Ajanovic et al. | Apr 2002 | B1 |
6446173 | Pham | Sep 2002 | B1 |
6487207 | Thomann | Nov 2002 | B1 |
6535939 | Arimilli et al. | Mar 2003 | B1 |
6535963 | Rivers | Mar 2003 | B1 |
6539488 | Tota et al. | Mar 2003 | B1 |
6618390 | Erimli et al. | Sep 2003 | B1 |
6712704 | Elliott | Mar 2004 | B2 |
6714643 | Gargeya et al. | Mar 2004 | B1 |
6732184 | Merchant et al. | May 2004 | B1 |
6741589 | Sang et al. | May 2004 | B1 |
6785272 | Sugihara | Aug 2004 | B1 |
7039781 | Iwata et al. | May 2006 | B2 |
7068651 | Schmidt et al. | Jun 2006 | B2 |
7099325 | Kaniz et al. | Aug 2006 | B1 |
7130308 | Haddock et al. | Oct 2006 | B2 |
7136953 | Bisson et al. | Nov 2006 | B1 |
7149834 | Peters et al. | Dec 2006 | B2 |
7185132 | Tang | Feb 2007 | B2 |
7197591 | Kwa et al. | Mar 2007 | B2 |
7249270 | Mansell et al. | Jul 2007 | B2 |
7329136 | Su et al. | Feb 2008 | B2 |
7334072 | Wright | Feb 2008 | B1 |
7447824 | Jabori et al. | Nov 2008 | B2 |
7451280 | Furtek et al. | Nov 2008 | B2 |
7469311 | Tsu et al. | Dec 2008 | B1 |
7478188 | Patton | Jan 2009 | B2 |
7480757 | Atherton et al. | Jan 2009 | B2 |
7480808 | Caruk et al. | Jan 2009 | B2 |
7496707 | Freking et al. | Feb 2009 | B2 |
7536490 | Mao | May 2009 | B2 |
7539809 | Juenger | May 2009 | B2 |
7571287 | Lee et al. | Aug 2009 | B2 |
7583600 | Schanke et al. | Sep 2009 | B1 |
7606960 | Munguia | Oct 2009 | B2 |
7624221 | Case | Nov 2009 | B1 |
7660925 | Larson et al. | Feb 2010 | B2 |
7685322 | Bhesania et al. | Mar 2010 | B2 |
7689753 | Kwak et al. | Mar 2010 | B2 |
7752342 | Tee et al. | Jul 2010 | B2 |
7949817 | Sakarda | May 2011 | B1 |
8205028 | Sakarda | Jun 2012 | B1 |
8234425 | Milner | Jul 2012 | B1 |
8335878 | Lee | Dec 2012 | B2 |
20010036116 | Kubo et al. | Nov 2001 | A1 |
20030154314 | Mason, Jr. et al. | Aug 2003 | A1 |
20040093389 | Mohamed et al. | May 2004 | A1 |
20040193774 | Iwata et al. | Sep 2004 | A1 |
20040202192 | Galbi et al. | Oct 2004 | A9 |
20050008011 | Georgiou et al. | Jan 2005 | A1 |
20050268001 | Kimelman et al. | Dec 2005 | A1 |
20060031628 | Sharma | Feb 2006 | A1 |
20060075144 | Challener et al. | Apr 2006 | A1 |
20060106962 | Woodbridge et al. | May 2006 | A1 |
20070002880 | Chien et al. | Jan 2007 | A1 |
20080148083 | Pesavento et al. | Jun 2008 | A1 |
20080215773 | Christison et al. | Sep 2008 | A1 |
20080215774 | Kim et al. | Sep 2008 | A1 |
20080265838 | Garg et al. | Oct 2008 | A1 |
20080320189 | Arssov | Dec 2008 | A1 |
20090200982 | Hurtz | Aug 2009 | A1 |
Number | Date | Country |
---|---|---|
2779843 | Dec 1999 | FR |
1162294 | Jun 1989 | JP |
4061094 | Feb 1992 | JP |
5047174 | Feb 1993 | JP |
10506776 | Jun 1998 | JP |
2004288355 | Oct 2004 | JP |
5107204 | Oct 2012 | JP |
Entry |
---|
“Final Office Action”, U.S. Appl. No. 12/163,801, (Nov. 14, 2011), 12 pages. |
“Final Office Action”, U.S. Appl. No. 12/494,076, (Oct. 3, 2011), 13 pages. |
“Non-Final Office Action”, U.S. Appl. No. 13/092,734, (Aug. 24, 2011), 15 pages. |
“Foreign Office Action”, Japanese Application No. 2008-270813, (Apr. 3, 2012), 6 pages. |
“Notice of Allowance”, U.S. Appl. No. 12/494,076, (Aug. 2, 2012), 8 pages. |
“Final Office Action”, U.S. Appl. No. 13/092,734, (Dec. 29, 2011), 6 pages. |
“Notice of Allowance”, U.S. Appl. No. 12/163,801, (Mar. 22, 2012), 6 pages. |
“Notice of Allowance”, U.S. Appl. No. 13/092,734, (Feb. 23, 2012), 4 pages. |
“6-Port Fast Ethernet Switch, 88E6060 (Product Overview)”, Link Street; www.marvell.com; Marvell Semiconductor, Inc.; Sunnyvale, CA, (2002) ,2 pgs. |
“7-Port Fast Ethernet Switch with 802.1 Q, 88E6063 (Product Overview)”, www.marvell.com; Marvell Semiconductor, Inc.; Sunnyvale, CA, (2002), 2 pgs. |
“Advisory Action”, U.S. Appl. No. 10/702,744, (Sep. 11, 2007), 3 pages. |
“Advisory Action”, U.S. Appl. No. 12/163,801, (Jan. 24, 2011), 2 pages. |
“European Communication and Search Report”, Application No. EP04006012; European Patent Office; Munich, Germany, (May 30, 2005), 4 pgs. |
“European Search Report”, Application No. EP04006012; Munich, Germany, (May 30, 2005), 4 pages. |
“Final Office Action”, U.S. Appl. No. 10/702,744, (Jun. 25, 2007), 13 pages. |
“Final Office Action”, U.S. Appl. No. 12/163,801, (Oct. 14, 2010), 12 pages. |
“Final Office Action”, U.S. Appl. No. 12/182,014, (Oct. 29, 2010), 16 pages. |
“Final Office Action”, U.S. Appl. No. 12/494,076, (Mar. 30, 2011), 13 pages. |
“Foreign Office Action”, Japanese Application No. 2004-071574, (Feb. 19, 2008), 4 pages. |
“Foreign Office Action”, Japanese Application No. 2008-270813, (May 26, 2011), 4 pages. |
“Information Technology—Telecommunications and Information Exchange Between Systems—Local and Metropolitan Area Networks—Specific Requirements”, IEEE, Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) Specifications,(Aug. 20, 1999), 531 pages. |
“Link Street 88E6063 7-Port Fast Ethernet Switch wih QoS, 802.1Q VLAN, and Virtual Cable Tester (VCT) Technology”, Marvell: News; www.marvell.com; Marvell Semiconductor, Inc.; Sunnyvale, CA, (Jul. 14, 2003), 1 page. |
“Link Street 88E6181 8-Port Gigabit Ethernet Switch with Four-Level QoS”, Marvell: News; www.marvell.com; Marvell Semiconductor, Inc.; Sunnyvale, CA, (Jul. 14, 2003), 1 page. |
“Link Street, Integrated Gateway Router with Multi-Port QoS Switch 88E6218 (Product Overview)”, Gateway Solutions; www.marvell.com; Marvell Semiconductor, Inc.; Sunnyvale, CA, (2003), 2 pgs. |
“Link Street, Integrated Gateway Router with Multi-Port Switch, 88E6208 (Product Overview)”, Gateway Solutions; www.marvell.com; Marvell Semiconductor, Inc.; Sunnyvale, CA, (2003), 2 pgs. |
“Marvell Link Street Gigabit Ethernet Switches Enable the Rapid Deployment of Gigabit Connectivity for the SOHO Market”, Marvell: Press and Investor News; Marvell Semiconductor, Inc.; Sunnyvale, CA; http://www.marvell.com/press/pressNewsDisplay.do?releaseID=347, (Apr. 29, 2003), 2 pgs. |
“Method and Circuit for Transferring Data with Dynamic Party Generation and Checking Scheme in Multi-port DRAM”, esp@cenet; Publication No. JP10506776T (Abstract of Corresponding Document No. US5778007); esp@cenet Database—Worldwide; http://v3.espacenet.com/textdoc?DB=EPODOC&IDX=JP10506776T&F=0, (Jun. 30, 1998), 5 pages. |
“Multiport Component Memory Series and Application with a Computer”, Automated Translation; Europaisches Patentamt, European Patent Office, Office European Des Brevets; Description of FR2779843; World Lingo Language Translation Services;.www.worldlingo.com, (Nov. 19, 20007), 15 pgs. |
“Non-Final Office Action”, U.S. Appl. No. 12/182,014, (Jun. 1, 2010), 13 pages. |
“Non-Final Office Action”, U.S. Appl. No. 10/702,744, (Feb. 19, 2009), 5 pages. |
“Non-Final Office Action”, U.S. Appl. No. 10/702,744, (Dec. 27, 2006), 10 pages. |
“Non-Final Office Action”, U.S. Appl. No. 12/163,801, (Apr. 22, 2010), 10 pages. |
“Non-Final Office Action”, U.S. Appl. No. 12/163,801, (Jul. 20, 2011), 11 pages. |
“Non-Final Office Action”, U.S. Appl. No. 12/436,577, (Sep. 29, 2010), 6 pages. |
“Non-Final Office Action”, U.S. Appl. No. 12/494,076, (Dec. 22, 2010), 12 pages. |
“Notice of Allowance”, U.S. Appl. No. 10/702,744, (Mar. 27, 2009), 7 pages. |
“Notice of Allowance”, U.S. Appl. No. 12/182,014, (Jan. 20, 2011), 6 pages. |
“Notice of Allowance”, U.S. Appl. No. 12/436,577, (Apr. 14, 2011), 4 pages. |
“Partial European Search Report”, Application No. EP04006012; European Patent Office, Munich, Germany, (Mar. 14, 2005), 2 pgs. |
“Restriction Requirement”, U.S. Appl. No. 10/702,744, (Jun. 30, 2006), 5 pages. |
Litaize, Daniel et al., “Serial Multi Port Memory Component Comprising RAM Memory Bank Assemblies for Use in Computer”, Abstract of FR2779843; Publication No. FR2779843; esp@cenet database;.http://v3.espace.com/textdoc?DB=EPODOC&IDX=FR2779843&F=0, (Dec. 12, 1999), 1 page. |
Mori, Toshiki “Multiport Memory”, English Abstract of Japanese Patent Publication No. JP5047174; esp@cenet database—Worldwide, (Feb. 26, 1993), 1 page.kp5rjaq |
Pallampati, Amarnath “iSCSI Performance Over RDMA-Enabled Network”, Thesis, Department of Electrical and Computer Engineering, Graduate School of Wichita State University, (Jul. 2006), 58 pages. |
Prince, Betty “High Performance Memories, New Architectures DRAMs and SRAMs—Evolution and Function”, John Wiley & Sons, Ltd.; West Sussex, England, (1996), pp. 58-61. |
“Foreign Notice of Allowance”, Japanese Application No. 2008-270813, Aug. 31, 2012, 7 pages. |
“Non-Final Office Action”, U.S. Appl. No. 13/045,186, Aug. 22, 2013, 12 pages. |
“Restriction Requirement”, U.S. Appl. No. 13/045,186, Jun. 19, 2013, 5 pages. |
“Notice of Allowance”, U.S. Appl. No. 13/716,481, Nov. 14, 2013, 13 pages. |
“Notice of Allowance”, U.S. Appl. No. 13/045,186, Nov. 1, 2013, 9 pages. |
Number | Date | Country | |
---|---|---|---|
61050808 | May 2008 | US |