USB power converter with bleeder circuit for fast correction of output voltage by discharging output capacitor

Information

  • Patent Grant
  • 10063073
  • Patent Number
    10,063,073
  • Date Filed
    Wednesday, May 21, 2014
    10 years ago
  • Date Issued
    Tuesday, August 28, 2018
    5 years ago
Abstract
A universal serial bus (USB) charger provides power to a client device. A USB connector interfaces with a client device and receives a request for the output voltage of the USB charger to be at a specific value. If the requested voltage level is lower than the current output voltage level, the output voltage level is set to the requested level and a bleeder circuit is enabled to discharge the output capacitor of the USB charger.
Description
BACKGROUND

1. Field of Art


The disclosure generally relates to the field of universal serial bus (USB) chargers, and specifically to providing multiple charging voltages for faster charging.


2. Description of the Related Art


Universal serial bus (USB) is a connection standard used that can be used to interconnect multiple computing devices (e.g., a personal computer, a smartphone) and peripherals (e.g., a mouse, a keyboard, a camera) to each other. In addition to being able to connect computing devices and peripherals, a USB connector can also be used to deliver power. For instance, a USB connector may be used to provide power to charging the battery of mobile devices. Power can be provided from a host computing device or by a dedicated power supply (e.g., a charger).


When charging the battery of a mobile device, the charging speed is limited by the voltage and current provided through the USB connector. Current USB chargers only output a voltage of 5V, as specified by the USB standard, when delivering power to a mobile device. This greatly limits the speed of charging the mobile device.


Thus, it would be advantageous to be able to deliver an output voltage at a higher voltage level, in addition to the voltage specified by the USB standard, upon request from the mobile device for increasing the charging speed of the mobile device.


SUMMARY

A universal serial bus (USB) charger provides power to a client device. A USB connector interfaces with a client device and receives a request for the output voltage of the USB charger to be at a specific value. If the requested voltage level is lower than the current output voltage level, the output voltage level is set to the requested level and a bleeder circuit is enabled to discharge the output capacitor of the USB charger.


The features and advantages described in the specification are not all inclusive and, in particular, many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings and specification. Moreover, it should be noted that the language used in the specification has been principally selected for readability and instructional purposes, and may not have been selected to delineate or circumscribe the inventive subject matter.





BRIEF DESCRIPTION OF DRAWINGS

The disclosed embodiments have other advantages and features which will be more readily apparent from the detailed description, the appended claims, and the accompanying figures (or drawings). A brief introduction of the figures is below.



FIG. 1 illustrates an illustration of a universal serial bus (USB) connector.



FIG. 2 illustrates a circuit diagram of a USB charger that is capable of providing an output voltage at multiple voltage levels, according to one embodiment.



FIGS. 3A, 3B, 3C, 3D, and 3E illustrate five different embodiments of a bleeder circuit, according to one embodiment.



FIG. 4A illustrates a graph of the output voltage of the USB charger using the bleeder circuit of FIG. 3A, according to one embodiment.



FIG. 4B illustrates a graph of the output voltage of the USB charger using the bleeder circuit of FIG. 3B or FIG. 3C, according to one embodiment.



FIG. 5 illustrates a flow diagram for providing an output voltage at multiple levels, according to one embodiment.





DETAILED DESCRIPTION

The figures (FIGS.) and the following description relate to preferred embodiments by way of illustration only. It should be noted that from the following discussion, alternative embodiments of the structures and methods disclosed herein will be readily recognized as viable alternatives that may be employed without departing from the principles of what is claimed.


Reference will now be made in detail to several embodiments, examples of which are illustrated in the accompanying figures. It is noted that wherever practicable similar or like reference numbers may be used in the figures and may indicate similar or like functionality. The figures depict embodiments of the disclosed system (or method) for purposes of illustration only. One skilled in the art will readily recognize from the following description that alternative embodiments of the structures and methods illustrated herein may be employed without departing from the principles described herein.


Universal Serial Bus (USB) Charger



FIG. 1 is an illustration of a universal serial bus (USB) connector. The USB connector 100 allows communication between two devices, such as a computer and a peripheral device. Additionally, USB connectors can also be used to provide energy to the peripheral device. USB connector 100 includes first terminal 111, second terminal 113, third terminal 115 and fourth terminal 117. Even though specific embodiments are described using a USB connector, other types of connectors that are capable of providing energy to a peripheral device may also be used.


In some embodiments, first terminal 111 and fourth terminal 117 are used for transferring power and second terminal 113 and third terminal 115 are used for transferring data. For instance, first terminal 111 may be used for transferring a supply voltage (e.g. Vdd) and fourth terminal 117 may be used for transferring a ground reference voltage (GND). Additionally, second terminal 113 may be used for transferring a differential data signal at plus or positive side and the third terminal 115 may be used for transferring a differential signal at minus or negative side.


In some embodiments, other types of USB connectors may be used instead of the one illustrated in FIG. 1. For example, a mini-USB or a micro-USB connector may be used instead of the USB connector of FIG. 1.



FIG. 2 is a circuit diagram of a USB charger 200 that is capable of providing an output voltage at different voltage levels. In one embodiment, the USB charger 200 is capable of supplying an output voltage (Vout) at two different voltage levels. For instance, the USB charger 200 may be able to supply an output voltage of 5V for normal USB charging, and may also be able to supply an output voltage of 12V for an accelerated USB charging. In other embodiments, the USB charger 200 is capable of supplying an output voltage Vout at more than two different voltage levels.


In one embodiment, if no client device is connected to the USB charger 200, the USB charger outputs the lower voltage level (e.g., 5V). When a device is disconnected from the USB charger 200, and the output voltage level of the USB charger is not at the lower level when the client device is disconnected, the USB charger 200 lowers the output voltage to the lower voltage level.


USB charger 200 includes a USB connector 100, a bleeder circuit 203, an output voltage controller 205, and a charger controller 207. USB connector 100 allows the client device to receive power from the USB charger 200.


The output voltage controller 205 receives a signal from the client device 201 indicating which output voltage level the client device 201 can accept and sends a signal to the controller 207 to generate the desired output voltage. In some embodiments, the output voltage controller 205 senses the output voltage level of the USB charger 200 and determines an error value between the voltage level requested by the client device and the output voltage level of the USB charger 200. This error value may be provided to the controller 207 to produce the desired output voltage Vout. If the client device 201 requests an output voltage Vout lower than the voltage level currently being outputted by the USB charge 200, the output voltage controller 205 may turn on and off bleeder 203 to decrease the output voltage level to the value requested by the client device 201. In some embodiments, the current voltage controller 205 senses the output voltage Vout and turns off the bleeder 203 when the output voltage reaches the value requested by the client device 201.


Bleeder 203 creates a discharging path for output capacitor (Cout) to discharge. When the client device 201 requests for an output voltage level, lower than the current voltage level being outputted by the USB charger 200, the bleeder 203 is turned on by the output voltage controller 205 and the charge stored in the output capacitor Cout is discharged, thus lowering the voltage of the output of the USB charger 200. Different embodiments of the bleeder 203 are illustrated in FIGS. 3A, 3B, and 3C. In some embodiments, the bleeder is turned on when a client device is disconnected and the output voltage of the USB charger is not at a lower voltage level (e.g. at 5V).


Controller 207 receives a V_OUT SETTING signal from the output voltage controller 205 and turns on and off transistor T1 accordingly. In some embodiments, the V_OUT SETTING signal is an error value between the output voltage level of the USB charger 200 and the voltage level requested by the client device 201. In other embodiments, the V_OUT SETTING signal may be a signal indicating which output voltage level to generate. For instance, the V_OUT SETTING may be a digital signal indicating that the client device requested a first voltage level (e.g. 5V) or a second voltage level (e.g. 12V). While in the specific embodiment of FIG. 2, the controller 207 controls the primary side of the USB charger 200, in some embodiments, other configurations that regulate the output voltage of the USB charger 200 may use the controller 207 to control the secondary side of the USB charger 200.



FIGS. 3A, 3B, 3C. 3D, and 3E illustrate five different embodiments of the bleeder 203. The bleeder of FIG. 3A includes resistor R1 and switch S1. In some embodiments, R1 is a physical resistor. In other embodiments, R1 is a resistance of switch S1 when switch S1 is closed. In yet other embodiments, resistor R1 includes the resistance of a physical resistor and a resistance of switch S1 when switch S1 is closed. Switch S1 is controlled by output voltage controller 205. When switch S1 is closed, a discharging path for Cout is created through R1. The discharging speed of Cout can be determined based on the value of the resistance of resistor R1. For instance, the output voltage may be










V
out

=


V
0



e

-

t


C
out

×
R





1









(
1
)








where V0 is the value of the output voltage Vout when switch S1 is turned on. Therefore, the amount of time to reduce the output voltage from Vdd1 to Vdd2 is given by









t
=


C
out

×
R





1
×

ln


(


V

dd





1



V

dd





2



)







(
2
)








After the output voltage reaches the desired voltage level, the output voltage controller may turn off switch S1 to prevent further discharge of Cout through R1.



FIG. 4A illustrates a graph of the output voltage 401 of the bleeder circuit of FIG. 3A as a function of time. At t0, when switch S1 is closed, the output voltage starts lowering from a first voltage level Vdd1 to a second voltage level Vdd2. In one embodiment, the output voltage 401 reduces according to equation (1). Once the output voltage 401 reaches the second voltage level Vdd2, switch S1 is opened and the output voltage 401 is held constant at Vdd2. After switch S1 is opened, the voltage level of output voltage 401 may be sensed by output voltage controller 205 and output voltage controller 205 may generate the corresponding V_OUT SETTING signal. After switch S1 is opened, any discharge of output capacitor Cout may be done through a load connected via the USB connector 100.


The bleeder circuit of FIG. 3B includes resistor R1, capacitor C1 connected in parallel to resistor R1, and switch S1. When switch S1 is closed, part of the charge stored in Cout is transferred to C1. The amount of charge transferred to C1, and thus, the output voltage after the charge is transferred, is proportional to the capacitance of Cout and the capacitance of C1. For instance, the output voltage (V1) after the charge has been transferred to C1 is given by










V
1

=



C
out



C
out

+

C





1



×

V
0






(
3
)








Furthermore, the amount of time to transfer the charge from Cout to C1 may depend on a value of the parasitic resistance of Cout and/or C1.


Additionally, the charge stored in Cout and the charge stored in C1 is discharged through R1. As a result, the output voltage of the USB charger 200 is given by










V
out

=


V
1



e

-

t


(


C
out

+

C
1


)

×
R





1









(
4
)








where V1 is the output voltage level after the charge has been transferred from Cout to C1. Therefore, the amount of time to reduce the output voltage from V1 to Vdd2 is given by









t
=


(


C
out

+

C





1


)

×
R





1
×

ln


(


V
1


V

dd





2



)







(
5
)








FIG. 4B illustrates a graph of the output voltage 403 of the bleeder circuit of FIG. 3B as a function of time. At t0, when switch S1 is closed, charge is transferred from output capacitor Cout to capacitor C1 of FIG. 3B, thus lowering the voltage level of the output voltage 403. As a result the output voltage 403 rapidly decreases from the first voltage level Vdd1 to an intermediate voltage level V1. In one embodiment, the charge transfer speed is determined based on the value of the parasitic resistance of output capacitor Cout and the parasitic resistance of capacitor C1. After the charge has been transferred from the output capacitor Cout to the capacitor C1, the charge stored in output capacitor Cout and capacitor C1 is dissipated through resistor R1 lowering the output voltage from the intermediate voltage level V1 to the second voltage level Vdd2. In one embodiment, the output voltage 403 reduces according to equation (4). Once the output voltage 403 reaches the second voltage level Vdd2, switch S1 is opened and the output voltage 403 is held constant at Vdd2. Since the rate 405 at which the output voltage 403 reduces from Vdd1 to V1 is proportional to the parasitic resistance of output capacitor Cout and the parasitic resistance of capacitor C1, and the rate 407 at which the output voltage reduces from V1 to Vdd2 is proportional to resistor R1, the rate 405 at which the output voltage 403 reduces from Vdd1 to V1 is usually larger than the rate 407 at which the output voltage reduces from V1 to Vdd2. Thus, the bleeder circuit of FIG. 3B beneficially allows the output voltage of USB charger 200 to reduce faster compared to a USB charger using the bleeder circuit of FIG. 3A.


The bleeder circuit of FIG. 3C includes resistor R1, capacitor C1, switch S1 connected in series with R1, and switch S2 connected in series with C1. If output voltage controller 205 determines that the output voltage of the USB charger 200 is larger than the voltage requested by the client device 201, the output voltage controller 205 closes switch S1 and S2. When switch S2 is closed, a portion of the charge stored in output capacitor Cout is transferred to capacitor C1. The amount of charge transferred from Cout to C1 is proportional to the capacitance of output capacitor Cout and capacitor C1. Additionally, when switch S1 is closed, the charge stored in output capacitor Cout and capacitor C1 is discharged through R1. Output capacitor Cout and capacitor C1 are discharged until the output voltage of the USB charger 200 reaches the voltage requested by client device 201. When the output voltage of the USB charger 200 reaches the voltage level requested by the client device 201, output voltage controller 205 opens switch S1 to prevent output capacitor Cout and capacitor C1 to be discharged through R1.


The bleeder circuit of FIG. 3D includes resistor R1 and R2, switch S1 connected in series with R1, and switch S2 connected in series with R2. Resistor R1 may have a small resistance and may be used to provide a fast discharge path to the output capacitor Cout. Resistor R2 may have a large resistance and may be used to provide a slow discharge path to the output capacitor Cout.


The bleeder circuit of FIG. 3E includes resistor R1, switch S1 connected in series with R1, and resistor R2 with switch S2 connected in parallel with switch S2. Resistor R1 may have a small resistance and resistor R2 may have a large resistance. When switch S1 is closed, resistor R1 provides a small resistance path for a fast discharge of output capacitor Cout. Additionally, when switch S1 is opened and switch S2 is closed, the series combination of resistor R1 and resistor R2 provides a large resistance path for a slow discharge of output capacitor Cout.


In the bleeder circuits of FIGS. 3D and 3E, if the output voltage controller 205 determines that the output voltage of the USB charger 200 is larger than the voltage requested by the client device 201, the output voltage controller 205 closes switch S1 and switch S2. When the output voltage reaches a certain threshold voltage, the output voltage controller 205 opens switch S1 and keeps switch S2 closed. When the output voltage of the USB charger 200 reaches the voltage level requested by the client device 201, output voltage controller 205 opens switch S2 to prevent output capacitor Cout to be discharged through R2. Using a fast discharge resistor followed by a slow discharge resistor beneficially allows the bleeder circuit 203 to smoothly discharge output capacitor Cout and reduces the amount of undershoot in the output voltage. Although the bleeder circuits of FIGS. 3D and 3E are described as having two resistors or two discharging stages, any number of resistors or discharging stages may be used depending on the amount of control desired for the discharging of the output voltage.


While the switches in the bleeder circuits 203 of FIGS. 3A through 3E are described as being controlled based on the output voltage, the switches of the bleeder circuits 203 may also be controlled by a timer, a logic circuit, or any combination thereof. For instance, by using a timer, excessive discharging and excessive heating may be reduced if the target voltage is not reached as expected.



FIG. 5 illustrates a flow diagram for providing an output voltage at multiple levels, according to one embodiment. A determination is made whether a client device 201 is connected to the USB charger 200. If a client device is connected, a determination is made whether the client device is requesting an output voltage at a higher voltage level (e.g. 12V). If the client device is requesting an output voltage at a higher voltage level, the controller 207 is set 510 to generate an output voltage Vout at the higher voltage level Vdd2.


If the client device 201 requested an output voltage at a lower level, or a client device 201 is not connected to the USB charger 200, a determination is made whether the output voltage is at a higher voltage level. If the output voltage is at a higher level, the bleeder 203 is enabled 520 and the controller 207 is set 530 to generate an output voltage Vout at the lower voltage level Vdd1.


Additional Configuration Considerations


Throughout this specification, plural instances may implement components, operations, or structures described as a single instance. Although individual operations of one or more methods are illustrated and described as separate operations, one or more of the individual operations may be performed concurrently, and nothing requires that the operations be performed in the order illustrated. Structures and functionality presented as separate components in example configurations may be implemented as a combined structure or component. Similarly, structures and functionality presented as a single component may be implemented as separate components. These and other variations, modifications, additions, and improvements fall within the scope of the subject matter herein.


Certain embodiments are described herein as including logic or a number of components, modules, or mechanisms. Modules may constitute either software modules (e.g., code embodied on a machine-readable medium or in a transmission signal) or hardware modules. A hardware module is tangible unit capable of performing certain operations and may be configured or arranged in a certain manner. In example embodiments, one or more computer systems (e.g., a standalone, client or server computer system) or one or more hardware modules of a computer system (e.g., a processor or a group of processors) may be configured by software (e.g., an application or application portion) as a hardware module that operates to perform certain operations as described herein.


In various embodiments, a hardware module may be implemented mechanically or electronically. For example, a hardware module may comprise dedicated circuitry or logic that is permanently configured (e.g., as a special-purpose processor, such as a field programmable gate array (FPGA) or an application-specific integrated circuit (ASIC)) to perform certain operations. A hardware module may also comprise programmable logic or circuitry (e.g., as encompassed within a general-purpose processor or other programmable processor) that is temporarily configured by software to perform certain operations. It will be appreciated that the decision to implement a hardware module mechanically, in dedicated and permanently configured circuitry, or in temporarily configured circuitry (e.g., configured by software) may be driven by cost and time considerations.


The various operations of example methods described herein may be performed, at least partially, by one or more processors that are temporarily configured (e.g., by software) or permanently configured to perform the relevant operations. Whether temporarily or permanently configured, such processors may constitute processor-implemented modules that operate to perform one or more operations or functions. The modules referred to herein may, in some example embodiments, comprise processor-implemented modules.


The one or more processors may also operate to support performance of the relevant operations in a “cloud computing” environment or as a “software as a service” (SaaS). For example, at least some of the operations may be performed by a group of computers (as examples of machines including processors), these operations being accessible via a network (e.g., the Internet) and via one or more appropriate interfaces (e.g., application program interfaces (APIs).)


The performance of certain of the operations may be distributed among the one or more processors, not only residing within a single machine, but deployed across a number of machines. In some example embodiments, the one or more processors or processor-implemented modules may be located in a single geographic location (e.g., within a home environment, an office environment, or a server farm). In other example embodiments, the one or more processors or processor-implemented modules may be distributed across a number of geographic locations.


Some portions of this specification are presented in terms of algorithms or symbolic representations of operations on data stored as bits or binary digital signals within a machine memory (e.g., a computer memory). These algorithms or symbolic representations are examples of techniques used by those of ordinary skill in the data processing arts to convey the substance of their work to others skilled in the art. As used herein, an “algorithm” is a self-consistent sequence of operations or similar processing leading to a desired result. In this context, algorithms and operations involve physical manipulation of physical quantities. Typically, but not necessarily, such quantities may take the form of electrical, magnetic, or optical signals capable of being stored, accessed, transferred, combined, compared, or otherwise manipulated by a machine. It is convenient at times, principally for reasons of common usage, to refer to such signals using words such as “data,” “content,” “bits,” “values,” “elements,” “symbols,” “characters,” “terms,” “numbers,” “numerals,” or the like. These words, however, are merely convenient labels and are to be associated with appropriate physical quantities.


Unless specifically stated otherwise, discussions herein using words such as “processing,” “computing,” “calculating,” “determining,” “presenting,” “displaying,” or the like may refer to actions or processes of a machine (e.g., a computer) that manipulates or transforms data represented as physical (e.g., electronic, magnetic, or optical) quantities within one or more memories (e.g., volatile memory, non-volatile memory, or a combination thereof), registers, or other machine components that receive, store, transmit, or display information.


As used herein any reference to “one embodiment” or “an embodiment” means that a particular element, feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment.


Some embodiments may be described using the expression “coupled” and “connected” along with their derivatives. For example, some embodiments may be described using the term “coupled” to indicate that two or more elements are in direct physical or electrical contact. The term “coupled,” however, may also mean that two or more elements are not in direct contact with each other, but yet still co-operate or interact with each other. The embodiments are not limited in this context.


As used herein, the terms “comprises,” “comprising,” “includes,” “including,” “has,” “having” or any other variation thereof, are intended to cover a non-exclusive inclusion. For example, a process, method, article, or apparatus that comprises a list of elements is not necessarily limited to only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Further, unless expressly stated to the contrary, “or” refers to an inclusive or and not to an exclusive or. For example, a condition A or B is satisfied by any one of the following: A is true (or present) and B is false (or not present), A is false (or not present) and B is true (or present), and both A and B are true (or present).


In addition, use of the “a” or “an” are employed to describe elements and components of the embodiments herein. This is done merely for convenience and to give a general sense of the invention. This description should be read to include one or at least one and the singular also includes the plural unless it is obvious that it is meant otherwise.


Upon reading this disclosure, those of skill in the art will appreciate still additional alternative structural and functional designs for a system and a process for providing a USB power supply voltage at multiple voltage levels through the disclosed principles herein. Thus, while particular embodiments and applications have been illustrated and described, it is to be understood that the disclosed embodiments are not limited to the precise construction and components disclosed herein. Various modifications, changes and variations, which will be apparent to those skilled in the art, may be made in the arrangement, operation and details of the method and apparatus disclosed herein without departing from the spirit and scope defined in the appended claims.

Claims
  • 1. A universal serial bus (USB) charger for providing power to a client device comprising: a USB connector configured to interface with the client device, and to receive a request for an output voltage at one of a plurality of voltage levels including a first voltage level and a second voltage level, the second voltage level higher than the first voltage level;a converter circuit, an output of the converter circuit coupled to the USB connector, the converter circuit configured to convert an input voltage level to an output voltage level at one of the plurality of voltage levels including the first voltage level and the second voltage level, the converter circuit comprising an output capacitor coupled to the USB connector;a bleeder circuit coupled to the output capacitor of the converter circuit, the bleeder circuit configured to discharge the output capacitor of the converter circuit responsive to the output voltage level of the converter circuit being greater than the first voltage level, the first bleeder circuit comprising: a first switch coupled to the output controller,a first bleeder resistor coupled to the output capacitor and the first switch, the first bleeder resistor configured to discharge the output capacitor when the first switch is closed,a second switch coupled to the output controller, anda second bleeder resistor coupled to the output capacitor and the second switch, the second bleeder resistor having a resistance higher than the first bleeder resistor, the second bleeder resistor configured to provide a slow discharge of the output capacitor when the first switch is opened; andan output controller coupled to the converter circuit and the bleeder circuit, the output controller configured to: responsive to a client device not being connected to the USB connector and the output voltage level of the converter circuit being controlled to be at the second voltage level:control the output voltage level of the converter circuit to be at the first voltage level,turn on the first switch and the second switch responsive to determining that the output voltage level of the USB charger is at the second voltage level, andturn off the first switch and the second switch responsive to determining that the first switch and the second switch have been on for a set amount of time.
  • 2. The USB charger of claim 1, wherein the bleeder circuit further comprises: a bleeder capacitor, the bleeder capacitor coupled in parallel to the bleeder resistor, the bleeder capacitor configured to receive a portion of charge stored in the output capacitor when the first switch is closed.
  • 3. The USB charger of claim 1, wherein the output controller is further configured to: turn off the first switch responsive to determining that the output voltage level of the USB charger is at a third voltage level, the third voltage level higher than the first voltage level and lower than the second voltage level; andturn off the second switch responsive to determining that the output voltage level of the USB charger is within a threshold level of the first voltage level.
  • 4. The USB charger of claim 1, wherein the output controller is configured to turn on the first switch responsive to receiving the request for the output voltage to be at the first voltage level and determining that the output voltage level of the USB charger is at the second voltage level.
  • 5. The USB charger of claim 4, wherein the output controller is further configured to turn off the first switch responsive to determining that the output voltage level of the USB charger is within a threshold level of the first voltage level.
  • 6. The USB charger of claim 1, wherein the bleeder circuit further comprises: a second switch coupled to the output controller; anda bleeder capacitor coupled to the output capacitor and the second switch, the bleeder capacitor configured to receive a portion of the charge stored in the output capacitor when the second switch is closed.
  • 7. The USB charger of claim 6, wherein the output controller is further configured to: turn on the first switch and the second switch responsive to determining that the output voltage level of the USB charger is at a second voltage level, the second voltage level higher than the first voltage level; andturn off the first switch responsive to determining that the output voltage of the USB charger is within a threshold level of the first voltage level.
  • 8. A method for providing power to a client device in a plurality of voltage levels including a first voltage level and a second voltage level, the second voltage level higher than the first voltage level, the method comprising: determining, by a universal serial bus (USB) charger, whether the client device is connected to the USB charger; andresponsive to determining that the client device is not connected to the USB charger and an output voltage of the USB charger is set to the second voltage level, the second voltage level higher than the first voltage level: setting the output voltage level to the first voltage level; andenabling a bleeder circuit, the bleeder circuit configured to discharge an output capacitor of the USB charger, the bleeder circuit including a first switch, a first bleeder resistor coupled to the output capacitor and the first switch, a second switch, and a second bleeder resistor coupled to the output capacitor and the second switch, comprising: turning on the first switch and the second switch responsive to determining that the output voltage level of the USB charger is at the second voltage level,turning off the first switch responsive to determining that the output voltage level of the USB charger is at a third voltage level, the third voltage level higher than the first voltage level and lower than the second voltage level, andturning off the second switch responsive to determining that the output voltage level of the USB charger is within a threshold level of the first voltage level.
  • 9. The method of claim 8, further comprising: turning off the first switch responsive to determining that the output voltage level of the USB charger is within a threshold level of the first voltage level.
  • 10. The method of claim 8, further comprising: receiving a request, at the USB charger, for the output voltage at the first voltage level or the second voltage level; andresponsive to the received request being for the output voltage to be at the first voltage level: setting the output voltage to the first voltage level, andresponsive to determining whether the output voltage level is higher than the first voltage level, enabling the bleeder circuit; andresponsive to the received request being for the output voltage to be at the second voltage level: setting the output voltage to the second voltage level.
  • 11. The method of claim 10, further comprising: responsive to determining that the requested first voltage is higher than the output voltage level setting the output voltage level to the first level.
  • 12. The method of claim 8, wherein the first bleeder resistor configured to discharge the output capacitor when the first switch is on.
  • 13. The method of claim 12, wherein the bleeder circuit further comprises: a bleeder capacitor, the bleeder capacitor coupled in parallel to the first bleeder resistor, the bleeder capacitor configured to receive a portion of charge stored in the output capacitor when the first switch is on.
  • 14. The method of claim 12, wherein the bleeder circuit further comprises: a third switch; anda bleeder capacitor coupled to the output capacitor and the third switch, the bleeder capacitor configured to receive a portion of the charge stored in the output capacitor when the third switch is on.
  • 15. The method of claim 14, further comprising: turning on the third switch responsive to determining that the output voltage level of the USB charger is at the second voltage level.
  • 16. A universal serial bus (USB) charger for providing power to a client device comprising: a USB connector configured to interface with the client device, and to receive a request for an output voltage at one of a plurality of voltage levels including a first voltage level and a second voltage level;a converter circuit, an output of the converter circuit coupled to the USB connector, the converter circuit configured to convert an input voltage level to an output voltage level, the converter circuit comprising an output capacitor coupled to the USB connector;a bleeder circuit coupled to the output capacitor of the converter circuit, the bleeder circuit configured to discharge the output capacitor of the converter circuit responsive to the output voltage level of the converter circuit being greater than the first voltage level, the bleeder circuit comprising: a first switch coupled to the output controller,a first bleeder resistor coupled to the output capacitor and the first switch, the first bleeder resistor configured to discharge the output capacitor when the first switch is closed,a second switch coupled to the output controller, anda second bleeder resistor coupled to the output capacitor and the second switch, the second bleeder resistor having a resistance higher than the first bleeder resistor, the second bleeder resistor configured to provide a slow discharge of the output capacitor when the first switch is opened; andan output controller coupled to the converter circuit and the bleeder circuit, the output controller configured to: turn on the first switch and the second switch responsive to determining that the output voltage level of the USB charger is at a second voltage level, the second voltage level higher than the first voltage level;turn off the first switch responsive to determining that the output voltage level of the USB charger is at a third voltage level, the third voltage level higher than the first voltage level and lower than the second voltage level; andturn off the second switch responsive to determining that the output voltage level of the USB charger is within a threshold level of the first voltage level.
  • 17. The USB charger of claim 16, wherein the output controller is configured to turn on the first switch responsive to receiving the request for the output voltage to be at the first voltage level and determining that the output voltage level of the USB charger is at the second voltage level.
  • 18. The USB charger of claim 16, wherein the output controller is further configured to turn off the first switch responsive to determining that the output voltage level of the USB charger is within a threshold level of the first voltage level.
  • 19. The USB charger of claim 16, wherein the bleeder circuit further comprises: a bleeder capacitor, the bleeder capacitor coupled in parallel to the first bleeder resistor, the bleeder capacitor configured to receive a portion of charge stored in the output capacitor when the first switch is closed.
US Referenced Citations (162)
Number Name Date Kind
3579240 Deming May 1971 A
3614584 Burkett Oct 1971 A
3704393 Digney, Jr. Nov 1972 A
3708738 Crawford Jan 1973 A
3792309 McDonald Feb 1974 A
3863129 Yamauchi Jan 1975 A
3889090 MacKenzie Jun 1975 A
3953768 Meredith Apr 1976 A
4024430 Schneider May 1977 A
4025817 Wollschleger May 1977 A
4064447 Edgell Dec 1977 A
4066937 Pfarrer Jan 1978 A
4084123 Lineback Apr 1978 A
4088928 Waehner May 1978 A
4191917 Brown Mar 1980 A
4210846 Capewell Jul 1980 A
4275436 Peterson Jun 1981 A
4388583 Krueger Jun 1983 A
4402033 Mayer Aug 1983 A
4437148 Suranyi Mar 1984 A
4621225 Birk Nov 1986 A
4654770 Santurtun Mar 1987 A
4698580 Yang Oct 1987 A
4730122 Dreibelbis Mar 1988 A
4855622 Johnson Aug 1989 A
4870534 Harford Sep 1989 A
4910654 Forge Mar 1990 A
5013993 Bhagwat May 1991 A
5023527 Erdman Jun 1991 A
5036850 Owens Aug 1991 A
5063929 Bartelt Nov 1991 A
5065083 Owens Nov 1991 A
5069211 Bartelt Dec 1991 A
5166595 Leverich Nov 1992 A
5289101 Furuta Feb 1994 A
5436791 Turano Jul 1995 A
5459652 Faulk Oct 1995 A
5523665 Deaver Jun 1996 A
5615097 Cross Mar 1997 A
5638262 Brown Jun 1997 A
5675464 Makaran Oct 1997 A
5708549 Croft Jan 1998 A
5796182 Martin Aug 1998 A
5822200 Stasz Oct 1998 A
5835361 Fitzgerald Nov 1998 A
5841641 Faulk Nov 1998 A
5949212 Cherry Sep 1999 A
6018229 Mitchell Jan 2000 A
6088209 Sink Jul 2000 A
6148258 Boisvert Nov 2000 A
6172608 Cole Jan 2001 B1
6243276 Neumann Jun 2001 B1
6301131 Yoshida Oct 2001 B1
6359794 Real Mar 2002 B1
6385058 O'Meara May 2002 B1
6424125 Graham Jul 2002 B1
6614811 Alaimo Sep 2003 B1
6737845 Hwang May 2004 B2
7054173 Rayner May 2006 B2
7157807 Lubomirsky Jan 2007 B2
7200015 Mirskiy Apr 2007 B1
7274112 Hjort Sep 2007 B2
7466042 Eldredge Dec 2008 B2
7701739 Mollo Apr 2010 B2
7729190 Xi Jun 2010 B2
7737580 Hjort Jun 2010 B2
7855472 Hjort Dec 2010 B2
7986577 Lee Jul 2011 B2
8053927 Hjort Nov 2011 B2
8054039 Bauerle Nov 2011 B2
8072186 Wang Dec 2011 B2
8093905 Yamanaka Jan 2012 B2
8154245 Veselic Apr 2012 B2
8154258 Pappas Apr 2012 B2
8203857 Ohshima Jun 2012 B2
8208275 Goins Jun 2012 B2
8253403 Chen Aug 2012 B2
8362754 Maebara Jan 2013 B2
8369051 Skatulla Feb 2013 B2
8421400 Khanna Apr 2013 B1
8674631 Kono Mar 2014 B2
8896231 Brandt Nov 2014 B2
8988910 Hsu Mar 2015 B2
9203328 Freeman Dec 2015 B2
9246406 Freeman Jan 2016 B2
20010028571 Hanada Oct 2001 A1
20020196644 Hwang Dec 2002 A1
20030206387 Newman, Jr. Nov 2003 A1
20030210022 Takemura Nov 2003 A1
20040207361 Utsunomiya Oct 2004 A1
20050052886 Yang Mar 2005 A1
20050141252 Mollo Jun 2005 A1
20050264256 Choi Dec 2005 A1
20060181241 Veselic Aug 2006 A1
20060279258 Jung Dec 2006 A1
20080074910 Casteel Mar 2008 A1
20080122518 Besser May 2008 A1
20080144420 Xi Jun 2008 A1
20080232182 Lee Sep 2008 A1
20080238388 Sato Oct 2008 A1
20090072796 Wang Mar 2009 A1
20090196079 Nathan Aug 2009 A1
20090302816 Kunimatsu Dec 2009 A1
20100007361 Yamanaka Jan 2010 A1
20100033882 Skatulla Feb 2010 A1
20100066311 Bao Mar 2010 A1
20100090663 Pappas Apr 2010 A1
20100148741 Chen Jun 2010 A1
20100156355 Bauerle Jun 2010 A1
20100176750 West Jul 2010 A1
20100225170 Hjort Sep 2010 A1
20100308655 Wachi Dec 2010 A1
20110127950 Veselic Jun 2011 A1
20110133655 Recker Jun 2011 A1
20110227415 Hjort Sep 2011 A1
20110234020 Lai Sep 2011 A1
20110241629 Jordan Oct 2011 A1
20120020131 Chan Jan 2012 A1
20120081068 Odaohhara Apr 2012 A1
20120139477 Oglesbee Jun 2012 A1
20120188794 Chang Jul 2012 A1
20120201058 Harrison Aug 2012 A1
20120277942 Vilar Nov 2012 A1
20120299546 Gagne Nov 2012 A1
20130076301 Bastami Mar 2013 A1
20130077364 Urienza Mar 2013 A1
20130154515 Brandt Jun 2013 A1
20130154546 Kleczewski Jun 2013 A1
20130162235 Harada Jun 2013 A1
20130170261 Lee Jul 2013 A1
20130328415 Lee Dec 2013 A1
20130334881 Jones Dec 2013 A1
20130335038 Lee Dec 2013 A1
20130343090 Eom Dec 2013 A1
20140049106 Freeman Feb 2014 A1
20140049176 Weaver, Jr. Feb 2014 A1
20140049991 Freeman Feb 2014 A1
20140084687 Dent Mar 2014 A1
20140097686 Huisman Apr 2014 A1
20140169047 Hsu Jun 2014 A1
20140192564 Tang Jul 2014 A1
20140245030 Helfrich Aug 2014 A1
20140266074 Herber Sep 2014 A1
20140320075 Baurle Oct 2014 A1
20140327393 Lee Nov 2014 A1
20140347005 Zhou Nov 2014 A1
20150036389 Freeman Feb 2015 A1
20150049520 Xu Feb 2015 A1
20150054451 Rokusek Feb 2015 A1
20150103568 Del Carmen, Jr. Apr 2015 A1
20150109834 Hsu Apr 2015 A1
20150124499 Eum May 2015 A1
20150180244 Jung Jun 2015 A1
20150357857 Flock Dec 2015 A1
20150357928 Itakura Dec 2015 A1
20160006341 Mao Jan 2016 A1
20160064977 Chen Mar 2016 A1
20160064978 Lei Mar 2016 A1
20160156277 Weaver, Jr. Jun 2016 A1
20160233781 Freeman Aug 2016 A1
20160268828 Mao Sep 2016 A1
20160322893 Schinzel Nov 2016 A1
Foreign Referenced Citations (3)
Number Date Country
3925174 Feb 1991 DE
11341800 Dec 1999 JP
20150074444 Jul 2015 KR
Non-Patent Literature Citations (5)
Entry
Derwent report for Azuma JP 11341800 (Published online either 2000 or 2008, Thomson Reuters).
Translation for Azuma 1131800.
Human Translation of Azuma reference (fixes typo on p. 21 of mailed Jun. 6, 2016 translation).
PCT International Search Report and Written Opinion, PCT Application No. PCT/US2015/024406, dated Jul. 6, 2015, 16 pages.
Chinese First Office Action, Chinese Application No. 201580026055.2, dated Apr. 9, 2018, 10 pages.
Related Publications (1)
Number Date Country
20150340890 A1 Nov 2015 US