Claims
- 1. In an electronic system, a system for voltage margin testing of one or more components of said system, comprising:
a controller internal to said electronic system; and a digital voltage adjuster in communication with said controller and with said one or more components, said voltage adjuster affecting generation of one or more test voltages for application to said components in response to commands from the controller.
- 2. The margin testing system of claim 1, further comprising:
a diagnostics software executing to collect and analyze data regarding a response of said system to said test voltages.
- 3. The margin testing system of claim 1, further comprising:
a power rail electrically coupled to said components for applying voltage thereto, said voltage adjuster being electrically coupled to said power rail to set said power rail voltage to one or more of said test voltages.
- 4. The margin testing system of claim 3, further comprising:
a voltage regulator receiving an input voltage and generating a regulated output voltage for application to said power rail, said voltage adjuster being coupled to said regulator for varying said regulated output voltage in response to commands from said controller.
- 5. The margin testing system of claim 4, wherein said digital voltage adjuster comprises:
a digital potentiometer incorporated in a feedback circuitry of said voltage regulator, wherein the digital potentiometer varies a resistance associated with said feedback circuitry in response to commands from said controller so as to vary said output voltage of the regulator.
- 6. The margin testing system of claim 4, further comprising:
a hardware monitor in communication with said regulator and said controller, said hardware monitor measuring said output voltage of said regulator and transmitting said measured voltage to said controller.
- 7. The margin testing system of claim 6, wherein said controller queries said hardware monitor periodically to receive said measured voltage, said controller transmitting a feedback command to said adjuster based on said measured voltage to cause the adjuster to vary the output voltage of the regulator from said measured value to a selected test value.
- 8. The margin testing system of claim 1, wherein said controller is a Baseboard Management Controller (BMC).
- 9. The margin testing system of claim 8, wherein said BMC implements IPMI Protocol.
- 10. The margin testing system of claim 8, further comprising:
a I2C-based bus for providing communication between said BMC and said voltage adjuster.
- 11. The margin testing system of claim 1, wherein said controller initiates margin testing in response to a command from an external system.
- 12. The margin testing system of claim 1, wherein said electronic system comprises:
a computer system.
- 13. The margin testing system of claim 12, wherein said computer system is a server.
- 14. A computer system, comprising:
a processor; a plurality of components in communication with said processor for performing a plurality of tasks; a controller; and a digital voltage adjuster in communication with said controller and one or more of said components, said adjuster affecting generation of one or more test voltages for application to selected ones of said components for voltage margin testing thereof in response to commands from said controller.
- 15. The computer system of claim 14, wherein said controller comprises:
a BMC implementing an IPMI protocol
- 16. The computer system of claim 15, further comprising:
an I2C-based bus for providing communication between said BMC and said voltage adjuster.
- 17. The computer system of claim 14, further comprising:
a voltage regulator receiving an input voltage and generating a regulated output voltage for application to said components.
- 18. The computer system of claim 17, wherein said voltage adjuster comprises:
a digital potentiometer incorporated in a feedback circuitry of said voltage regulator to vary a resistance of said feedback circuitry in response to commands from said controller so as to set the output voltage of said regulator to one or more of said test voltages.
- 19. A method for voltage margin testing of one or more components of an electronic system, having an internal controller, and a digital voltage adjuster, in communication with said controller and with at least a power rail supplying voltage to said components, comprising:
causing the controller to transmit one or more commands to said voltage adjuster to cause the adjuster to affect generation of one or more test voltages at said power rail for application to said components, and monitoring response of said computer system to each of said test voltages.
- 20. The method of claim 19, further comprising:
selecting said controller to be a BMC.
- 21. The method of claim 20, further comprising:
employing an I2C-based bus for providing communication between said BMC and said voltage adjuster.
- 22. The method of claim 19, further comprising:
utilizing a hardware monitor to measure voltage at said power rail and transmitting said measured voltage to said controller.
RELATED APPLICATIONS
[0001] The present application is related to the following commonly owned U.S. patent applications, incorporated in their entirety herein by reference:
[0002] U.S. patent application entitled “USE OF I2C PROGRAMMABLE CLOCK GENERATOR TO ENABLE FREQUENCY VARIATION UNDER BMC CONTROL,” naming as inventors Naysen J. Robertson, Benjamin T. Percer, and Kirk Yates (Attorney Docket No.: 200208055-1); U.S. patent application entitled “METHODS AND SYSTEMS FOR MASKING FAULTS IN A MARGIN TESTING ENVIRONMENT” naming as inventors Benjamin T. Percer and Naysen J. Roberston (Attorney Docket No.: 200312936-1); and U.S. patent application entitled “METHOD AND CONSTRUCT FOR ENABLING PROGRAMMABLE, INTEGRATED SYSTEM MARGIN TESTING” naming as inventors Naysen J. Robertson, Benjamin T. Percer and Sachin N. Chheda (Attorney Docket No.: 200207937-1).