Patent Application
20200233687
The following description is provided to assist the understanding of the reader. None of the information provided or references cited is admitted to be prior art.
Virtual computing systems are widely used in a variety of applications. Virtual systems can include a computer on which a hypervisor, or virtual machine monitor, runs. The hypervisor is computer software, firmware, or hardware that creates and runs virtual machines. The hypervisor can emulate a certain piece of hardware that it presents to a guest virtual machine (VM) regardless of where the hardware is physically located.
User space is generally understood to be the portion of system memory in which user processes run. In contrast, kernel space is the portion of memory in which the kernel executes and provides services.
In accordance with at least some aspects of the present disclosure, a method of user space PCI device emulation is disclosed. The method includes receiving, at a host device, a request to communicate with an emulated device; establishing, at the host device, a socket connection between an application in user space at the host device and the emulated device; and communicating input-output messages via the socket connection from the application to the emulated device, wherein the input-output messages use a virtual function input/output (VFIO) message protocol.
In accordance with some other aspects of the present disclosure, a host device is disclosed. The host device includes a kernel including operating system functionality and a user space including a device emulator and an application. The application requests communication with an emulated device located in the user space and establishes a socket connection with the emulated device, and wherein the application and the emulated device communicate input-output messages via the socket connection where the input-output messages use a virtual function input/output (VFIO) message protocol.
In accordance with yet other embodiments of the present disclosure, a non-transitory computer readable media is disclosed. The non-transitory computer readable media includes computer-executable instructions that, when executed by a processor of a virtual computing system, cause the virtual computing system to perform a process. The process includes receiving, at a host device, a request to communicate with an emulated device; establishing, at the host device, a socket connection between an application in user space at the host device and the emulated device; and communicating input-output messages via the socket connection from the application to the emulated device, wherein the input-output messages use a virtual function input/output (VFIO) message protocol.
The foregoing summary is illustrative only and is not intended to be in any way limiting. In addition to the illustrative aspects, embodiments, and features described above, further aspects, embodiments, and features will become apparent by reference to the following drawings and the detailed description.
The foregoing and other features of the present disclosure will become apparent from the following description and appended claims, taken in conjunction with the accompanying drawings. Understanding that these drawings depict only several embodiments in accordance with the disclosure and are, therefore, not to be considered limiting of its scope, the disclosure will be described with additional specificity and detail through use of the accompanying drawings.
In the following detailed description, reference is made to the accompanying drawings, which form a part hereof. In the drawings, similar symbols typically identify similar components, unless context dictates otherwise. The illustrative embodiments described in the detailed description, drawings, and claims are not meant to be limiting. Other embodiments may be utilized, and other changes may be made, without departing from the spirit or scope of the subject matter presented here. It will be readily understood that the aspects of the present disclosure, as generally described herein, and illustrated in the figures, can be arranged, substituted, combined, and designed in a wide variety of different configurations, all of which are explicitly contemplated and make part of this disclosure.
The present disclosure is generally directed to a system for emulating processes in user space. More specifically, the present disclosure describes using virtual function input-output (VFIO) protocol together with UNIX sockets to emulate peripheral component interconnect (PCI) devices in user space between processes.
A host device generally includes both user space memory locations in which user processes run and a kernel that executes and provides services for the host device. Applications in user space that utilize drivers in the kernel can interact with hardware and memory external to the host device. The kernel limits access that the application has to only parts of external memory belonging to that application. In contrast, applications executing in user space that do not utilize a kernel driver may be able to access any memory without the same limitations imposed by the kernel driver.
Advantageously, the present disclosure describes a system in which a virtual machine (VM) emulator provides a virtual machine with a virtual PCI device that is backed by a user space process. When a driver performs operations such as reading or writing to the virtual PCI device's control registers, each operation corresponds to one or more messages that are sent by the VM emulator to a user space device emulator process via a virtual function input/output (VFIO) message protocol.
There are at least two advantages to the system 500. First, avoiding the kernel for this device emulation setup allows for non-GPL software implementation of devices, which can be important for both licensing and distribution. Second, emulating devices from a single user space process (outside of the virtual machine emulator) has added performance benefits such as efficient instruction caching and polling. That is, a single process can efficiently run a set of instructions which query multiple virtual devices for work in a tight loop. Doing the same from multiple (e.g. virtual machine) emulators can only be done for devices within the virtual machine handled by that emulator. As a result, CPU time is used inefficiently as multiple CPUs are required to sit in a tight loop for multiple virtual machines (therefore wasting CPU cycles and power).
In operation 810, a virtual machine or any computing device sends a request to a host device to communicate with a device that the host device is emulating. An emulated device is a device that is not necessarily physically located at the host device but the emulation enables requesting devices to utilize the services provided by the emulated device.
In operation 820, the host device includes user space memory where a device emulator establishes a socket connection with an emulator. The socket connection can be, for example, a UNIX socket connection. In operation 830, after the socket connection is established, the device emulator communicates input and output control messages using the socket connection. The input-output messages appear similar to and functionally equivalent to VFIO-PCI messages such as those used in system 400 described with reference to
Advantageously, the embodiments described herein emulate all kinds of PCI devices, not just network devices. For example, the embodiments can be used to emulate a storage device, a GPU, an audio device, a modem, a USB controller, etc. The embodiments emulate an entire PCI device that a driver running in a VM can drive as if it were a physical device.
The embodiments enable an emulator to present virtual hardware to a virtual machine by configuring the virtual hardware to present a virtual PCI device backed by a user space device emulator. When a driver performs operations such as reading or writing to the virtual PCI device's control registers, each operation corresponds to one or more messages that are sent by the virtual hardware to the user space device emulator process via a virtual function input/output (VFIO) message protocol.
The various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the examples disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present disclosure.
The hardware used to implement the various illustrative logics, logical blocks, modules, and circuits described in connection with the examples disclosed herein may be implemented or performed with a general purpose processor, a DSP, an ASIC, an FPGA or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general-purpose processor may be a microprocessor, but, in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration. Alternatively, some steps or methods may be performed by circuitry that is specific to a given function.
In some exemplary examples, the functions described may be implemented in hardware, software, firmware, or any combination thereof. If implemented in software, the functions may be stored as one or more instructions or code on a non-transitory computer-readable storage medium or non-transitory processor-readable storage medium. The steps of a method or algorithm disclosed herein may be embodied in a processor-executable software module which may reside on a non-transitory computer-readable or processor-readable storage medium. Non-transitory computer-readable or processor-readable storage media may be any storage media that may be accessed by a computer or a processor. By way of example but not limitation, such non-transitory computer-readable or processor-readable storage media may include RAM, ROM, EEPROM, FLASH memory, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other medium that may be used to store desired program code in the form of instructions or data structures and that may be accessed by a computer. Disk and disc, as used herein, includes compact disc (CD), laser disc, optical disc, digital versatile disc (DVD), floppy disk, and blu-ray disc where disks usually reproduce data magnetically, while discs reproduce data optically with lasers. Combinations of the above are also included within the scope of non-transitory computer-readable and processor-readable media. Additionally, the operations of a method or algorithm may reside as one or any combination or set of codes and/or instructions on a non-transitory processor-readable storage medium and/or computer-readable storage medium, which may be incorporated into a computer program product.
The herein described subject matter sometimes illustrates different components contained within, or connected with, different other components. It is to be understood that such depicted architectures are merely exemplary, and that in fact many other architectures can be implemented which achieve the same functionality. In a conceptual sense, any arrangement of components to achieve the same functionality is effectively “associated” such that the desired functionality is achieved. Hence, any two components herein combined to achieve a particular functionality can be seen as “associated with” each other such that the desired functionality is achieved, irrespective of architectures or intermedial components. Likewise, any two components so associated can also be viewed as being “operably connected,” or “operably coupled,” to each other to achieve the desired functionality, and any two components capable of being so associated can also be viewed as being “operably couplable,” to each other to achieve the desired functionality. Specific examples of operably couplable include but are not limited to physically mateable and/or physically interacting components and/or wirelessly interactable and/or wirelessly interacting components and/or logically interacting and/or logically interactable components.
With respect to the use of substantially any plural and/or singular terms herein, those having skill in the art can translate from the plural to the singular and/or from the singular to the plural as is appropriate to the context and/or application. The various singular/plural permutations may be expressly set forth herein for sake of clarity.
It will be understood by those within the art that, in general, terms used herein, and especially in the appended claims (e.g., bodies of the appended claims) are generally intended as “open” terms (e.g., the term “including” should be interpreted as “including but not limited to,” the term “having” should be interpreted as “having at least,” the term “includes” should be interpreted as “includes but is not limited to,” etc.). It will be further understood by those within the art that if a specific number of an introduced claim recitation is intended, such an intent will be explicitly recited in the claim, and in the absence of such recitation no such intent is present. For example, as an aid to understanding, the following appended claims may contain usage of the introductory phrases “at least one” and “one or more” to introduce claim recitations. However, the use of such phrases should not be construed to imply that the introduction of a claim recitation by the indefinite articles “a” or “an” limits any particular claim containing such introduced claim recitation to inventions containing only one such recitation, even when the same claim includes the introductory phrases “one or more” or “at least one” and indefinite articles such as “a” or “an” (e.g., “a” and/or “an” should typically be interpreted to mean “at least one” or “one or more”); the same holds true for the use of definite articles used to introduce claim recitations. In addition, even if a specific number of an introduced claim recitation is explicitly recited, those skilled in the art will recognize that such recitation should typically be interpreted to mean at least the recited number (e.g., the bare recitation of “two recitations,” without other modifiers, typically means at least two recitations, or two or more recitations). Furthermore, in those instances where a convention analogous to “at least one of A, B, and C, etc.” is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., “a system having at least one of A, B, and C” would include but not be limited to systems that have A alone, B alone, C alone, A and B together, A and C together, B and C together, and/or A, B, and C together, etc.). In those instances, where a convention analogous to “at least one of A, B, or C, etc.” is used, in general such a construction is intended in the sense one having skill in the art would understand the convention (e.g., “a system having at least one of A, B, or C” would include but not be limited to systems that have A alone, B alone, C alone, A and B together, A and C together, B and C together, and/or A, B, and C together, etc.). It will be further understood by those within the art that virtually any disjunctive word and/or phrase presenting two or more alternative terms, whether in the description, claims, or drawings, should be understood to contemplate the possibilities of including one of the terms, either of the terms, or both terms. For example, the phrase “A or B” will be understood to include the possibilities of “A” or “B” or “A and B.” Further, unless otherwise noted, the use of the words “approximate,” “about,” “around,” “substantially,” etc., mean plus or minus ten percent.
The foregoing description of illustrative embodiments has been presented for purposes of illustration and of description. It is not intended to be exhaustive or limiting with respect to the precise form disclosed, and modifications and variations are possible in light of the above teachings or may be acquired from practice of the disclosed embodiments. It is intended that the scope of the invention be defined by the claims appended hereto and their equivalents.
