1. Field of the Invention
The present invention relates to a computer program product, system, and method for using a plurality of sub-buffers and a free segment list to allocate segments to a plurality of threads to use for writing data.
2. Description of the Related Art
Multiple threads executing a program may generate trace data having information on program execution which is written to a shared circular buffer. Trace data may be collected when an error is detected or may be collected as a result of trace code added to programs to collect certain information on program execution, such as the contents of memory and variables, resulting from program execution. Trace data may be used for debugging errors in the program code.
When writing the trace data to the shared circular buffer, the threads need to acquire a lock to access the shared circular buffer to serialize access. To minimize lock contention, task operations may be optimized to just perform critical operations such as claiming the amount of space currently needed and not using that space until after the lock has been relinquished. In this way, lock contention is reduced by reducing the number of tasks subject to lock contention.
Another technique to minimize lock contention involves splitting the buffer into as many circular sub-buffers as there are threads. In this case, no lock is required as each thread has its own sub-buffer.
A further solution is to put the threads into small groups and divide the total buffer into as many sub-buffers as there are groups. One lock is provided per sub-buffer but the number of group members being small enough, efficient use of locking will lessen the collision and thus the wait suffered.
Provided are a computer program product, system, and method for using a plurality of sub-buffers and a free segment list to allocate segments to a plurality of threads to use for writing data. Groups of threads are assigned to sub-buffers. At least one segment of data is indicated in each of the sub-buffers. The threads assigned to one of the sub-buffers write to the at least one segment indicated in the sub-buffer to which the threads are assigned. A free segment list indicates segments which are not indicated in one of the sub-buffers. In response to one of the segments in a containing sub-buffer comprising one of the sub-buffers becoming a full segment having less than a threshold amount of free space, the indication of the full segment in the containing sub-buffer is replaced with one of the segments indicated in the free segment list.
The above described techniques reduce lock contention by creating sub-buffers of buffer resources for each of the threads or a group of threads. However, by assigning sub-buffer resources to fixed groups of threads, skews in the consumption of buffer resources amongst the threads can lead to inefficient utilization of the sub-buffers, some sub-buffers may wrap quite often while others remain empty or unused. Buffer space allocated to low utilization sub-buffers is not available for use by threads assigned to other high utilization sub-buffers. The low utilization sub-buffers maintain older data that does not get overwritten by their assigned threads, whereas high utilization sub-buffers may have their data frequently overwritten. This results in a buffer time-span differential where high utilization sub-buffers have their more current data overwritten while older data remains in the low utilization sub-buffers which do not have their data overwritten as frequently as the high-utilization buffers.
Described embodiments provide techniques to address these problems by indicating groups of threads assigned to sub-buffers. At least one segment of data is indicated in each of the sub-buffers. Threads assigned to one of the sub-buffers write to the at least one segment indicated in the sub-buffer to which the threads are assigned. Segments not indicated in one of the sub-buffers are indicated in a free segment list. In response to one of the segments becoming full (i.e., having less than a threshold amount of free space), the full segment in the sub-buffer is replaced with one of the segments indicated in the free segment list.
With these embodiments, buffers experiencing high utilization move their full segments to the free segment list where the data remains available on the free segment list until reassigned to a buffer filling a segment and overwritten in the buffer to which it is reassigned. The underutilized buffers may retain their limited number of segments, but the time-span differential is reduced because high utilization sub-buffers move their segments to the free segment list where the data in the segments is are made available for an extended period of time because the segment must wait to move to the end of the free segment list before being recycled and dispatched to another sub-buffer where it may be overwritten.
The threads 1041 . . . 104T write trace dump data to segments 1101 . . . 110s of data in a buffer 112 in the memory 106. Trace data may comprise data in memory, errors, log information resulting from the threads 1041 . . . 104T executing the application program 108, etc. In alternative embodiments, the threads 1041 . . . 104T may write other types of data to the segments 1101 . . . 110s other than trace data.
The memory 106 further includes a sub-buffer assignment 200 that provides assignments of sub-buffers 4001 . . . 400G to groups of one or more threads 1041 . . . 104T. The sub-buffers 4001 . . . 400G each indicate a plurality of the segments 1101 . . . 110s. In this way the threads 1041 . . . 104T in one of the groups share access to one of the sub-buffers 4001 . . . 400G. A free segment list 116 indicates those of the segments 1101 . . . 110s that are not indicated in one of the sub-buffers 4001 . . . 400G. For instance, there may be a total of S segments and N segments are assigned to each of the G sub-buffers 4001 . . . 400G, where N is at least two. If there is an equal number of segments 1101 . . . 110s allocated to the sub-buffers 4001 . . . 400G and in the free segment list 116, then the total number of segment (S) may, in certain embodiments, be equal to 2*G*N.
In one embodiment, the free segment list 116 may comprise a First-in-First-Out (FIFO) list where a segment having the most current trace data is added to the head of the FIFO list 116 and segments having the oldest trace data are removed from the tail of the FIFO list 116 and moved to a sub-buffers 4001 . . . 400G. In alternative embodiments, the free segment list 116 may organize data in a different manner than FIFO.
The sub-buffers 4001 . . . 400G may comprise circular buffers that provide a circular ordering of N of the segments 1101 . . . 110s, where each segment is linked to one other segment in the circular buffer. In alternative embodiments, the sub-buffers 4001 . . . 400G may comprise linked lists other than circular buffers. In certain described embodiments, the sub-buffers 4001 . . . 400G each have an equal N number of segments. In alternative embodiments, the sub-buffers 4001 . . . 400G may have different number of allocated segments.
A segment manager 118 manages the free segment list 116 and performs operations to replace a full segment 110FU in one of the sub-buffers 4001 . . . 400G with a free segment 110FR from the free segment list 116 and adds the full segment 110FU to the free segment list 116 to be reassigned to another sub-buffer 4001 . . . 400G after all other segments in the free segment list 116 are used. A segment may be deemed full when it has no more available space or less than a threshold amount of free space.
The computing system 100 may further be connected to a storage 120 in which data in the memory 106 may be stored.
The segment manager 118 is shown in
The storage 120 may comprise one or more storage devices known in the art, such as a solid state storage device (SSD) comprised of solid state electronics, EEPROM (Electrically Erasable Programmable Read-Only Memory), flash memory, flash disk, Random Access Memory (RAM) drive, storage-class memory (SCM), Phase Change Memory (PCM), resistive random access memory (RRAM), spin transfer torque memory (STM-RAM), conductive bridging RAM (CBRAM), magnetic hard disk drive, optical disk, tape, etc. The storage devices may further be configured into an array of devices, such as Just a Bunch of Disks (JBOD), Direct Access Storage Device (DASD), Redundant Array of Independent Disks (RAID) array, virtualization device, etc. Further, the storage devices may comprise heterogeneous storage devices from different vendors or from the same vendor.
The memory 106 may comprise one or more a suitable volatile or non-volatile memory devices, including Dual In Line Memory Modules (DIMM) and other suitable memory devices, such as those described above described above.
In the embodiment of
In one embodiment, the list of linked segments 408 a list of pointers that reference the actual segments 1101 . . . 110s in the buffer 112. Thus, the sub-buffers 4001 . . . 400G and free segment list 116 do not include the actual segments 1101 . . . 110s, but instead pointers to the segments 1101 . . . 110s in the buffer 112. In an alternative embodiment, the sub-buffers 4001 . . . 400G and free segment list 116 may include the actual segments of data and the buffer 112 may just comprise a list of pointers to the segments 1101 . . . 110s maintained in the sub-buffers 4001 . . . 400G and the free segment list 116. In such embodiments, the sub-buffers 4001 . . . 400G comprise the actual buffers having the segment 1101 . . . 110s data.
The requesting thread 104R determines (at block 606) the current segment 406 in the sub-buffer 400i currently being accessed and writes (at block 608) data to the current segment 406, such as trace dump data. If (at block 610) the current segment is full, such as before or after writing the trace data, then the requesting thread 104R or other thread indicates (at block 612) the current segment 406 as full, such as by setting the full segment flag 410 to indicate the full segment or by initiating an interrupt to the segment manager 418 of the full segment status. The next segment following the current segment in the list of linked segments 408 is indicated (at block 614) as the current segment 406. From block 614 or if (at block 610) the current segment 404 is not full, the requesting thread 104R releases (at block 616) the sub-buffer lock 404 to allow other of the threads 1041 . . . 104T assigned to the sub-buffer 400i to write to the segments in the sub-buffer 400i.
After obtaining the lock (at block 704), the segment manager 118 performs the operations at blocks 706 through 714 to replace the full segment 110FU in the sub-buffer 400i with a free segment 110FR indicated in the free segment list 116. At block 706, the segment manager 118 indicates (at block 706) the full segment 110FU at the head of the free segment list 116 and removes (at block 708) indication of the full segment 110FU from the containing sub-buffer 400i indicating the full segment 110FU.
The segment manager 118 indicates (at block 710) the free segment 110FR at the tail of the free segment list 116 in the containing sub-buffer 400i to replace the full segment 110FU in the containing sub-buffer 400i with a free segment 110FR from the free segment list 116. In one embodiment, when moving indication of the free segment 110FR from the free segment list 116 to the sub-buffer 400i, the free segment 110FR is added to the list of linked segments 408 by adjusting the pointer of the segment 110 that previously pointed to the full segment 110FU to point to the segment 110FR from the free segment list 116 and having the free segment 110FR point to the segment 110k that followed the removed full segment 110FU in the list 408. Indication of the segment 110FR added to the containing sub-buffer 400i is removed (at block 712) from the free segment list 116 and the sub-buffer lock 404 is released (at block 714).
With the described embodiments of
Further, by removing full segments from the tail of a FIFO free list 116, the full segments remain available in the free segment list 116 for a maximum amount of time until they are needed for use in a sub-buffer to replace a full segment in a sub-buffer. Further, the data in the free segment added back to a sub-buffer from the free segment list 116 remains available for a maximum amount of time in the sub-buffer comprising a circular buffer, because the segment 110FR replaced from the free list is not overwritten until threads assigned to the sub-buffer 400i complete writing to all other segments in the sub-buffer following the full segment 110FU in the sub-buffer 400i replaced by the free segment 110FR. Thus, the use of the free segment list 116 and circular buffer structures ensures that the newest data in a full segment returned to the free segment list 116 remains available and not overwritten for a maximum time possible.
The requesting thread 104R writes (at block 806) data to the current segment 406, such as trace dump data. If (at block 808) the current segment is full, such as before or after writing the trace data, then the requesting thread 104R or other thread indicates (at block 810) the current segment 406 as full, such as by setting the full segment flag 410 to indicate the full segment 110FU or by initiating an interrupt to the segment manager 118 of the full segment status. The next segment following the current segment in the list of linked segments 408 is indicated (at block 812) as the current segment 406. From block 812 or if (at block 808) the current segment 406 is not full, then the requesting thread 104R releases (at block 814) the segment lock 504 to allow other of the threads 1041 . . . 104T assigned to the sub-buffer 400i to write to the segments in the sub-buffer 400i.
In implementations where there are segment level locks, the operations of
The use of segment level locks in
In the described embodiment, the variable “i”, “j”, “k”, when used with different elements may denote a same or different instance of that element.
The present invention may be a system, a method, and/or a computer program product. The computer program product may include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present invention.
The computer readable storage medium can be a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable storage medium may be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer readable storage medium includes the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or raised structures in a groove having instructions recorded thereon, and any suitable combination of the foregoing. A computer readable storage medium, as used herein, is not to be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses passing through a fiber-optic cable), or electrical signals transmitted through a wire.
Computer readable program instructions described herein can be downloaded to respective computing/processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and/or a wireless network. The network may comprise copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. A network adapter card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium within the respective computing/processing device.
Computer readable program instructions for carrying out operations of the present invention may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like, and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present invention.
Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer readable program instructions.
These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, a programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable storage medium having instructions stored therein comprises an article of manufacture including instructions which implement aspects of the function/act specified in the flowchart and/or block diagram block or blocks.
The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process, such that the instructions which execute on the computer, other programmable apparatus, or other device implement the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions.
The computational components of
As shown in
Computer system/server 902 typically includes a variety of computer system readable media. Such media may be any available media that is accessible by computer system/server 902, and it includes both volatile and non-volatile media, removable and non-removable media.
System memory 906 can include computer system readable media in the form of volatile memory, such as random access memory (RAM) 910 and/or cache memory 912. Computer system/server 902 may further include other removable/non-removable, volatile/non-volatile computer system storage media. By way of example only, storage system 913 can be provided for reading from and writing to a non-removable, non-volatile magnetic media (not shown and typically called a “hard drive”). Although not shown, a magnetic disk drive for reading from and writing to a removable, non-volatile magnetic disk (e.g., a “floppy disk”), and an optical disk drive for reading from or writing to a removable, non-volatile optical disk such as a CD-ROM, DVD-ROM or other optical media can be provided. In such instances, each can be connected to bus 908 by one or more data media interfaces. As will be further depicted and described below, memory 906 may include at least one program product having a set (e.g., at least one) of program modules that are configured to carry out the functions of embodiments of the invention.
Program/utility 914, having a set (at least one) of program modules 916, may be stored in memory 906 by way of example, and not limitation, as well as an operating system, one or more application programs, other program modules, and program data. Each of the operating system, one or more application programs, other program modules, and program data or some combination thereof, may include an implementation of a networking environment. The components of the computer 902 may be implemented as program modules 916 which generally carry out the functions and/or methodologies of embodiments of the invention as described herein. The systems of
Computer system/server 902 may also communicate with one or more external devices 918 such as a keyboard, a pointing device, a display 920, etc.; one or more devices that enable a user to interact with computer system/server 902; and/or any devices (e.g., network card, modem, etc.) that enable computer system/server 902 to communicate with one or more other computing devices. Such communication can occur via Input/Output (I/O) interfaces 922. Still yet, computer system/server 902 can communicate with one or more networks such as a local area network (LAN), a general wide area network (WAN), and/or a public network (e.g., the Internet) via network adapter 924. As depicted, network adapter 924 communicates with the other components of computer system/server 902 via bus 908. It should be understood that although not shown, other hardware and/or software components could be used in conjunction with computer system/server 902. Examples, include, but are not limited to: microcode, device drivers, redundant processing units, external disk drive arrays, RAID systems, tape drives, and data archival storage systems, etc.
The terms “an embodiment”, “embodiment”, “embodiments”, “the embodiment”, “the embodiments”, “one or more embodiments”, “some embodiments”, and “one embodiment” mean “one or more (but not all) embodiments of the present invention(s)” unless expressly specified otherwise.
The terms “including”, “comprising”, “having” and variations thereof mean “including but not limited to”, unless expressly specified otherwise.
The enumerated listing of items does not imply that any or all of the items are mutually exclusive, unless expressly specified otherwise.
The terms “a”, “an” and “the” mean “one or more”, unless expressly specified otherwise.
Devices that are in communication with each other need not be in continuous communication with each other, unless expressly specified otherwise. In addition, devices that are in communication with each other may communicate directly or indirectly through one or more intermediaries.
A description of an embodiment with several components in communication with each other does not imply that all such components are required. On the contrary a variety of optional components are described to illustrate the wide variety of possible embodiments of the present invention.
When a single device or article is described herein, it will be readily apparent that more than one device/article (whether or not they cooperate) may be used in place of a single device/article. Similarly, where more than one device or article is described herein (whether or not they cooperate), it will be readily apparent that a single device/article may be used in place of the more than one device or article or a different number of devices/articles may be used instead of the shown number of devices or programs. The functionality and/or the features of a device may be alternatively embodied by one or more other devices which are not explicitly described as having such functionality/features. Thus, other embodiments of the present invention need not include the device itself.
The foregoing description of various embodiments of the invention has been presented for the purposes of illustration and description. It is not intended to be exhaustive or to limit the invention to the precise form disclosed. Many modifications and variations are possible in light of the above teaching. It is intended that the scope of the invention be limited not by this detailed description, but rather by the claims appended hereto. The above specification, examples and data provide a complete description of the manufacture and use of the composition of the invention. Since many embodiments of the invention can be made without departing from the spirit and scope of the invention, the invention resides in the claims herein after appended.
Number | Name | Date | Kind |
---|---|---|---|
6094712 | Follett et al. | Jul 2000 | A |
6757273 | Hsu et al. | Jun 2004 | B1 |
6845430 | Hopeman et al. | Jan 2005 | B2 |
6862635 | Alverson et al. | Mar 2005 | B1 |
7146458 | Smirnov et al. | Dec 2006 | B2 |
7528838 | Gosalia | May 2009 | B2 |
8904067 | Saputra | Dec 2014 | B2 |
8929213 | Chrysos et al. | Jan 2015 | B2 |
9003131 | Lunev | Apr 2015 | B1 |
9026735 | Torok et al. | May 2015 | B1 |
9055009 | Chrysos et al. | Jun 2015 | B2 |
9197686 | Kirkby et al. | Nov 2015 | B1 |
9286328 | Kozin | Mar 2016 | B2 |
20040004970 | Lakshmanamurthy et al. | Jan 2004 | A1 |
20060225078 | Anderson | Oct 2006 | A1 |
20070140122 | Murthy | Jun 2007 | A1 |
20100153634 | Fellinger et al. | Jun 2010 | A1 |
20100323742 | Allen et al. | Dec 2010 | A1 |
20100332755 | Bu et al. | Dec 2010 | A1 |
20120017214 | Shannon et al. | Jan 2012 | A1 |
20130051478 | Wu et al. | Feb 2013 | A1 |
20130077491 | Cherian et al. | Mar 2013 | A1 |
20130246775 | Bradbury et al. | Sep 2013 | A1 |
20140181794 | Grawrock et al. | Jun 2014 | A1 |
20140282454 | Bai et al. | Sep 2014 | A1 |
20150039840 | Chandra et al. | Feb 2015 | A1 |
20150370717 | Godard et al. | Dec 2015 | A1 |
Number | Date | Country |
---|---|---|
2593861 | May 2013 | EP |
Entry |
---|
Office Action dated Mar. 31, 2016, pp. 13, for U.S. Appl. No. 14/947,468, filed Nov. 20, 2015. |
Office Action dated Apr. 4, 2016, pp. 14, for U.S. Appl. No. 14/947,521, filed Nov. 20, 2015. |
List of Patents or Patent Applications Treated as Related, dated Nov. 20, 2015, pp. 2. |
U.S. Appl. No. 14/947,686, filed Nov. 20, 2015. |
U.S. Appl. No. 14/947,468, filed Nov. 20, 2015. |
U.S. Appl. No. 14/947,521, filed Nov. 20, 2015. |
Office Action dated May 6, 2016, pp. 26, for U.S. Appl. No. 14/947,686, filed Nov. 20, 2015. |
Response dated Jun. 30, 2016, pp. 12, to Office Action dated Mar. 31, 2016, pp. 13, for U.S. Appl. No. 14/947,468, filed Nov. 20, 2015. |
Response dated Jun. 6, 2016, pp. 17, to Office Action dated Apr. 4, 2016, pp. 14, for U.S. Appl. No. 14/947,521, filed Nov. 20, 2015. |
Response dated Jul. 12, 2016, pp. 12, to Office Action dated May 6, 2016, pp. 26, for U.S. Appl. No. 14/947,686, filed Nov. 20, 2015. |
Notice of Allowance dated Jul. 15, 2016, pp. 15, for U.S. Appl. No. 14/947,468, filed Nov. 20, 2015. |