Using an IOMMU to Create Memory Archetypes

Abstract

In one embodiment, an input/output (I/O) memory management unit (IOMMU) comprises at least one memory and control logic coupled to the memory. The memory is configured to store translation data corresponding to one or more I/O translation tables stored in a memory system of a computer system that includes the IOMMU. The control logic is configured to translate an I/O device-generated memory request using the translation data. The translation data includes a type field indicating one or more attributes of the translation, and the control logic is configured to control the translation responsive to the type field.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The following detailed description makes reference to the accompanying drawings, which are now briefly described.

FIG. 1 is a block diagram of a high level view of one embodiment of a computer system.

FIG. 2 is a block diagram of a more detailed embodiment of a computer system.

FIG. 3 is a block diagram illustrating a high level structure of one embodiment of the I/O translation tables shown in FIG. 1.

FIG. 4 is a block diagram of one embodiment of a device table entry for a device table shown in FIG. 3.

FIG. 5 is a block diagram of one embodiment of a page table entry for an I/O page table shown in FIG. 3.

FIG. 6 is a block diagram of one embodiment of a memory archetype field shown in FIG. 5

FIG. 7 is a block diagram of a second embodiment of a memory archetype field shown in FIG. 5 and a corresponding table.

FIG. 8 is a block diagram illustrating one embodiment of sharing I/O and CPU page table entries.

FIG. 9 is a block diagram illustrating one embodiment of an I/O page table entry and a CPU page table entry.

FIG. 10 is a flowchart illustrating one embodiment of a method of translating an I/O device-generated request.

Claims

1. An input/output (I/O) memory management unit (IOMMU) comprising: at least one memory configured to store translation data corresponding to one or more I/O translation tables stored in a memory system of a computer system that includes the IOMMU; andcontrol logic coupled to the memory and configured to translate an I/O device-generated memory request using the translation data, and wherein the translation data includes a type field indicating one or more attributes of the translation, and wherein the control logic is configured to control the translation responsive to the type field.

2. The IOMMU as recited in claim 1 wherein the type field comprises a plurality of bits, and wherein each bit is indicative of one of the attributes.

3. The IOMMU as recited in claim 1 wherein the type field comprises a pointer to an entry in a table, and wherein the entry stores an indication of the attributes.

4. The IOMMU as recited in claim 3 wherein the table is stored in the memory system.

5. The IOMMU as recited in claim 3 wherein the table is implemented in the IOMMU.

6. The IOMMU as recited in claim 1 wherein the one or more attributes comprise a read permission, and wherein the control logic is configured to permit an I/O device-generated read request to the page if the read permission is in a first state, and wherein the IOMMU is configured to inhibit the read request if the read permission is in a second state.

7. The IOMMU as recited in claim 1 wherein the one or more attributes comprise a write permission, and wherein the control logic is configured to permit an I/O device-generated write request to the page if the write permission is in a first state, and wherein the IOMMU is configured to inhibit the write request if the write permission is in a second state.

8. The IOMMU as recited in claim 1 wherein the one or more attributes comprise a coherence control, and wherein the control logic is configured to modify a coherence attribute of the I/O device-generated request responsive to the coherence control.

9. The IOMMU as recited in claim 8 wherein the control logic, responsive to a first state of the coherence control, forces the I/O device-generated request to be coherent.

10. The IOMMU as recited in claim 9 wherein the control logic, responsive to a second state of the coherence control, passes the coherence indicator of the I/O device-generated request unmodified.

11. The IOMMU as recited in claim 1 wherein the one or more attributes comprise a data placement attribute, and wherein the control logic is configured to indicate a placement of data corresponding to the I/O device-generated request in a particular cache within a cache hierarchy implemented in the computer system.

12. The IOMMU as recited in claim 1 wherein the one or more attributes comprises a cache control attribute, wherein the control logic is configured to control caching of translation data in the memory responsive to the cache control attribute.

13. The IOMMU as recited in claim 12 wherein the cache control attribute comprises a first bit indicating, in a first state, that reuse of the translation is unlikely and thus the translation data should not be cached.

14. The IOMMU as recited in claim 13 wherein the cache control attribute comprises a second bit indicating, in the first state, that reuse of the translation is likely and thus the translation data should be cached.

15. The IOMMU as recited in claim 1 wherein the one or more attributes comprises a prefetch attribute, wherein the control logic is configured to prefetch a translation for at least one additional page responsive to the prefetch attribute.

16. The IOMMU as recited in claim 15 wherein the additional page corresponds to a next sequential virtual address to the virtual address corresponding to the cache control attribute.

17. A memory management unit (MMU) comprising: at least one memory configured to store translation data corresponding to one or more translation entries in one or more translation tables stored in a memory system of a computer system that includes the MMU; andcontrol logic coupled to the memory and configured to translate a memory request using the translation data, and wherein the translation data comprises a pointer that identifies a storage location storing an indication of one or more attributes of the translation.

18. The MMU as recited in claim 17 wherein the storage location is in a table stored in the memory system.

19. The MMU as recited in claim 17 wherein the storage location in a table implemented in the MMU.

20. The MMU as recited in claim 18 wherein the one or more attributes comprises a cache control attribute, wherein the control logic is configured to control caching of translation data in the memory responsive to the cache control attribute.

21. The MMU as recited in claim 20 wherein the cache control attribute comprises a first bit indicating, in a first state, that reuse of the translation is unlikely and thus the translation data should not be cached.

22. The MMU as recited in claim 21 wherein the cache control attribute comprises a second bit indicating, in the first state, that reuse of the translation is likely and thus the translation data should be cached.

23. The MMU as recited in claim 1 wherein the one or more attributes comprises a prefetch attribute, wherein the control logic is configured to prefetch translations for at least one additional page responsive to the prefetch attribute.

24. The MMU as recited in claim 23 wherein the additional page corresponds to a next sequential virtual address to the virtual address corresponding to the cache control attribute.