1. Field
The present work relates generally to wireless communication and, more particularly, to OFDM (Orthogonal Frequency Division Multiplexed) wireless communication.
2. Background
At 114, a channel estimation unit derives a channel estimate from the pilots (or from averages of pilot clusters). One known method is to consider a region in time and frequency (also referred to as a tile) that contains four pilots (or pilot clusters), one for each of the following points in the region: (1) lowest frequency at earliest time; (2) highest frequency at earliest time; (3) lowest frequency at latest time; and (4) highest frequency at latest time. The pilot extraction unit 113 makes local complex channel estimates corresponding to each of these four time/frequency extremes. These four local complex channel estimates are provided at 118. (
In addition, an interference estimate 119 is obtained by interference estimator 115, which estimates a fourth component that is orthogonal to the aforementioned constant, linear in time and linear in frequency components. Demodulation/decoding unit 116 uses the channel estimate 120, the interference estimate 119 and the data symbols (provided at 117 by demux unit 112) to demodulate the signal into, e.g., log-likelihood ratios (LLRs). The unit 116 then decodes the demodulation result using a forward-error-correction (FEC) decoder, such as a Viterbi or turbo decoder, to produce at 121 a received version of the transmitted payload.
Exemplary embodiments of the present work provide heretofore unrecognized applications for the aforementioned local channel estimates produced at 118 by the pilot extraction unit 113.
According to exemplary embodiments of the present work, additional estimates are derived from the aforementioned local channel estimates. Examples of such additional estimates include estimates of parameters such as the change in channel phase over time, the change in channel phase over frequency, and frequency selectivity.
Various aspects of a wireless communications system are illustrated by way of example, and not by way of limitation, in the accompanying drawings, wherein:
The detailed description set forth below in connection with the appended drawings is intended as a description of various embodiments of the present work and is not intended to represent the only embodiments in which the present work may be practiced. The detailed description includes specific details for the purpose of providing a thorough understanding of the present work. However, it will be apparent to those skilled in the art that the present work may be practiced without these specific details. In some instances, well known structures and components are shown in block diagram form in order to avoid obscuring the concepts of the present work.
The word “exemplary” is used herein to mean “serving as an example, instance, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.
According to exemplary embodiments of the present work, additional estimates are derived from the aforementioned local channel estimates. Examples of such additional estimates include estimates of parameters such as the change in channel phase over time, the change in channel phase over frequency, and frequency selectivity. The estimates of the changes in channel phase over time and frequency may be produced on a per tile basis, and fed to, e.g., digital phase-locked loops (DPLLs) for integration over many tiles in order to estimate overall time and frequency offsets for the communications link (e.g., a specific mobile to base station link). These overall time and frequency offset estimates are compensated for in a feedback manner by imposing opposite offsets to those estimated. The frequency selectivity (variability) estimate is used to determine an appropriate pilot format for the link. That is, for channels that exhibit high frequency variability or selectivity (which indicates a large channel delay spread), a pilot format with more frequency samples may be desirable.
In order to make an estimate of the frequency offset in the receiver, some embodiments use a measure of the phase change, over a given tile, from the earliest complex channel estimates to the latest complex channel estimates. Similarly, in order to make an estimate of the time offset in the receiver, some embodiments use a measure of the phase change, over the tile, from the lowest frequency complex channel estimates to the highest frequency complex channel estimates.
With reference to
For example, a simple phase difference estimate may be obtained by taking
diffEst=imag(P23×P01*), (1)
where P01* is the complex conjugate of P01.
This can also be written as
diffEst=|P23|×|P01|×sin(angle(P23)−angle(P01)), (2)
which for small angles is approximately
diffEst=|P23|×|P01|×(angle(P23)−angle(P01)). (3)
This diffEst is used, e.g., in a digital phase-locked loop (DPLL) to gradually correct the frequency error, so that the average of diffEst will gradually tend towards zero.
A phase difference between the early average P01 and the late average P23 is estimated by multiplying the late average P23 by the complex conjugate, P01*, of the early average P01, and then extracting the imaginary component of the multiplication result 312. The extracted imaginary component 313 provides an approximation of the phase difference, due to frequency offset, between the time corresponding to the late average P23 and the time corresponding to the early average P01. As tiles are received, possibly at random times, from a given user, the phase difference estimates derived at 313 are scaled and integrated in an error integrator (also referred to herein as a loop filter) 314 that includes an adder 315 and a register 316. The output 317 of the error integrator 314 is a free-running estimate of the frequency offset between the transmitter and receiver. It is used as in input to a numerically-controlled oscillator (NCO) 318 which controls the derotator 310 to derotate the incoming signal. The NCO 318 comprises a phase accumulator (which includes a register 320 and an adder 319), and a sine/cosine lookup table 322 that produces complex sinusoid values 321 in response to phase values produced by the phase accumulator.
In similar fashion, phase differences between the channel estimates at the highest and lowest frequencies of the tile may be used to drive a DPLL to correct a time offset.
A phase difference between the low-frequency average P02 and the high-frequency average P13 is produced by multiplying the high-frequency average P13 by the complex conjugate P02* of the low-frequency average P02, and then extracting the imaginary component of the multiplication result 412. The extracted imaginary component 413 provides an approximation of the phase difference, due to timing offset, between the frequency corresponding to the high-frequency average P13 and the frequency corresponding to the low-frequency average P02. As tiles are received, possibly at random times, from a given user, the phase estimates derived at 413 are scaled and integrated in an error integrator 314, comprising an adder 315 and a register 316. The output 417 of the error integrator 314 is a free-running estimate of the timing offset between the transmitter and receiver. This estimate 417 is input to the digital resampling circuit 410 to control the time shifting operation.
Although, in a fading channel, the amplitude may randomly be similar at multiple frequencies, if there is multipath present, at some point, if the delay spread is large enough, there will be a large difference between adjacent frequency channel estimate magnitudes. In some embodiments, estimates are taken over several time/frequency regions, so that several points in frequency are obtained. A metric of the variation over frequency is then determined, for example, the highest magnitude divided by the lowest magnitude over all frequencies.
and a minimum (that is, deepest) normalized fade is obtained as
F
DEEP=min(A0,A1 . . . AN-1)/AAVG. (5)
If the deepest fade falls below a predetermined threshold, then it may be deemed that the channel is exhibiting frequency variation or selectivity. In some embodiments, the calculation of FDEEP is done over a single OFDM symbol, e.g. on A0, A1, A2 corresponding to P0, P1, P2. (This would correspond to N=3 in equations 4 and 5). In some embodiments, the calculation is done by first averaging in time to work with averages A03, A14, A25 which are, respectively, the averages of A0 and A3; A1 and A4; and A2 and A5. A frequency selectivity estimator 1600 according to exemplary embodiments of the present work is illustrated diagrammatically in
The output of the divider 1603 is FDEEP, which is compared at 1604 to a threshold value TH. If FDEEP falls below the threshold TH, this indicates that more frequency samples are warranted for the channel estimate. That is, this information may be used to switch between different pilot formats containing respectively different pilot frequency spacings, if available. For example, if it is deemed that the channel exhibits enough selectivity, i.e., FDEEP<TH, then an upper layer may request a signal format containing more pilots per frequency.
Conversely, if it is deemed that the channel exhibits little selectivity (e.g., FDEEP>>TH), corresponding to a small channel delay spread, then an upper layer may request a signal format containing fewer pilots per frequency be sent. The compare result at 1605 is thus provided to an upper layer pilot format selector 1606, which selects the pilot format based on the compare result 1605.
In some embodiments, an interference estimation unit performs interference estimation by extracting interference estimates in each time/frequency region, and estimating the average interference level and/or interference statistics. An exemplary embodiment is shown at 1700 in
In some embodiments, the frequency ranges of the tiles are known to the further processor 1701. This permits the further processor 1701 to provide the information 1702 on a sub-band basis, where a sub-band is a range of frequencies that is smaller than the entire band being processed, and may contain multiple tiles.
The frequency error correction that is applied to the output of the demux unit 112 comprises two parts. For small frequency errors, little inter-tone interference is created, and the correction can effectively be done by a phase-correct-per-symbol unit 910 that multiplies all of the tones of the symbol by a single complex phasor at 321A. For larger errors, inter-tone interference may arise, and the value of a tone may have to be corrected by interpolation, using surrounding tones. This is done by an interpolation-in-frequency unit 911.
The phase-correct-per-symbol unit 910 performs correction over the entire symbol by multiplying all of the tones of that symbol by a single phasor at 321A. For this purpose, an NCO 318A provides the single phasor value per OFDM symbol. The structure of the NCO 318A is the same as that of the NCO 318 (see also
As mentioned above, for larger frequency offsets, the value of a tone may need to be corrected by interpolation, using surrounding tones. Some embodiments use the following example interpolation procedure. Consider a set of transmitted tones of an OFDM symbol, in this case BPSK values of +1 and −1, as in
If however, there is a frequency error between the transmitter and receiver, the continuous spectrum waveform is sampled at offset points in frequency, yielding corrupted tone values, as shown in
sinc(x)=1for x=0; (6)
sinc(x)=sin(π*x)/(π*x)for x≠0. (7)
Note that, in general, the taps would be selected as sinc(k−ε), where ε is the frequency offset (in units of tone spacing) provided at 317 by the frequency correction loop filter 314A. The taps are generated in response to the frequency offset ε by a tap generator 912, and are provided to the interpolation-in-frequency unit 911. Various embodiments use various numbers of taps and/or various interpolating functions other than the sinc function. The taps depend upon the current frequency error estimate ε provided at 317 by frequency correction loop filter 314A. The interpolation-in-frequency unit 911 is a filter whose taps are provided by the tap generator 912. The filter operation convolves the taps with the tone values received from the phase-correct-per-symbol unit 910 to provide corrected tone values as shown in
Note that the frequency error estimate is provided at 317 by the frequency correction loop filter 314A on a per-user basis, so the frequency correction loop filter 314A stores state information for each user, and may otherwise be the same as the loop filters 314 in
Those of skill in the art would understand that information and signals may be represented using any of a variety of different technologies and techniques. For example, data, instructions, commands, information, signals, bits, symbols, and chips that may be referenced throughout the above description may be represented by voltages, currents, electromagnetic waves, magnetic fields or particles, optical fields or particles, or any combination thereof.
Those of skill would further appreciate that the various illustrative logical blocks, modules, circuits, and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware, computer software, or combinations of both. To clearly illustrate this interchangeability of hardware and software, various illustrative components, blocks, modules, circuits, and steps have been described above generally in terms of their functionality. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the overall system. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present work.
The various illustrative logical blocks, modules, and circuits described in connection with the embodiments disclosed herein may be implemented or performed with a general purpose processor, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA) or other programmable logic device, discrete gate or transistor logic, discrete hardware components, or any combination thereof designed to perform the functions described herein. A general purpose processor may be a microprocessor, but in the alternative, the processor may be any conventional processor, controller, microcontroller, or state machine. A processor may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.
The steps of a method or algorithm described in connection with the embodiments disclosed herein may be embodied directly in hardware, in a software module executed by a processor, or in a combination of the two. A software module may reside in RAM memory, flash memory, ROM memory, EPROM memory, EEPROM memory, registers, hard disk, a removable disk, a CD-ROM, or any other form of storage medium known in the art. An exemplary storage medium is coupled to the processor such that the processor can read information from, and write information to, the storage medium. In the alternative, the storage medium may be integral to the processor. The processor and the storage medium may reside in an ASIC. The ASIC may reside in a user terminal. In the alternative, the processor and the storage medium may reside as discrete components in a user terminal.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use products that embody principles of the present work. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the disclosure. Thus, the present work is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.