Using Pulse Density Modulation for Controlling Dimmable Electronic Lighting Ballasts

Abstract

Pulse Density Modulation (PDM) is used to control the amount of light from a fluorescent lamp by applying a voltage to the lamp filaments at a low frequency that is approximately at a series resonant frequency of the lamp ballast inductor and the lamp filament capacitor, no voltage and a voltage at a high frequency. The lamp gas ionizes to produce light only when the low frequency voltage is applied. The fluorescent lamp gas does not ionize when the voltage at the high frequency is applied, but the high frequency voltage keeps the lamp filaments warm during low light output conditions. The low frequency, no and high frequency voltages have time periods that occur within a modulation frame time period that repeats continuously. The ratio of the low frequency voltage time period, and the no voltage and/or high frequency voltage time periods determine the light output of the fluorescent lamp.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete understanding of the present disclosure thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings wherein:

FIG. 1 illustrates a schematic diagram of a typical resonant circuit fluorescent dimmable lighting ballast and fluorescent lamp circuit;

FIG. 2 illustrates a schematic diagram of an equivalent circuit of FIG. 1 wherein the fluorescent lamp gas has not yet ionized;

FIG. 3 illustrates a schematic diagram of an equivalent circuit of FIG. 1 wherein the fluorescent lamp gas has ionized and current is flowing therethrough;

FIG. 4 illustrates a frequency versus current response of a fluorescent lamp circuit before gas ionization;

FIG. 5 illustrates a relationship between the drive frequency and the fluorescent lamp current;

FIG. 6 illustrates a schematic diagram of a typical circuit for converting a square wave into two drive signals to turn on and off the power MOSFETs;

FIG. 7 illustrates a schematic diagram of pulse density modulation fluorescent lamp dimming circuit, according to a specific example embodiment of this disclosure;

FIGS. 8 and 9, illustrate schematic waveform timing diagrams for low and high operating frequencies, F_Low and F_High respectively, according to a specific example embodiment of this disclosure;

FIG. 10 illustrates a timing diagram of a ‘Modulation Frame’ that may be used to dim the lamp as well as maintain filament temperature, according to a specific example embodiment of this disclosure;

FIG. 11 illustrates a schematic diagram of the fluorescent lamp circuit of FIG. 7 with a current sense resistor, according to another specific example embodiment of this disclosure;

FIG. 12 illustrates a schematic block diagram of a predominately hardware implementation of a PDM generation peripheral for a lamp dimmer system, according to still another specific example embodiment of this disclosure.

FIG. 13 illustrates a timing diagram for one frame of a PDM lamp driving frame; and

FIG. 14 illustrates a schematic block diagram of a software assisted PDM generation peripheral for a lamp dimmer system, according to yet another specific example embodiment of this disclosure.

While the present disclosure is susceptible to various modifications and alternative forms, specific example embodiments thereof have been shown in the drawings and are herein described in detail. It should be understood, however, that the description herein of specific example embodiments is not intended to limit the disclosure to the particular forms disclosed herein, but on the contrary, this disclosure is to cover all modifications and equivalents as defined by the appended claims.

DETAILED DESCRIPTION

Referring now to the drawings, the details of specific example embodiments are schematically illustrated. Like elements in the drawings will be represented by like numbers, and similar elements will be represented by like numbers with a different lower case letter suffix.

According to teachings of this disclosure, a pulse density modulation technique for dimming a fluorescent lamp may be implemented by using an integrated circuit digital device, e.g., microcontroller integrated circuit. Referring now to FIG. 7, depicted is a schematic diagram of pulse density modulation fluorescent lamp dimming circuit, according to a specific example embodiment of this disclosure. The pulse density modulation fluorescent lamp dimming circuit, generally represented by the numeral 700, may comprise a microcontroller 702, a high and low side metal oxide semiconductor field effect transistor (MOSFET) driver 704, a high-side power MOSFET 706, a low-side power MOSFET 708, an inductor 710, a fluorescent lamp 712, a filament capacitor 716, and a DC blocking capacitor 714. The MOSFET driver 704 may be used to translate the low output voltages of the microcontroller 702 to the high voltage levels required to operate the high side power MOSFET 706 and the low side power MOSFET 708. The microcontroller 702 may be used to switch the high-side driver ON or OFF, and the low-side drive OFF or On, respectively, of the MOSFET driver 704. When the high-side drive is ON the high-side power MOSFET 706 allows current to flow through the resonant RLC fluorescent lamp circuit (inductor 710 and DC blocking capacitor 714) in one direction, and when the low-side drive is ON the low-side power MOSFET 708 allows current to flow through the resonant RLC fluorescent lamp circuit (inductor 710, fluorescent lamp 712 and DC blocking capacitor 714) in the other direction. The high-side power MOSFET 706 and the low-side power MOSFET 708 cannot be both ON at the same time. Also a dead band is desirable, e.g., the high-side power MOSFET 706 and the low-side power MOSFET 708 are both OFF. This may be easily accomplished with software instructions running in the microcontroller 702. The microcontroller 702 may synthesize an alternating current (AC) signal by alternatively turning on the high-side and low-side outputs of the MOSFET driver 704. By carefully controlling the time duration of the high-side and low-side outputs of the MOSFET driver 704, an AC drive signal having a specific frequency may be synthesized.

Referring now to FIGS. 8 and 9, depicted are schematic waveform timing diagrams for low and high operating frequencies, F_Low and F_High respectively, according to a specific example embodiment of this disclosure. FIG. 8 shows the low operating frequency waveform, F_Low, and FIG. 9 shows the high operating frequency waveform. When the high side drive signal is high, the low side drive signal is low, and visa-versa. There is a dead band time where both the high side and the low side drive signals are low. These waveforms may be used to synthesize the following frequencies: F_Low, F_High and a DC signal (no current flow) when the high-side power MOSFET 706 and the low-side power MOSFET 708 are both off.

The signals generated by the microcontroller 702 are effectively square waves with a duty cycle of, for example but not limited to, 50 percent. An alternative description of these AC signals is that of a pulse train. Within an interval of time, the actual number of these ‘pulses’ can be measured. A ‘high’ frequency signal will have more pulses in a given time interval than a ‘low’ frequency signal. An alternate method of measuring these signals is by their pulse density. At a fixed duty cycle, a high frequency signal has high pulse density; a low frequency signal has low pulse density.

Varying the pulse density of a signal is known as “Pulse Density Modulation” (PDM). The three synthesized frequencies referenced hereinabove may be defined as PDM states as follows: (1) State_Off, (2) State_Low, and (3) State_High. For both of the active waveform states shown in FIGS. 8 and 9, i.e., State_Low and State_High, respectively, there is a dead band interval between level transitions of the MOSFET drive signals from the microcontroller 702. This dead band interval assures that the currently active power MOSFET is given a sufficient amount of time to turn off before the complimentary power MOSFET is driven on. Dead-banding is a common technique that may be performed via the software running on the microcontroller 702. For example, each cycle in State_Low and State_High is initiated by the assertion of the ‘high-side’ driver, followed by its de-assertion; then a dead band time interval, next the ‘low-side’ driver is asserted, and followed by its de-assertion. This cycle sequence repeats for the duration of these PDM states.

According to the teachings of this disclosure, Pulse Density Modulation (PDM) may be used to achieve the aforementioned requirements (desired features) of a dimmable fluorescent lamp circuit. These requirements were stated previously and are repeated herein: (1) Vary the brightness of the fluorescent lamp so that thermal effects on the fluorescent lamp are compensated. (2) Obtain adequate resolution in the dimming circuit so brightness changes are smooth to the human eye and not visibly quantized. (3) ‘Preheat’ the filaments until the gas in the fluorescent lamp is partially ionized and able to ignite. And (4) maintain filament temperature at low brightness levels to keep the fluorescent lamp from going out and to prevent the filaments from developing ‘hot spots.’

Preheat

At lamp power-up, it is important for both of the power MOSFETs 706 and 708 to be OFF, so the dimmer control system is initially in State_Off. The dimmer control system is then subsequently brought into State_High. At this state the dimmer control system is best represented as the equivalent circuit shown in FIG. 2, and the filaments will have current passing through them, e.g., the fluorescent lamp is undergoing ‘Preheating.’ The dimmer control system may be kept in State_High for a time deemed sufficient to warm the filaments to their ‘Strike’ temperature. The amount of time required for a particular dimmer control system to stay in State_High will be a function of the physics of that particular fluorescent lamp, and is known to one skilled in fluorescent lamp technology.

The lamp gas may now be ignited by having the dimmer control system enter the State_Off. The filaments are now hot after the ‘Preheat’ interval. The last ‘high-side’ cycle of State_High forced current into the inductor 710 of the RLC circuit. The assertion of the ‘low-side’ cycle only allows a path for current to flow. The inductor cannot allow current to instantaneously cease flowing so the voltage across the lamp will build until the gas ‘strikes.’Once ignition occurs, FIG. 3 best represents the equivalent RLC circuit, at this point the fluorescent lamp is said to be ‘lit.’ Note that the time needed for this ‘strike’ to occur is very short, e.g., it is short enough to occur within the ‘low-side’ assertion interval.

Controlled Lamp Brightness and Thermal Compensation

When the lamp 712 is commanded to be at full brightness, the dimmer control system shall be constantly in State_Low. In this PDM state, the dimmer control system is at a constant pulse density and it's equivalent circuit is best modeled as shown in FIG. 3. That is, when lit and running, and when commanded to be at full brightness, the power MOSFETs 706 and 708 are driven only at the State_Low frequency.

Conversely, when commanded to be off, the dimmer control system is held in State_Off, where the lamp RLC circuit is not driven at any frequency. Actually, it is not driven at all. Note that there are actually two states where there is substantially no lamp gas current, e.g., lamp gas is non-conducting. This no lamp gas current condition is when the lamp is being driven during State_High and State_Off. Only State_Low causes current through the lamp gas.

When commanded to be at some middle brightness, the system may be modulated between the State_Low and State_Off states. That is, when lit and running, the dimmer control system is brought from a full brightness state to a fully off state and back. The ratio between the State_Off and State_Low durations determines the apparent brightness of the lamp to the eye.

Modulation of the pulse density needs to be at a rate faster than the human eye can notice. Typically, the human eye will notice flicker at a rate slower than about 30 Hz. If the modulation rate were much higher than this, flicker would not be an issue. For example, experimentation with modulation rates around 300 Hz has resulted in no noticeable flicker in either helical compact or linear fluorescent lamp tubing. Therefore, modulating the pulse density of the lamp drive signals can control the apparent brightness of the lamp by toggling between the State_Low and State_Off states and controlling the amount of time spent in each of these states.

Maintaining filament temperature so that no hot spots will develop may be accomplished by dividing the time that the lamp gas is not ionized, e.g., when in the State_Off or State_High states. Referring now to FIG. 10, depicted is a timing diagram of a ‘Modulation Frame’ that may be used to dim the lamp as well as maintain filament temperature, according to a specific example embodiment of this disclosure. FIG. 10 shows the two MOSFET drive signals together for the purpose of clarity. There is one complete modulation frame shown and two partial ones to either side of it in time. The entire frame time is preferably less than one thirtieth of a second to avoid flicker, i.e., 1/30 is greater than or equal to t1+t2+t3 (Equation 1). Where time interval t1 is the duration of State_Low, time interval t2 is the duration of State_Off, and time interval t3 is the duration of State_High. During t1, the lamp is driven at full brightness as it is currently in State_Low. In both the t2 and t3 intervals, the lamp is driven Off. Interval t2 has the lamp not driven at all. Interval t3 has the lamp circuit in State_High. When in the State_High state, FIG. 2 shows the appropriate equivalent circuit for the dimmer control system, and current is sent through the filaments, but the lamp gas is not ionized.

An Apparent Brightness Duty Cycle (ABDC) may be defined herein as:

ABDC=t1/(t1+t2+t3)  (Equation 2)

The ABDC value, as with other Duty Cycle calculations may be expresses as a percentage. Thus, 100% ABDC means that the lamp is fully on (maximum brightness). A 0% ABDC means the lamp is fully Off (no light). A mid-percentage value of ABDC, e.g., 50%, means the lamp is driven fully on half the time and is left off the other half of the time.

The Maximum Lamp Power (MLP) may be defined herein as the wattage when the lamp is run at 100% ABDC. The MLP is a function of the physics of the lamp and is well know to those having ordinary skill in the art of fluorescent lamps. What is important to know is that there is a specified maximum power value for the lamp(s) when it is driven at its low frequency value (F_Low).

The Maximum Filament Power (MFP) may be defined herein as the wattage when the lamp is run in State_High continuously. The MFP is a function of the electrical resistance of the lamp filament and the choice of L and Cf, it is not important to this disclosure. Suffice it to say that there is a theoretical maximum power value for the lamp filament when it is driven at its high frequency value (F_High).

The Resultant Lamp Power (RLP) and the Resultant Filament Power (RFP) may be defined herein as:

RLP=ABDC*MLP  (Equation 3)

RFP=t3/(t1+t2+t3)*MFP  (Equation 4)

Wherein the RLP is a measure of the lamp's luminous power and is expressed in Watts. The RFP is a measure of the filament's thermal power and is also expressed in Watts.

When the system is run at low Resultant Lamp Power (RLP), a certain Resultant Filament Power (RFP) level must be maintained. The reason for this is more fully described hereinabove (e.g., filament hot spots and loss of gas ionization). At low lamp power levels there is a tendency for the lamp to cool and go out. Also, the possibility of damaging filament hot spots developing goes up at low lamp temperatures.

The exact amount of RFP required for a given lamp design driven at a certain RLP will depend on the physics of that lamp and is not part of this disclosure. However, according to specific example embodiments of this disclosure, a lamp filament will be able to maintain its minimum operating temperature through the use of software program steps running on the digital device. Thus, there is no need to incorporate any added circuitry to bias the filaments so as to maintain a certain desired temperature thereon.

Brightness Stability and Feedback Control

Referring now to FIG. 11, depicted is a schematic diagram of the fluorescent lamp circuit of FIG. 7 with a current sense resistor, according to another specific example embodiment of this disclosure. When a sense resistor 1116 is added to the circuit of FIG. 7, feedback control of the apparent brightness may be implemented by measuring the current through the sense resistor 1116. The current through the sense resistor 1116 is substantially the same as the current through the lamp 712. The current through the sense resistor 1116 will produce a voltage across the sense resistor 1116 that is proportional to the lamp current. This voltage may be fed into an analog-to-digital converter (ADC) of the microcontroller 702a. The software running on the microcontroller 702a may now be used to determine a number of conditions of the operation of the fluorescent lamp 712. For example: (1) Has one of the filaments “burned out?” (2) What is the current through the filaments during preheat and is it excessive? (3) Is the lamp currently ON? And (4) what is the current across the lit lamp and is it at the desired current level?

The software program running in the microcontroller 702a may make decisions based upon the answers to these questions. If the lamp dimmer system is in State_High, then conditions 1 and 2 may be determined. If no current is detected, then it is an open circuit, and so the filaments must be ‘burned out.’ The value that the ADC 1118 of the microcontroller 702a produces will tell the software program the present value of the lamp filament current. If the lamp dimmer system is in State_Low, then conditions 3 and 4 may be determined. If no current is detected, then it is an open circuit, and so the lamp must be out. When lit, if the lamp current is outside where it is expected to be, then the ABDC can be adjusted to compensate. There are a number of feedback control techniques that may be implemented to stabilize the operation of the lamp brightness. A common technique known in the literature as PID control (proportional, Integral, Differential) may be implemented in software to maximize stability of the lamp brightness. A PID control loop may use this analog input representing lamp brightness to adjust the Apparent Brightness Duty Cycle (ABDC) so as to deliver a consistent perceived lamp brightness level.

That is, if the user of the lamp adjusts the lamp control to demand a 70% brightness level, the software program running on the microcontroller 702a may consider this as the demanded brightness level. A check of the current through the lamp will indicate the present apparent brightness of the lamp. If the values don't agree, the ABDC may be adjusted up or down to increase or decrease the Resultant Lamp Power (RLP), respectively. As the lamp increases or decreases in temperature because of its new brightness setting, the apparent brightness will drift. The feedback control via the microcontroller's software program will maintain the demanded brightness regardless of temperature transitions (e.g., drift or transients) in the lamp 712.

The Pulse Density Modulation (PDM) technique disclosed herein allows for easy implementation of a software feedback control program in the microcontroller 702a, according teachings of this disclosure. While maintaining the user desired brightness of the fluorescent lamp 712, this PDM technique may maintain temperature on the lamp filaments, thus extending the life the lamp filaments and also preventing the fluorescent lamp 712 from going out due to low filament temperature.

It is contemplated and within the scope of this disclosure, that the MOSFET drivers 704 may be driven directly from General Purpose I/O pins of the microcontroller 702. This eliminates the need for costly VCO circuits on or with the microcontroller. In addition, deadbanding may be implemented with a software program running in the microcontroller 702, thus eliminating the need for external logic circuits to perform this task. Furthermore, the lamp may be started via pre-heating the filaments and striking the gas ionization under control of the software program running in the microcontroller 702. The software program may dim the fluorescent lamp 712 via the PDM, and the number of brightness levels may be so numerous (very fine granularity) that ‘sweeping’ through them would appear as smooth as that seen with dimming of incandescent lamps. It is also contemplated and with the scope of this disclosure that a low pin count microcontroller may be used to implement the lamp dimmer system, resulting in quite a cost savings for the manufacturer as well as a wealth of reliability and functionality improvement to their products.

It is contemplated and within the scope of this disclosure that the digital device may be used, with appropriate software programming to: (1) active power factor correction (PFC) to increase lamp efficiency, (2) remote control protocols such as digital addressable lighting interface (DALI), IEEE 802.15.04 or Zigbee, and/or (3) battery charging for emergency lighting ballasts. The software program may be stored in non-volatile memory and may be implemented in the digital device as “firmware.” A relatively inexpensive digital device, e.g., microcontroller, may run from an internal clock oscillator.

Referring now to FIG. 12, depicted is a schematic block diagram of a predominately hardware implementation of a PDM generation peripheral for a lamp dimmer system, according to still another specific example embodiment of this disclosure. The predominately hardware implementation may be accomplished with a digital device, e.g., microcontroller, generally represented by the numeral 1200. The microcontroller may be used as a hardware peripheral that would automatically create the required control signals necessary to control operation and dimming of a fluorescent lamp(s) and require only minimum software program overhead. The pulse density modulation (PDM) scheme is relatively simple in concept and may easily be implemented in firmware in the microcontroller 1200. In addition, it may be beneficial from a cost and reliability standpoint to derive other features, e.g., active power factor correction (PFC) to increase lamp efficiency, remote control protocols such as DALI or Zigbee, and/or battery charging for emergency lighting ballasts, by utilizing the programmable capabilities of the microcontroller 1200.

The microcontroller 1200 may be configured for and comprise the following functional blocks. A Frame Sequencer Block 1202, a Frame Sequencer Timebase 1204, a Frequency Generator Block 1206, a Frequency Generator Timebase 1208, and a Dead-Time Generator 1210. The Dead-Time Generator 1210 may have FGH 1212 and FGL 1214 outputs and a /FAULT 1216 input.

The Frame Sequencer Timebase 1204 and Frequency Generator Timebase 1208 may be basic synchronous timers having a system clock input, a prescaler and a timebase. The Frame Sequencer Block 1202 may be used to specify the duration of each phase within a lamp driving frame, as shown in FIG. 13. The duration of the frame may be specified by the rollover period of the Frame Sequencer Timebase 1208. There are two compare registers which specify the end of the pre-heat (State_High.-high-frequency-F_High) and the lamp-on (State_Low-resonant frequency-F_Low) periods. The lamp may be off (State_Off) for the remainder of the Frame Sequencer period.

The Frequency Generator Block 1206 may have two period registers so that two different frequencies may be generated. The Frame Sequencer Block 1202 sends control signals to the Frequency Generator Block 1206 that specify which period (frequency) to use. The first preheat frequency may be skipped if the Pre-heat Compare time is 0. The output will always be 0 (off) during the third phase of the frame. The Frequency Generator block 1206 will wait for the end of a period before switching to the next frequency state.

The Dead Time Generator 1210 may generate complementary output signals, FGH 1212 and FGL 1214, having switching delay between each transition. The Dead Time Generator 1210 may be used to drive a half-bridge inverter circuit, e.g., power MOSFETs 706 and 708. An asynchronous shutdown input /FAULT 1216 may also be provided for external hardware faults.

Referring now to FIG. 14, depicted is a schematic block diagram of a software assisted PDM generation peripheral for a lamp dimmer system, according to yet another specific example embodiment of this disclosure. The amount of hardware required to implement a PDM generation peripheral may be cost prohibitive. If this is the case, a ‘software assisted’ version of the PDM generation peripheral may be implemented as shown in FIG. 14.

The PDM generation peripheral may be easily and inexpensively implemented using currently available microcontroller hardware. An Enhanced Capture/Compare/PWM (ECCP) module with timebase 1402 and output logic 1404 may be used to generate the frequency output to the lamp ballast inverter, e.g., power MOSFETs 706 and 708. The ECCP timebase interrupt signal 1406 may be routed internally to a second timebase 1408 and used to increment that timebase 1408. The second timebase 1408 keeps track of the time spent in each frequency state (see FIG. 13). Therefore, the central processing unit (CPU) of the microprocessor is only interrupted when the second timebase 1408 overflows (interrupt 1410). This process is analogous to a microcontroller motor control where the CPU only needs to be interrupted at commutation events, which occur at a much lower rate than does the PWM frequency. A new period register 1412 and duty cycle register 1414 may be loaded at each interrupt event of the second timebase 1408. The output logic 1404 may have the ability to be placed in the ‘OFF’ state and still keep the ECCP timebase 1402 running. This allows for timing of the ‘OFF’ state (State_Off) by software control from the microcontroller.

While embodiments of this disclosure have been depicted, described, and are defined by reference to example embodiments of the disclosure, such references do not imply a limitation on the disclosure, and no such limitation is to be inferred. The subject matter disclosed is capable of considerable modification, alteration, and equivalents in form and function, as will occur to those ordinarily skilled in the pertinent art and having the benefit of this disclosure. The depicted and described embodiments of this disclosure are examples only, and are not exhaustive of the scope of the disclosure.

Claims

1. A method for controlling dimmable electronic lighting ballasts using pulse density modulation, said method comprising the steps of: generating a low frequency for a first time period, wherein the low frequency is approximately at a circuit resonant frequency of a dimmable electronic lighting ballast and a fluorescent lamp; andgenerating no frequency for a second time period;wherein the first and second time periods are within a modulation frame time period and the modulation frame time period that repeats continuously.

2. The method according to claim 1, further comprising the step of: generating a high frequency for a third time period, wherein the high frequency is above the circuit resonant frequency of the dimmable electronic lighting ballast and the fluorescent lamp;wherein the first, second and third time periods are within the modulation frame time period that repeats continuously.

3. The method according to claim 1, wherein the first time period is substantially 100 percent of the modulation frame time period when the fluorescent lamp is at maximum brightness.

4. The method according to claim 1, wherein the second time period is substantially 100 percent of the modulation frame time period when the fluorescent lamp is off.

5. The method according to claim 1, wherein the first time period is less than 100 percent of the modulation frame time period when the fluorescent lamp is at less than maximum brightness.

6. The method according to claim 1, wherein the modulation frame time period is less than or equal to 1/30 of a second.

7. The method according to claim 2, wherein the first time period is less than 100 percent of the modulation frame time period when the fluorescent lamp is at less than maximum brightness.

8. The method according to claim 7, wherein the third time period is enough percent of the modulation frame time period so as to keep the fluorescent lamp filaments warm.

9. The method according to claim 7, further comprising the step of measuring a fluorescent lamp current.

10. The method according to claim 9, further comprising the step of determining conditions of the fluorescent lamp from the measured fluorescent lamp current.

11. The method according to claim 10, wherein the conditions of the fluorescent lamp are selected from the group consisting of filament burnout, excessive filament current during preheat, fluorescent lamp on, and current through lit fluorescent lamp.

12. The method according to claim 9, further comprising the step of adjusting the first time period percent of the modulation frame time period so as to keep the measured fluorescent lamp current at a desired value.

13. The method according to claim 9, further comprising the steps of adjusting the second time period and third time period percents of the modulation frame time period so as to keep the fluorescent lamp filaments at a desired temperature.

14. The method according to claim 1, further comprising the step of correcting power factor.

15. The method according to claim 1, further comprising the step of remotely controlling the first and second time periods so as to remotely control the fluorescent lamp light output.

16. The method according to claim 15, the step of remotely controlling comprises the step of remotely controlling with a digital addressable lighting interface (DALI) protocol.

17. The method according to claim 15, the step of remotely controlling comprises the step of remotely controlling with a Zigbee protocol.

18. The method according to claim 15, the step of remotely controlling comprises the step of remotely controlling with an IEEE 802.15.4 protocol.

19. The method according to claim 1, further comprising the step of controlling a battery charger for emergency lighting.

20. A dimmable fluorescent lamp system having an electronic lighting ballast using pulse density modulation for controlling the amount of light produced by the fluorescent lamp, said system comprising: a digital device having a first output and a second output;a first power switch having a control input coupled to the first output of the digital device;a second power switch having a control input coupled to the second output of the digital device;an inductor coupled to the first and second power switches, wherein the first power switch couples the inductor to a supply voltage, the second power switch couples the inductor to a supply voltage common, and the first and second power switches decouple the inductor from the supply voltage and supply voltage common, respectively;a direct current (DC) blocking capacitor coupled to the supply voltage common;a fluorescent lamp having first and second filaments, wherein the first filament is coupled to the inductor and the second filament is coupled to the DC blocking capacitor; anda filament capacitor coupling together the first and second filaments of the fluorescent lamp;wherein the digital device: generates a low frequency signal for a first time period, the low frequency being approximately at a series resonant frequency of the inductor and the filament capacitor, andgenerates no signal for a second time period,wherein the first and second time periods are within a modulation frame time period and the modulation frame time period repeats continuously.

21. The system according to claim 20, wherein the digital device: generates a high frequency signal for a third time period, the high frequency signal is above the series resonant frequency of the inductor and the filament capacitor; andthe first, second and third time periods are within the modulation frame time period that repeats continuously.

22. The system according to claim 20, wherein the first time period is substantially 100 percent of the modulation frame time period when the fluorescent lamp is at maximum brightness.

23. The system according to claim 20, wherein the second time period is substantially 100 percent of the modulation frame time period when the fluorescent lamp is off.

24. The system according to claim 20, wherein the first time period is less than 100 percent of the modulation frame time period when the fluorescent lamp is at less than maximum brightness.

25. The system according to claim 20, wherein the modulation frame time period is less than or equal to 1/30 of a second.

26. The system according to claim 21, wherein the first time period is less than 100 percent of the modulation frame time period when the fluorescent lamp is at less than maximum brightness.

27. The system according to claim 26, wherein the third time period is enough percent of the modulation frame time period so as to keep the fluorescent lamp filaments warm.

28. The system according to claim 26, further comprising a fluorescent lamp current measurement resistor coupled between the DC blocking capacitor and the supply voltage common, wherein the fluorescent lamp current measurement resistor is used for measuring the fluorescent lamp current.

29. The system according to claim 28, wherein a voltage across the fluorescent lamp current measurement resistor is coupled to an analog input of the digital device.

30. The system according to claim 29, wherein the digital device adjusts the first time period percent so as to keep the measured fluorescent lamp current at a desired value.

31. The system according to claim 28, wherein the digital device adjusts the second time period and third time period percents of the modulation frame time period so as to keep the first and second filaments at a desired temperature.

32. The system according to claim 20, wherein the digital device is selected from the group consisting of microprocessor, microcontroller, application specific integrated circuit (ASIC), and programmable logic array (PLA).

33. The system according to claim 21, wherein the digital device comprises: a frame sequencer block;a frame sequencer time base;a frequency generator block;a frequency generator time base; anda dead-time generator;wherein the frame sequencer block determines the first, second and third time periods,the frequency generator block determines the high and low frequency signals, andthe dead-time generator prevents the first and second power switches from both being on at the same time.

34. The system according to claim 21, wherein the digital device is controlled with a software program.