This application relates to Implantable Medical Devices (IMDs), and more specifically to circuitry to assist with sensing neural responses to stimulation in an implantable stimulator device.
Implantable neurostimulator devices are devices that generate and deliver electrical stimuli to body nerves and tissues for the therapy of various biological disorders, such as pacemakers to treat cardiac arrhythmia, defibrillators to treat cardiac fibrillation, cochlear stimulators to treat deafness, retinal stimulators to treat blindness, muscle stimulators to produce coordinated limb movement, spinal cord stimulators to treat chronic pain, cortical and deep brain stimulators to treat motor and psychological disorders, and other neural stimulators to treat urinary incontinence, sleep apnea, shoulder subluxation, etc. The description that follows will generally focus on the use of the invention within a Spinal Cord Stimulation (SCS) or Deep Brain Stimulation (DBS) system. However, the present invention may find applicability with any stimulator device system.
A stimulator system typically includes an Implantable Pulse Generator (IPG) 10 shown in
In the illustrated IPG 10, there are thirty-two electrodes (E1-E32), split between four percutaneous leads 15, or contained on a single paddle lead 19, and thus the header 23 may include a 2×2 array of eight-electrode lead connectors 22. However, the type and number of leads, and the number of electrodes, in an IPG is application specific and therefore can vary. The conductive case 12, or some conductive portion of the case, can also comprise an electrode (Ec). In an SCS application, the electrode lead(s) are typically implanted in the spinal column proximate to the dura in a patient's spinal cord, preferably spanning left and right of the patient's spinal column. The proximal contacts 21 are tunneled through the patient's tissue to a distant location such as the buttocks where the IPG case 12 is implanted, at which point they are coupled to the lead connectors 22. In a DBS application, the electrode leads are implanted in the brain through holes in the skull, and lead extension are used to connect the leads to the IPG which is typically implanted under the clavicle (collarbone). In other IPG examples designed for implantation directly at a site requiring stimulation, the IPG can be lead-less, having electrodes 16 instead appearing on the body of the IPG 10 for contacting the patient's tissue. The IPG lead(s) can be integrated with and permanently connected to the IPG 10 in other solutions. SCS therapy can relieve symptoms such as chronic back pain, while DBS therapy can alleviate Parkinsonian symptoms such as tremor and rigidity. IPGs as described should be understood as including External Trial Stimulators (ETSs), which mimic operation of the IPG during trials periods when leads have been implanted in the patient but the IPG has not. See, e.g., U.S. Pat. No. 9,259,574 (disclosing an ETS).
IPG 10 can include an antenna 27a allowing it to communicate bi-directionally with a number of external devices discussed subsequently. Antenna 27a as shown comprises a conductive coil within the case 12, although the coil antenna 27a can also appear in the header 23. When antenna 27a is configured as a coil, communication with external devices preferably occurs using near-field magnetic induction. IPG 10 may also include a Radio-Frequency (RF) antenna 27b. In
Stimulation in IPG 10 is typically provided by pulses each of which may include a number of phases (30i), as shown in the example of
In the example of
IPG 10 as mentioned includes stimulation circuitry 28 to form prescribed stimulation at a patient's tissue.
Proper control of the PDACs and NDACs allows any of the electrodes 16 to act as anodes or cathodes to create a current through a patient's tissue, R, hopefully with good therapeutic effect. Consistent with the example provided in
Power for the stimulation circuitry 28 is provided by a compliance voltage VH, as described in further detail in U.S. Patent Application Publications 2013/0289665 and 2018/0071520. The compliance voltage VH may be coupled to the source circuitry (e.g., the PDAC(s)), while ground may be coupled to the sink circuitry (e.g., the NDAC(s)), such that the stimulation circuitry 28 is powered by VH and ground. Other power supply voltages may be used with the PDACs and NDACs, and explained in U.S. Patent Application Publication 2018/0071520, but these aren't shown in
Preferably, and as described in U.S. Pat. No. 11,040,202, the compliance voltage VH can be produced by a VH regulator 49. VH regulator 49 receives the voltage of the battery 14 (Vbat) and boost this voltage to a higher value required for the compliance voltage VH. VH regulator 49 can comprise an inductor-based boost converter or a capacitor-based charge pump for example. The regulator 49 can vary the value of VH based on measurements taken from the stimulation circuitry 28 as explained in detail in the '202 patent. Using such measurements allows VH to be established at an energy-efficient level: high enough to form the prescribed current without loading (i.e., without producing less current that prescribed), yet low enough to not needlessly waste power in the stimulation circuitry 28 when forming the prescribed current. In this respect, VH can be variable, and typically ranges from about 5 to 15 Volts.
Also shown in
Referring again to
Charge recovery using phases 30a and 30b is said to be “active” because the P/NDACs in stimulation circuitry 28 actively drive a current, in particular during the last phase 30b to recover charge stored after the first phase 30a. However, because the current sources may not be perfectly balanced or other factors, such active charge recovery may not be perfect, and some residual charge may be present in capacitive structures even after phase 30b is completed. Accordingly, the stimulation circuitry 28 can also provide for passive charge recovery. Passive charge recovery is implemented using passive charge recovery switches PRi 41 as shown in
Passive charge recovery during period 30c may be followed by a quiet period 30d during which no active current is driven by the DAC circuitry, and none of the passive recovery switches 41 are closed. This quiet period 30d may last until the next pulse is actively produced (e.g., phase 30a). Like the particulars of pulse phases 30a and 30b, the occurrence of passive charge recovery (30c) and any quiet periods (30d) can be prescribed as part of the stimulation program.
External controller 60 can be as described in U.S. Patent Application Publication 2015/0080982 for example, and may comprise a portable, hand-held controller dedicated to work with the IPG 10. External controller 60 may also comprise a general-purpose mobile electronics device such as a mobile phone which has been programmed with a Medical Device Application (MDA) allowing it to work as a wireless controller for the IPG 10, as described in U.S. Patent Application Publication 2015/0231402. External controller 60 includes a display 61 and a means for entering commands, such as buttons 62 or selectable graphical icons provided on the display 61. The external controller 60's user interface enables a patient to adjust stimulation parameters, although it may have limited functionality when compared to systems 70 and 80, described shortly. The external controller 60 can have one or more antennas capable of communicating with the IPG 10. For example, the external controller 60 can have a near-field magnetic-induction coil antenna 64a capable of wirelessly communicating with the coil antenna 27a in the IPG 10. The external controller 60 can also have a far-field RF antenna 64b capable of wirelessly communicating with the RF antenna 27b in the IPG 10.
Clinician programmer 70 is described further in U.S. Patent Application Publication 2015/0360038, and can comprise a computing device such as a desktop, laptop, or notebook computer, a tablet, a mobile smart phone, a Personal Data Assistant (PDA)-type mobile computing device, etc. In
External system 80 comprises another means of communicating with and controlling the IPG 10 via a network 85 which can include the Internet. The network 85 can include a server 86 programmed with communication and control functionality, and may include other communication networks or links such as WiFi, cellular or land-line phone links, etc. The network 85 ultimately connects to an intermediary device 82 having antennas suitable for communication with the IPG's antenna, such as a near-field magnetic-induction coil antenna 84a and/or a far-field RF antenna 84b. Intermediary device 82 may be located generally proximate to the IPG 10. Network 85 can be accessed by any user terminal 87, which typically comprises a computer device associated with a display 88. External system 80 allows a remote user at terminal 87 to communicate with and control the IPG 10 via the intermediary device 82.
A stimulator device is disclosed, which may comprise: a plurality of electrode nodes, wherein each of the electrode nodes is associated with a different electrode configured to contact a patient's tissue; stimulation circuitry configurable to provide stimulation to one or more of the plurality of electrode nodes to provide stimulation to the patient's tissue; sense amplifier circuitry comprising a first input and a second input, wherein the sense amplifier circuitry is configurable to receive one of the plurality of electrode nodes at the first input, wherein the sense amplifier circuitry is configured to sense a tissue signal; a detector configured to produce data indicative of the DC offset voltage between the first input and the second input; and control circuitry configured to use the data to control the stimulation circuitry to issue a compensating current at the first input, the second input, or both of the first and second inputs, to reduce or eliminate the DC offset voltage.
In one example, the stimulator device may further comprise a DC-blocking capacitor between each of the electrode nodes and its associated electrode. In one example, the compensating current reduces or eliminates the DC offset voltage by charging or discharging the DC-blocking capacitor associated with the first input. In one example, the one electrode node received at the first input is different from the one or more electrode nodes that provide the stimulation to the patient's tissue. In one example, the one electrode node received at the first input comprises one of the one or more electrode nodes that provide the stimulation to the patient's tissue. In one example, the sense amplifier circuitry is configured to sense a neural response to the stimulation as the tissue signal. In one example, the sense amplifier circuitry is configurable to receive another one of the plurality of electrode nodes at the second input. In one example, the control circuitry is configured to issue the compensating current at the first and second inputs to reduce or eliminate the DC offset voltage. In one example, the compensating currents at the first and second inputs are of opposite polarities. In one example, the electrode nodes received at the first and second inputs are different from the one or more electrode nodes that provide the stimulation to the patient's tissue. In one example, the electrode nodes received at the first and second inputs comprise the one or more electrode nodes that provide the stimulation to the patient's tissue. In one example, the compensating current comprises one or more charge imbalanced pulses. In one example, the control circuitry comprises an algorithm to control the stimulation circuitry to issue the compensating current. In one example, the algorithm is configured to iterate by periodically producing the data indicative of the DC offset voltage, and periodically using the data to control the stimulation circuitry to issue the compensating current. In one example, a charge of the compensating current is adjusted as the algorithm iterates. In one example, the charge of the compensating current is reduced as the algorithm iterates. In one example, at least one initial iteration provides a coarse adjustment to the DC offset voltage, and wherein at least one later iteration provides a fine adjustment to the DC offset voltage. In one example, the algorithm is configured to calculate a charge using the data that eliminates the DC offset voltage, and to control the stimulation circuitry to issue the compensating current with the calculated charge. In one example, the stimulator device further comprises DC offset compensating circuitry configured to issue a DC current. In one example, the algorithm is further configured to enable the DC offset compensation circuitry to issue the DC current at the first input or the second input to reduce or eliminate the DC offset voltage. In one example, the stimulation circuitry is configurable to provide the stimulation to the one or more of the electrode nodes in accordance with a stimulation program. In one example, the detector comprises an Analog-to-Digital Converter (ADC). In one example, the ADC provides a digitized value indicative of the DC offset voltage as the data. In one example, the stimulator device further comprises an ADC configured to produce a digitized waveform of the sensed tissue signal, wherein the digitized waveform comprises a plurality of samples. In one example, the detector is configured to determine whether the digitized waveform is saturated. In one example, the data indicative of the DC offset voltage comprises an indication of high saturation or low saturation. In one example, the indication of high saturation comprises a determination that one or more samples in the digitized waveform are pinned to a maximum of an operating range of the ADC, and wherein the indication of low saturation comprises a determination that one or more samples in the digitized waveform are pinned to a minimum of the operating range of the ADC. In one example, the data comprises one or more digital signals indicative of saturation. In one example, the data comprises a first digital signal indicative of high saturation, and a second digital signal indicative of low saturation. In one example, the detector comprises a window comparator to produce the first and second digital signals.
A method is disclosed for operating a stimulator device comprising a plurality of electrode nodes, wherein each of the electrode nodes is associated with a different electrode configured to contact a patient's tissue. The method may comprise: providing stimulation in accordance with a stimulation program from stimulation circuitry to one or more of the plurality of electrode nodes to provide stimulation to the patient's tissue; using sense amplifier circuitry to sense a tissue signal, the sense amplifier circuitry comprising a first input and a second input, wherein the sense amplifier circuitry receives one of the plurality of electrode nodes at the first input; and controlling the stimulation circuitry to issue a compensating current at the first input, the second input, or both of the first and second inputs, to reduce or eliminate a DC offset voltage between the first input and the second input.
In one example, the stimulator device further comprises a DC-blocking capacitor between each of the electrode nodes and its associated electrode. In one example, the compensating current reduces or eliminates the DC offset voltage by charging or discharging the DC-blocking capacitor associated with the first input. In one example, the one electrode node received at the first input is different from the one or more electrode nodes that provide the stimulation to the patient's tissue. In one example, the one electrode node received at the first input comprises one of the one or more electrode nodes that provide the stimulation to the patient's tissue. In one example, the sense amplifier circuitry is configured to sense a neural response to the stimulation as the tissue signal. In one example, the sense amplifier circuitry receives another one of the plurality of electrode nodes at the second input. In one example, the compensating current is issued at the first and second inputs to reduce or eliminate the DC offset voltage. In one example, the compensating currents at the first and second inputs are of opposite polarities. In one example, the electrode nodes received at the first and second inputs are different from the one or more electrode nodes that provide the stimulation to the patient's tissue. In one example, the electrode nodes received at the first and second inputs comprise the one or more electrode nodes that provide the stimulation to the patient's tissue. In one example, the compensating currents at the first and second inputs are of opposite polarities but have the same amplitude. In one example, the compensating current comprises one or more charge imbalanced pulses. In one example, an algorithm operable in the stimulation device controls the stimulation circuitry to issue the compensating current. In one example, the algorithm controls the stimulation circuitry iteratively to issue the compensating current. In one example, a charge of the compensating current is adjusted as the algorithm iterates. In one example, the charge of the compensating current is reduced as the algorithm iterates. In one example, at least one initial iteration provides a coarse adjustment to the DC offset voltage, and wherein at least one later iteration provides a fine adjustment to the DC offset voltage. In one example, the algorithm calculates a charge using the data that eliminates the DC offset voltage, and controls the stimulation circuitry to issue the compensating current with the calculated charge. In one example, the stimulator device further comprises DC offset compensating circuitry for issuing a DC current. In one example, the algorithm operable in the stimulation device further controls the DC offset compensation circuitry to issue the DC current at the first input or the second input to reduce or eliminate the DC offset voltage. In one example, the stimulator device further comprises an Analog-to-Digital Converter (ADC) to produce a digitized value indicative of the DC offset voltage between the first input and the second input. In one example, the stimulation circuitry is controlled to issue the compensating current in accordance with the digitized value. In one example, the stimulator device further comprises an Analog-to-Digital Converter (ADC) to produce a digitized waveform of the sensed tissue signal, wherein the digitized waveform comprises a plurality of samples. In one example, the method further comprises determining whether the digitized waveform is saturated. In one example, the stimulation circuitry is controlled to issue the compensating current in accordance with the determination whether the digitized waveform is saturated. In one example, the method further comprises determining a first digital signal indicative of high saturation of the DC offset voltage, and a second digital signal indicative of low saturation of the DC offset voltage. In one example, the stimulation circuitry is controlled to issue the compensating current in accordance with the first and second digital signals.
An increasingly interesting development in pulse generator systems is the addition of sensing capability to complement the stimulation that such systems provide. For example, and as explained in U.S. Patent Application Publication 2021/0236829, it can be beneficial to sense a neural response produced by neural tissue that has received stimulation from an IPG. The '829 Publication shows an example where sensing of neural responses is useful in an SCS context, and in particular discusses the sensing of Evoked Compound Action Potentials, or “ECAPs,” in a patient's spinal cord. U.S. Patent Application Publication 2022/0040486 shows an example where sensing of neural responses is useful in a DBS context, and in particular discusses the sensing of Evoked Resonant Neural Activity, or “ERNA,” in a patient's brain. The '829 Publication further discusses the sensing of stimulation artifacts caused by stimulation, as discussed further below. Still further, pulse generator systems may sense other biometric signals from a patient's tissue. Collectively, any of these sensed signals from the tissue comprise a tissue signal in a stimulator system. Discussion below largely focuses on the sensing of an ECAP neural response as a tissue signal of interest as a convenient example.
Electrodes selected as sensing electrodes are provided by the MUX 108 to a sense amplifier (amp) circuitry 110, and sensing can occur differentially using two sensing electrodes, or using a single sensing electrode. These examples are shown in
Although only one sense amp circuit 110 is shown in
The analog waveform comprising the amplified tissue signal is preferably converted to digital signals by an Analog-to-Digital converter (ADC) 112, and input to the IPG's control circuitry 102. The ADC 112 can be included within the control circuitry 102's input stage as well. The control circuitry 102 can be programmed with a neural response algorithm 124 (or a tissue signal analyzer more generally) to evaluate the neural responses, and to take appropriate actions as a result. For example, the neural response algorithm 124 may change the stimulation in accordance with the sensed neural response, and can issue new control signals via bus 118 to change operation of the stimulation circuitry 28 to affect better treatment for the patient. As explained in the above referenced '829 Publication, the neural response algorithm 124 can extract features of the sensed neural response, such as various peak heights, line widths, areas, durations, etc., which may be used to control the stimulation as just described, to determine the effectiveness of stimulation treatment, or for other reasons.
The neural response algorithm 124 may also cause the selection of new sensing electrode(s), which can be affected by issuing new control signals on bus 114. Selecting optimal sensing electrode(s) can be important, and may be determined in light of stimulation that is being provided. In this regard, sensing electrodes may be selected near enough to the electrodes providing stimulation (e.g., E1 and E2) to allow for proper neural response sensing, but far enough from the stimulation (e.g., E5 and E6) that the stimulation doesn't substantially interfere with neural response sensing. See, e.g., U.S. Patent Application Publication 2020/0155019. This is particularly true when sensing ECAP neural responses during Spinal Cord Stimulation (SCS). However, this is not strictly required, and in some instances it can be beneficial to use at least one sensing electrode that is also used to provide stimulation, as discussed further below with reference to
Tissue signals such as neural responses to stimulation are typically small-amplitude AC signals on the order of microVolts or milliVolts, which can make sensing difficult. The sense amp circuitry 110 needs to be capable of resolving this small signal, and this is particularly difficult when one realizes that this small signal typically rides on a background voltage otherwise present in the tissue. As explained in U.S. Patent Application Publication 2020/0305744, which is incorporated by reference in its entirety, this background voltage can be caused by the stimulation itself. This is shown in the waveforms at the bottom of
As noted above, differential sensing is useful because it allows the sense amp circuitry 110 to subtract any common mode voltages like the stimulation artifact 126 present in the tissue, hence making neural responses easier to resolve. However, this will not remove the stimulation artifact 126 completely, because the stimulation artifact 126 will not be exactly the same at each sensing electrode. Therefore, even when using differential sensing, it may be difficult to resolve the small tissue signals such as neural responses which may still ride on a significant background voltage.
U.S. Pat. No. 11,040,202, which is incorporated herein by reference in its entirety, describes tissue biasing circuitry that assists in tissue signal sensing by holding the tissue via a capacitor (such as one of the DC-blocking caps 38) to a common mode voltage, Vcm. This common mode voltage Vcm is preferably established at the conductive case electrode Ec as shown in
Although not shown, there may be more than one diff amp 130 that can be used for neural sensing. For example, as disclosed in U.S. Patent Application Publication 2023/0173273, which is incorporated by reference in its entirety, diff amp 130 can comprise both a low-voltage diff amp (powered by Vdd) and a high-voltage diff amp (powered by VH). Either of these diff amps can be selected to sense a neural response at different times and depending on the circumstances, which each having advantages and disadvantages. For example, if the DC level of the inputs X+ or X− is relatively high, the high-voltage diff amp can be selected; otherwise the low voltage diff amp can be used, which has lower noise performance. The '273 Publication discloses monitoring circuitry to sense the DC levels of the inputs and to select either the low- or high-voltage diff amp in this type of design. The single diff amp 130 shown in
The diff amp 130 outputs a differential analog output at outputs D− and D+ with the appropriate gain: V(D+)−V(D−)=G*(V(X+)−V(X−)). This differential output may be processed further by analog processing circuitry 140 before being digitized at the ADC 112. Processing circuitry 140 can include one or more additional diff amp(s) 142 connected in series to add additional gain to the sensed tissue signal. Track and hold circuitry 144 may also be included to hold the value of the analog outputs (e.g., during the stimulation artifact 126 if that signal is not of interest), which can be useful to prevent adverse operation of the filter circuitry 146 that follows. Filter circuitry 146 can remove frequencies from the sensed signal that are not of interest. Such excludable frequencies from the sensed tissue signals may be low (such as those resulting from other biological processes such as respiration or heart rhythms) and/or high (such as noise), and in this regard, filter 146 can comprise a band pass filter whose lower and upper frequencies (fL, fH) are programmable. Attenuator 148 can be used to reduce the gain of the sensed signal if necessary. This may be particularly useful if it is desired to sense the larger signals, such as the stimulation artifact 126, and as such the attenuator's 148 gain can be programmable to a value less than 1.
Analog processing circuitry 140 is not strictly necessary, and any or all of stages 142-148 could be excluded. Analog processing circuitry 140 could also include additional stages not shown in
Sense amp circuitry 110 can include other improvements not shown in
As also shown in
As noted, the goal of DC offset compensation circuitry 150 is to remove any differences in the DC voltages at the inputs to the sense amp circuitry 110. This DC offset is denoted by voltage Voff in
Nevertheless, such charge recovery mechanisms may not be perfect. For example, due to non-idealities in the circuitry, the charge of the phases 30a and 30b of a biphasic pulse may not be perfectly charge balanced, despite programming the stimulation circuitry 28 to provide charge-balanced phases. Further, there may be slight differences in the capacitance values of the DC-blocking capacitors 38 which would tend to imbalance the charges stored on them. Thus, aresidual charge (voltage) imbalance may remain at the inputs to the sense amp circuitry 110, with deleterious results. Even a seemingly small DC offset (e.g., Voff=0.01 V) would produce a large DC offset in the differential output D+/D− of the diff amp 130 (e.g., 2V for a gain G of 200). Excessive DC amplification may also cause the differential output D+/D− to become saturated and pinned to the diff amp's power supply voltage (VH, Vdd, etc.) or to ground. Furthermore, excessive DC amplification may cause high or low saturation in the ADC 112, as discussed further below with respect to
Even if the DC-blocking capacitors 38 are completely discharged (e.g., Vs+=Vs−=0) or are otherwise completely balanced (Vs+=Vs−), other mechanisms may cause an inherent imbalance at the inputs X+ and X− to the sense amp circuitry 110. For example, the diff amp 130 in the sense amp circuitry 110 may not be ideal, and may have an inherent DC offset at input inputs X+ and X−. Electro-chemical effects at the interface between the electrodes 16 and the tissue can also induce a small DC voltage offset at the inputs to the sense amp circuitry 110, particularly if the electrodes 16 input to the sense amp circuitry have different areas or compositions. Still further, a DC-blocking capacitor 38 may not be present at every potential sensing electrode, and therefore uneven charging of these capacitors may not be responsible for causing a DC offset. Although not shown, some sensing electrodes may have a large resistors in parallel with their DC-blocking capacitors, such as at the case electrode (Ec), as explained in the above-referenced '202 patent.
Regardless of the reason the inputs X+ and X− may be DC imbalanced (Voff is not zero), the goal of DC offset compensation circuitry 150 is to reduce or eliminate this DC imbalance to encourage Voff to zero, or closer to zero, so that AC tissue signals can be more reliably sensed. This is accomplished in the example shown in
Preferably, Idc is on the order of microAmps, which is very small in comparison to the magnitude of the stimulation currents provided to the electrodes (typically milliAmps) by the stimulation circuitry 28. In this respect, Idc does not appreciably contribute to stimulation of the patient's tissue. Idc may be positive (which will increase Vs+) or negative (which will decrease Vs+), as explained further below.
The DC offset compensation circuitry 150 receives an input 158 indicative of the DC offset Voff, and in the example of
An example of circuitry useable for the DC offset compensation circuitry 150 is shown in
Operation of DC offset compensation circuitry 150 can be understood by considering different values for Voff. If Voff is zero, the DC voltages at X+ and X− are equal (presumably because Vs+ is equal to Vs−). After amplification by the diff amp 130, the DC voltages of D+ and D− would also be equal, meaning I1=I2, which causes Idc to equal zero. This leaves the DC-blocking capacitor 38 at input X+ unaffected—i.e., it is not charged or discharged—and Vs+ remains unaffected.
If Voff is positive, the DC voltage at X+ is higher than at X− (presumably because Vs+ is larger than Vs−). After amplification (130), the DC voltage of D+ would be higher than at D−. This results in I2 being higher than I1, which causes Idc to be negative. This negative current Idc will discharge the DC-blocking capacitor 38 at input X+, which will decrease Vs+ (towards Vs−) and bring Voff towards zero.
If Voff is negative, this means that the DC voltage at X+ is lower than at X− (presumably because Vs+ is smaller than Vs−). After amplification (130), the DC voltage of D+ would be lower than at D−. This results in I2 being lower than I1, which causes Idc to be positive. This positive current Idc will charge the DC-blocking capacitor 38 at input X+, which will increase Vs+ (towards Vs−) and bring Voff towards zero.
In short, as the DC offset compensation circuitry 150 operates, feedback will eventually set DC offset Voff equal to or closer to zero by charging or discharging the DC blocking capacitor 38 coupled to input X+, presumably to a level where Vs+ equals Vs−. The DC offset compensation circuitry 150 can operate whether differential or single ended sensing is used. The speed with which DC offset compensation occurs—i.e., the speed at which Voff is set to zero—is strongly influenced by the magnitude of Idc, which can be set by gain control signals Gdc.
The bottom of
Likewise, when Voff<0, the differential output of the sense amp circuitry 110 may be pinned to ground, and/or the response may fall below the minimum of the operating range of the ADC 112 (0.0V or 000). The ADC 112 in this circumstance clips the sensed neural response, such that a significant number of lower voltages in the digitized neural response are clipped to the minimum of the operating range of the ADC 112, resulting in low saturation in the ADC 112. The neural response algorithm 124 can assess this digitized response, and upon seeing one or more minimum digital values may conclude that low saturation has occurred, and reject this digitized response as invalid.
In response to determining that either high or low saturation has occurred, the neural response algorithm 124 may: enable use of the DC offset compensation circuitry 150 (ENdc) (although the circuitry 150 may also operate independently and be enabled whenever sensing is occurring); provide gain control (Gdc) to set a general magnitude of Idc (see bus 154,
The DC offset compensation circuitry 150 can eventually correct high and low saturation conditions by setting Voff closer to 0 (ideally, to 0) at the input of the sense amp circuitry 110, and this is also shown at the bottom of
Although beneficial, DC offset compensation circuitry 150 may in certain circumstances take a prohibitively long time to provide such compensation. Assume that Idc as output by this circuitry 150 is 1 μA, that the DC-blocking capacitors have a value of 4.7 μF, and that Voff is significantly high (e.g., 2V). Eliminating this voltage would require 9.4 μC of charge (Q=C*V), which would require 9.4 seconds if a 1 μA current is used (t=Q/I). This is a considerable amount of time during which tissue signal sensing may not be reliably accomplished.
Recognizing this, the inventors has devised solutions to provide DC offset compensation that do not rely solely on use of a discrete DC offset compensation circuitry such as 150 (although circuitry 150 can also be used in conjunction with the disclosed solutions). Instead, when a DC offset Voff is present at the inputs to the sense amp circuitry 110, the stimulation circuitry 28 is controlled to remove this DC offset by providing a compensation current Ix preferably comprising one or more charge imbalanced pulses that are either net cathodic (−Q) or net anodic (+Q). This compensation current Ix is preferably provided to both of the sensing electrodes, although it could also be provided to only one electrode, and potentially to neither sensing electrode. Control of the stimulation circuitry 28 to provide the compensating current can occur using a DC offset compensation algorithm 200 (
In this example, a DC offset compensation algorithm 200 provides such compensation by controlling the stimulation circuitry 28 to provide a compensating current Ix at one or both of the sensing electrodes. At a high level, detector circuitry 205 produces data indicative of the DC offset Voff between the inputs X+ and X− of the sense amp circuitry 110. This detector 205 can comprise different forms and circuitries, and may comprises part of the control circuitry 102, or may be independent from circuitry 102, as shown in the examples that follow. The detector 205 can also provide different kinds of data to the DC offset compensation algorithm 200, again as explained below. The DC offset compensation algorithm 200 in turn uses this data control the stimulation circuitry 28 to issue the compensating current Ix.
This compensating current Ix is preferably formed of one or more charge imbalanced pulses that are either net cathodic or net anodic, depending whether the DC offset Voff is positive or negative, and whether the current is provided to sensing electrode S+, S− or both. For example, in
Preferably, the DC offset compensation algorithm 200 causes the stimulation circuitry 28 to issue the compensating current Ix at both of the sensing electrodes, with the opposite-polarity pulses of both currents being issued simultaneously. This is preferred for a couple of different reasons. First, Voff to approach zero more quickly, because Vs+ is decreased simultaneously with Vs− being increased. Second, providing opposite-polarity pulses at both sense electrodes provides a current return which assures that the net current flowing to the tissue is zero, thus preventing charge build-up in the tissue.
The DC offset compensation algorithm 200 would operate similarly if Voff is less than zero, but would flip the polarities described above. In this circumstance, the DC offset compensation algorithm 200 can cause the stimulation circuitry 28 to issue a compensating current Ix comprising one or more net anodic pulses at sensing electrode S+(E5) (using PDAC5), which would increase Vs+ and thus increase Voff closer to zero. And/or, the DC offset compensation algorithm 200 can cause the stimulation circuitry 28 to issue an opposite-polarity compensating current Ix comprising one or more net cathodic pulses at sensing electrode S− (E6) (using NDAC6), which would decrease Vs− and thus increase Voff closer to zero.
While preferred that the stimulation circuitry 28 be controlled to provide the compensating current Ix to both sensing electrodes, DC offset compensation can occur if only one of the sensing electrodes is provided a current. For example, compensating current Ix can be provided to either S+(E5) or S− (E6), with an opposite-polarity current return provided to any other electrodes (E7, E8, etc.) or to the case electrode (Ec). Alternatively, a current return for the compensating current Ix can occur by provided by a voltage (e.g., Vcm, Vref) at any of the electrodes. Still further, the compensation algorithm 200 may also issue the compensating current at neither of the sensing electrodes, in the circumstance where there is evidence of that this current would couple to the sensing electrodes in a manner that would provide DC offset compensation. For example, internal or external leakage conduction paths may allow a compensating current Ix to be provided at nodes different from the sensing electrodes to address an imbalance at the sensing electrodes, without delivering that compensating current to either of the sensing electrodes directly.
Although not shown or discussed further, DC offset compensation algorithm 200 can also be used during single-ended sensing to bring a single sensing electrode S to a suitable DC value relative to Vref, in which case the stimulation circuitry 28 is driven with a compensative current Ix at electrode S, with a current return acting in any of the ways previously discussed.
Examples of charge-imbalanced pulses the DC offset compensation algorithm 200 can cause the stimulation circuitry 28 to issue are shown in
The pulses can also comprise charge-imbalanced biphasic pulses. For example, biphasic pulses 252a and 252b have two phases with the same pulse width, PW, but with different amplitudes. For example, the net cathodic pulses have a cathodic phase (−Q1) with a larger amplitude than the anodic phase (+Q2, with the two phases differing by amplitude I), with the cathodic phases either occurring first (252a) or last (252b), resulting in a net cathodic charge of −Qdc. The net anodic pulses have an anodic phase (+Q1) with a larger amplitude than the cathodic phase (−Q2, again, differing by I), with the anodic phases either occurring first (252a) or last (252b), resulting in a net anodic charge of +Qdc. The biphasic pulses 252c have phases with the same current amplitude, but with different pulse widths, with the net cathodic pulses having a longer cathodic phase (−Q1), and with the net anodic pulses having a longer anodic phase (+Q1), which again results in net cathodic and anodic charges of −Qdc and +Qdc equal to the amplitude times the difference in the pulse widths of the phases. These are just some examples of charge imbalanced pulses having a net charge that the algorithm 200 can cause the stimulation circuitry to produce to provide DC offset compensation. One skilled will recognize that other pulses of odd shapes and/or different numbers of phases (e.g., more than two) are possible, and such approaches may comprise a combination, superposition, or summation of multiple monophasic or biphasic pulses.
Stimulation is provided at the selected stimulation electrodes (e.g., E1 and E2), and tissue signal (e.g., neural response) sensing starts at the selected sensing electrodes (E5/E6, S+/S−) (210). The ADC 112 samples the tissue signal, and the resulting digitized waveform is provided to the neural response algorithm 124, which as noted earlier will be used to assess the tissue signal.
Algorithm 200 next determines whether the digitized waveform is saturated (220), which requires use of the detector 205. In this example, and as shown in
If saturation is present (220), the algorithm 200 assesses whether such saturation is high or low, which will depend on whether the saturated samples are maximized (FFF) or minimized (000) (225), and in either case causes the stimulation circuitry 28 to issue a compensating current Ix at at least one of the sensing electrodes. One skilled will realize steps 220 and 225 may be combined.
If saturation is high, this implies that the DC offset Voff is greater than zero, as explained earlier with reference to
Once the algorithm 200 has issued the appropriate compensating current Ix, the algorithm 200 can iterate by once again stimulating and sensing (210); collecting a new digitized waveform (215); and assessing whether saturation is present in this new digitized waveform (220). If compensation previously provided at steps 230 or 235 has not sufficiently corrected the DC offset Voff and saturation is still present (220), the algorithm can again provide the necessary compensating current Ix at one or both sensing electrodes (230, 235) to move Voff even closer to zero. After some number of iterations, Voff would be brought close enough to zero that the digitized waveform is brought within the operating range of the ADC 112 and is no longer clipped, at which point the algorithm 200 would stop providing the compensating current Ix. In this respect, the algorithm 200 via control of the stimulation circuitry 28 acts similarly to the DC offset compensation circuitry 150 described earlier, and as illustrated in
The extent to which DC offset Voff is brought closer to zero through use of the DC offset compensation algorithm 200 of
Note that it is not strictly necessary to determine at steps 220 and 225 whether the digitized waveform is saturated, as discussed earlier with reference to
The algorithm 200 begins by determining or setting certain parameters that will be used to define the compensative current Ix and its charge imbalanced pulses (208). First, a maximum Qdc, Qdc(max), is determined, which will be used initially to adjust the DC offset, but which will also be gradually decreased as the algorithm 200 iterates. Qdc(max) can be determined or set in different ways, but the example shown is set based on the capacitance of the DC blocking capacitors 38 (e.g., 4.7 μF) and the compliance voltage VH that powers the stimulation circuitry. In one example, this maximum voltage is 15V, but may be lower depending on the stimulation (as noted above, the compliance voltage VH is variable). Thus, assuming the compliance voltage VH is 15V, Qdc(max)=C*V=4.7 μF*15V=35 μC. A starting Qdc for the algorithm 200 can also be set at step 208 using Qdc(max), and in the depicted example, Qdc is set to 2*(Qdc(max)).
Another parameter determinable at step 208 is a minimum Qdc, Qdc(min). Qdc(min) can be determined based on the capacitance of the DC blocking capacitors 38 (e.g., 4.7 μA), as well by considering the maximum input voltage range permissible at the inputs X+/X− to the sense amplifier circuitry 110, which in one example may be 10 mV. Preferably, Qdc(min) is set to achieve a smaller increment within this range, such as half of the range (e.g., 5 mV), but even smaller fractions of the range can be used. Thus, Qdc(min)=C*V=4.7 μF*5 mV=23.5 nC. Qdc(min) denotes a minimum amount of charge used for DC offset compensation as the algorithm 200 iterates, as explained further below.
Still another parameter determinable at step 208 is a pulse width (PW) of the pulses comprising the compensating current Ix. This may be set based on the measured or estimated impedance of the tissue between the sensing electrodes (e.g., 1000Ω), the compliance voltage VH, and Qdc(max). From these parameters, pulse PW can be set to PW=Qdc(max)/I=Qdc(max)/(V/R)=35 μC/(15V/1000Ω)=2.35 ms. This pulse width PW will be used to provide a single pulse at each iteration of the algorithm 200 in this example, but this is not strictly necessary. Instead, a number of pulses may also be used at each iteration, such as 10 pulses each having a pulse width of 0.235 ms, to achieve the same effect.
Step 208 should be understood as just one way that parameters for the compensating current Ix can be determined, and parameters may be determined or set in other manners.
Stimulation and sensing are started (210), or at least sensing is started as stimulation may have already begun. The ADC 112 samples the sensed tissue signal, with the algorithm 200 collecting the digitized waveform (215). Algorithm 200 next determines whether the digitized waveform is saturated (220), and in particular whether such saturation is high or low (225). These steps were described above with reference to
If a high saturation condition exists (Voff>0), the algorithm 200 inquires whether Qdc is current less than or equal to Qdc(min) (226). This condition would not be meet initially when Qdc=2Qdc(max), and so Qdc is halved (228), which sets Qdc=Qdc(max). At step 230, the algorithm 200 issues a compensating current Ix, and more specifically causes the stimulation circuitry 28 to issue one or more charge imbalances pulses to decrease Voff. Here it is assumed that a single charge-imbalanced pulse will issue with the pulse width determined earlier (PW) and the current charge value of Qdc, in the form of a net cathodic pulse at sensing electrode S+ and a net anodic pulse at sensing electrode S−. These pulses can be monophasic, or biphasic as described earlier (see
If a low saturation condition exists (Voff<0), the algorithm 200 essentially completes the same steps to issue a compensating current Ix, but with the opposite polarity. Compare steps 226, 228, and 230 with steps 231, 233, and 235. As explained earlier, this will increase Voff (possibly above zero).
After issue the compensating current Ix (230, 235), the algorithm 200 can iterate by providing stimulation and sensing (210), and collecting a new digitized waveform of the sensed response (215). If saturation is still present (220), the algorithm can again issue another compensating current Ix. Assuming that Qdc is not currently equal to or less than Qdc(min) (226, 231), Qdc is again halved (228, 233), and applied to the sensing electrode(s) with the desired polarity (either 230 or 235). Assuming the pulse width is not adjusted, this means I of the charge imbalanced pulses will also be halved, which would half the amount that Voff is adjusted.
As the algorithm 200 continues to iterate, eventually Qdc would eventually become small enough that it would be equal to or less than Qdc(min) (226, 231), and thus Qdc would not be adjusted lower any further. Instead, this small Qdc value is simply used to provide the compensating current Ix (230, 235), thus providing a fine adjustment to Voff compared to the coarse adjustment occurring in earlier steps.
At some point during iteration of the algorithm 200, Voff would be close enough to zero that saturation is no longer present in the digitized waveforms provided by the ADC 112. See
One skilled will understand that the algorithm 200 can be varied in certain respects. For example, while it is preferred to halve Qdc used to providing the compensating current Ix as the algorithm 200 iterates (see steps 228, 223), Qdc could also be decreased by a set value, or gradually decreased in other ways. Further, while the example of
However, as the algorithm 200 iterates and Qdc is gradually reduced (228, 233), the DC offset compensation circuitry 150 is thereafter used to provide Idc to provide DC offset compensation as described earlier. Specifically, at steps 226 and 231, if Qdc has been decreased to a value less than or equal to Qdc(min), the DC offset compensation circuitry 150 is enabled to provide Idc (step 246) until such time as saturation is no longer occurring (220). Thereafter, the DC offset compensation circuitry 150 can be disabled (247). Whereas the stimulation circuitry 28 is used initially to provide a coarse adjustment to the DC offset Voff, the DC offset compensation circuitry 150 later provides a fine adjustment to the DC offset Voff in this example.
In the example shown, the detector 205 comprises a diff amp 262, a low pass filter (LPF) 264, and a window comparator (266, 268) as described below. The detector 205 receives as an input 261 one or more signals indicative of DC offset Voff, such as the differential output of the diff amp 130 in the sense amp circuitry 110 as shown. However, and like the DC offset compensation circuitry 150 discussed earlier (
Input 261 is provided to a diff amp 262 having a single-ended output. This single-ended output may be referenced to and centered around an output reference voltage between the power supply for the diff amp (e.g., Vdd) and ground, such as Vdd/2. Thus, the single-ended output is Vdd/2 if D+ equals D− (if Voff=0); is higher than Vdd/2 if D+ is greater than D− (if Voff>0); and is less than Vdd/2 if D+ is less than D− (if Voff<0). Both the output reference voltage and gain of diff amp 262 may be programmable. The single-ended output may be low-pass filtered at LPF 264 to remove high frequency components not reflective of the DC level of DC offset Voff.
The output of LPF 264 (if present) is provided to a window comparator comprising two comparators 266 and 268, each of which compares the output to a threshold. These thresholds may be defined relative to the output reference voltage, such as Vdd/2+Δ and Vdd/2−Δ, which are input to the comparators 266 and 268 respectively. If the output exceeds Vdd/2+Δ, meaning that Voff is significantly greater than zero, comparator 266 outputs a logical ‘1’ at comparator output H. Likewise, if the output falls below Vdd/2−Δ, meaning that Voff is significantly less than zero, comparator 268 outputs a logical ‘1’ at comparator output L. One skilled will understand that Δ can be set to a value at which either the diff amp 130 or the ADC 112 becomes saturated, and as such Δ is dependent on the gain provided by the sense amp circuitry 110 and the diff amp 262. Different values for Δ can be used at comparators 266 and 268 to set different thresholds. Digital outputs H and L are input to the DC offset compensation algorithm 200 in the control circuitry 102, where they are used by the algorithm 200, as explained next.
Various examples of the DC offset compensation algorithm 200 shown to this point involve iteration to eventually get the DC offset Voff acceptably close to zero so that sensed tissue signals are properly resolvable. In these examples, a compensating current Ix is issued by the stimulation circuitry 28 with the right polarity at each iteration, but with a charge Qdc that is not necessarily of the right magnitude to completely negate the DC offset Voff. However, the circuitry and DC offset compensation algorithm 200 of
The detector 205 in the example of
The output of LPF 284 (if present) H*Voff is measured, and preferably this occurs using an Analog-to-Digital converter (ADC), although other circuitry could be used as well. In one example, the ADC used comprises the same ADC 112 that is used to digitize the tissue signal waveforms, and this can occur in a time-multiplexed manner using a switch 288. The switch 288 may be controlled by the algorithm 200, and can either be set to measure the output of the sense amp circuitry 110 (i.e., the tissue signal) or signal H*Voff as shown. In another example shown in dotted lines, the DC offset measurement circuitry 280 can include its own dedicated ADC 286 specifically to measure H*Voff. While this alternative requires an extra component, use of ADC 286 alleviates the need for a switch 288 and for time-multiplexed use of the ADC 112, which instead can be used solely for tissue signal detection. Regardless of the circuitry used, H*Voff is ultimately reported to the DC offset compensation algorithm 200 in digital form.
Stimulation and sensing are started (210), and a digitized waveform of the tissue signal is collected from the ADC 112 (215). Next, H*Voff is measured using the detector 205 (292). If a dedicated ADC 286 is used this may occur at the same time that the digitized waveform is collected (215). If ADC 112 is used, the digitized waveform can first be collected by the ADC 112, with the switch 288 then controlled by the algorithm 200 to measure H*Voff later (when stimulation is provided again). Once H*Voff is measured, the algorithm 200 then determines Voff by dividing the result by gain H (292), which as noted above is already known to the algorithm 200 (290). If H*Voff as measured has other gains added to it as well (e.g., from gain G of the diff amp), such additional gains may also be normalized out to render Voff.
Next, the algorithm 200 compares the absolute value of Voff to a threshold Vt (294). This threshold Vt is set to a minimum value at which DC offset compensation is needed, such that a compensation current Ix will be provided if |Voff| is greater than or equal to Vt. Note that Vt can be set by considering what value for Voff will cause saturation in the sense amp circuitry 110 or in the ADC 112 (
If |Voff| equal or exceeds this threshold Vt (294), the algorithm 200 next considers whether Voff is too high (>0) or too low (<0) (296). (Again, steps 294 and 296 can be combined). In next steps, a charge Qdc necessary to compensate for Voff is calculated (298, 300), which requires consideration of the capacitance involved at the sensing electrodes that will receive the compensation current Ix in next steps (230, 235). If it is assumed that both sensing electrodes S+ and S− will receive the compensating current Ix, and that both electrodes have a DC-blocking capacitor 38 of capacitance C, then Qdc is computed as Voff/2C. This charge Qdc when provided at each sensing electrode via the compensating current Ix will decrease the higher-voltage input by ½Voff, and will increase the lower-voltage input by ½Voff. In sum total, this should reduce Voff to zero.
Next steps 230 and 235 provide the compensating current to both electrodes as just described, and as before the compensating current Ix can comprise one or more net cathodic or anodic pulses provided to the sensing electrodes S+ and S−. Also, and as before, the compensating current can be provided at the pulse width PW computed earlier, and with an amplitude I set by Qdc as computed (i.e., I=Qdc/PW). As noted above, providing this current should reduce Voff to zero, meaning the algorithm 200 would likely not need to iterate (at step 294) to once again provide a compensating current Ix. In other words, the algorithm 200 of
That being said, the algorithm 200 can iterate as necessary (at step 294). Although not shown, the algorithm 200 could during such iterations provide fine adjustments to Voff as discussed earlier. For example, minimum amounts of charge (Qdc(min)) can be used to provide a fine-adjustment compensating current Ix after the coarse adjustment in
Examples to this point have assumed that the sensing electrodes (e.g., S+ and S−) are different from the electrodes used to provide stimulation. However, as noted previously, this is not always the case, and at least one of the sensing electrodes can comprise an electrode that is also used to provide the stimulation.
In this example, the detector 205 and DC offset compensation algorithm 200 can be configured to operate in any of the previously-described ways to provide a compensating current Ix that reduces or eliminates a DC offset voltage (Voff) at the inputs to the sense amp circuitry 110. Thus, in this example, the stimulation circuitry 28 (i.e., P/NDAC1 and P/NDAC2) are controlled both to provide the stimulation current (Istim) and a compensating current (Ix) at the selected electrodes.
The stimulation current Istim and compensating current Ix can be provided at different times. Thus, when it is desired to sense a neural response, the DC offset compensating algorithm 200 can cause the stimulation circuitry 28 to temporarily cease the production of stimulation pulses comprising Istim. The algorithm 200 can then cause the detector 205 to sense whether a DC offset Voff is present at the inputs to the sense amp 110, and cause the stimulation circuitry 28 to provide a compensating current Ix to reduce or eliminate this offset. This can occur in any of the ways described previously. Once the DC offset has been removed, the algorithm 200 can again allow the stimulation circuitry 28 to restart Istim, and sense neural responses in response. Although not shown in
However, the stimulation pulses comprising Istim may themselves be adjusted (charge imbalanced) to provide the compensating current Ix, and this example is shown in
Thereafter, the algorithm 200 will again determine the DC offset during sensing window t2. Here is assumed that the DC offset is negative (−Z), meaning in this example that over-compensation occurred earlier, and thus low saturation is present or at risk. Thus, a next Istim pulse is adjusted (charge imbalanced) to compensate. Consistent with earlier examples, a net anodic pulse is issued at S+(E1) and/or a net cathodic pulse is issued at S− (E2) to increase Voff closer to zero. As before, a net charge Qdc (W) is calculated using Voff=−Z to set the charge imbalance of the next Istim pulse. Thereafter, it is assumed during subsequent sensing windows t3-t7 that the DC offset Voff is negligible, and that compensation is not required. Thus, non-adjusted charge-balanced pulses are issued for Istim (Qdc=0), and eventually the neural response is sensed at sensing window t8.
The various algorithms (e.g., 124, 200) and methods more generally disclosed herein can comprise instructions fixed in a computer readable medium, such as a solid-state memory (e.g., control circuitry 102), optical or magnetic disk, and the like. These media may be within the IPG 100, or stored on external systems in manner downloadable to the IPG, such as on various Internet servers and the like.
Although particular embodiments of the present invention have been shown and described, the above discussion is not intended to limit the present invention to these embodiments. It will be obvious to those skilled in the art that various changes and modifications may be made without departing from the spirit and scope of the present invention. Thus, the present invention is intended to cover alternatives, modifications, and equivalents that may fall within the spirit and scope of the present invention as defined by the claims.
This is a non-provisional of U.S. Provisional Patent Application Ser. No. 63/371,705, filed Aug. 17, 2022, which is incorporated herein by reference, and to which priority is claimed.
Number | Date | Country | |
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63371705 | Aug 2022 | US |