The present invention pertains generally to systems and methods for controlling errors in data transmissions. More particularly, the present invention pertains to systems and methods for controlling errors in data transmissions using forward error correction (FEC) techniques. The present invention is particularly, but not exclusively, useful as a system and method for controlling errors in data transmissions while selectively optimizing spectral efficiency and error block processing delay.
Data transmission over noisy or otherwise unreliable communication channels can result in the corruption of data and the consequent receipt of erroneous data. Early attempts to overcome the drawbacks associated with imperfect communication channels required re-transmission of erroneous data. Specifically, at the receive end of the channel, erroneous data was detected and a request was communicated to the sender to re-transmit some or all of the data in the original transmission. This process of re-transmitting data, in addition to requiring a reverse communication channel for the re-transmission request, is inefficient and greatly reduces the overall transmission rate of the forward communication channel.
Modernly, forward error correction (FEC) techniques have been available to eliminate the need for re-transmission of erroneous data. These FEC techniques can involve adding a redundancy to the data prior to transmission. In simple terms, an increase in the amount of redundancy increases the probability of successfully recovering the faulty data at the cost of increasing the total data that must be transmitted. This latter concept is often quantified in terms of a so-called “code rate”, “k/n”, where “k” is the original, non-redundant useful data and “n” is the combined data including the original, non-redundant useful data and the redundant data.
Typically, for FEC techniques, the redundant data is encoded with the useful data using an encoding module that is included as part of a modem. The encoded data is then modulated on a carrier wave at the modem and transmitted over the link.
One of the challenges faced in the design of a modern modem is the specification of the functional blocks to provide forward error correction (FEC). Once a type is selected, further enumeration and parameterization must be specified. Usually these specifications are made with an overriding objective of maximizing the spectral efficiency of the link. When this is the case, larger FEC block sizes are specified in order to optimize this spectral efficiency. Spectral efficiency can be defined as the transmitted data rate for a given frequency bandwidth, with units of (bits/sec)/Hz, for example.
Unfortunately, the larger the FEC block size is, the more buffering is required to collect the large bin of bits/symbols, and the more processing is required to use the large block size specified in FEC scheme for preparing original data for transmission over noisy channel. This is true on both sides of the link, both the encoding module at the transmitting modem, and the decoder at the receiving modem. This large block size buffering and processing results in significantly increased processing delay or latency. There are some applications, however, where maximal spectral efficiency is less important than minimizing the processing delay or latency. There are also applications where minimizing the processing delay or latency is less important than maximal spectral efficiency.
In light of the above, it is an object of the present invention to provide systems and methods for allowing a user at the transmit end of a communication link to change the FEC block size to select an appropriate spectral efficiency and error block processing delay. It is another object of the present invention to provide systems and methods for allowing a user to modify an FEC block size for a transmission based on information regarding available system bandwidth and/or an outside requirement on the data transfer rate and/or checking the number of error bits corrected at the decoder and/or making a decision from lookup table based on channel estimation. Yet another object of the present invention is to provide a Variable Control for a Forward Error Correction Capability and corresponding methods of use which are easy to use, relatively simple to implement, and comparatively cost effective.
In accordance with the present invention, a system for allowing a user at the transmit end of a communication link to change a forward error correction scheme and change the block size associated with that FEC scheme includes a modem. For the system, the modem includes a plurality of encoding modules, at least one modulation module and a user input module.
In more detail, the encoding modules are arranged to receive an input data-stream from a modem input port. Pluralities of switches are provided to selectively route the input data-stream to one of the encoding modules. The switches, in turn, are operationally coupled with the user input module allowing the user to route the input data-stream to a user-selected encoding module.
At the user-selected encoding module, the input data-stream is processed to add an FEC redundancy and output FEC blocks having an FEC block size that is unique to the selected encoding module. Each encoding module outputs FEC blocks having different FEC schemes and different FEC block sizes. In this way, the user selects the encoding module and the corresponding FEC block size.
The output of the selected encoding module is modulated on a carrier signal by the modulation module and the modulated carrier signal is communicated to a modem output port. From the output port, the modulated carrier signal can be communicated over a link such as a wireless satellite communication link. The signal can then be received by one or more receivers having a modem for decoding the FEC blocks.
To use the system, a user first receives information regarding spectral efficiency and/or an acceptable level of error block processing delay. For example, the user may obtain information regarding the communication link indicating that a particular level of spectral efficiency is required for a successful data transfer. In this case, the user can determine the corresponding FEC scheme and FEC block size providing the required spectral efficiency while limiting undesirable processing delay with the large block sizes.
On the other hand, limiting processing delay may be important. In particular, the user may receive information specifying a limit on processing delay for a successful data transfer. For this case, the user can determine the corresponding FEC block size ensuring the block processing delay is within acceptable limits while maximizing spectral efficiency as a second consideration.
In one embodiment, the user input module can include a software-selectable “knob” that the user can turn, in order to choose between, on one end of the scale high spectral efficiency/high latency, and at the other end of the scale lower spectral efficiency/low latency, or a middle position between the two extremes. This selection can be optimized depending on the requirements of a given application at a given time. This software knob setting then, in turn, internally sets the appropriate FEC block size (by selecting the appropriate encoding module) based on the user's selection.
The novel features of this invention, as well as the invention itself, both as to its structure and its operation, will be best understood from the accompanying drawings, taken in conjunction with the accompanying description, in which similar reference characters refer to similar parts, and in which:
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Once selected by the user, the user-selected encoding module 46a-c receives and processes the input data-stream 32 to add an FEC redundancy and provide an output 52a-c that includes FEC blocks of different block sizes. The FEC redundancy can be any type of FEC code/technique known in the pertinent art for use in data-stream transmission. For the modem 30, each encoding module 38a-c outputs FEC blocks having different FEC block sizes. In this way, the user selects the encoding module 38a-c and the corresponding FEC block size using the user input module 42.
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While the particular Variable Control for a Forward Error Correction Capability as herein shown and disclosed in detail is fully capable of obtaining the objects and providing the advantages herein before stated, it is to be understood that it is merely illustrative of the presently preferred embodiments of the invention and that no limitations are intended to the details of construction or design herein shown other than as described in the appended claims.
This application claims the benefit of U.S. Provisional Patent application Ser. No. 61/721,397, titled “VARIABLE CONTROL FOR A FORWARD ERROR CORRECTION CAPABILITY,” filed Nov. 1, 2012. The entire contents of Application Serial No. 61/721,397 are hereby incorporated by reference herein.
Number | Date | Country | |
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61721397 | Nov 2012 | US |