This application claims the priority of Korean Patent Application No. 2007-0094746 filed on Sep. 18, 2007, in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference.
1. Field of the Invention
The present invention relates to variable gain amplifiers, and more particularly, to a variable gain amplifier that is implemented with one CMOS device and has wide gain variation and wide bandwidth by a predetermined exponential function.
2. Description of the Related Art
In general, variable gain amplifiers (VGAs) are used to provide variable gain to various kinds of electronic apparatuses, such as disk drives, hearing aids, medical instruments, and communications apparatuses. Here, since the amplitude of signals used in the electronic apparatuses may vary over a wide range, gain variation needs to be as wide as possible. For example, code division multiple access (CDMA) communication systems require a gain variation of approximately 80 dB. That is, a region in which linear gain is obtained needs to be large on a dB scale.
An amplifier with linear variable gain on the dB scale can easily be obtained by using a bipolar transistor that provides the exponential I-V relationship. However, a CMOS transistor has nearly-linear I-V characteristics or exponential I-V characteristics that conform to the square-law in saturation-mode. Therefore, it is difficult to implement a CMOS variable gain amplifier with variable gain that is linear on the dB scale. Therefore, the CMOS variable gain amplifier is realized so that the gain thereof is based on an approximated exponential equation.
Examples of the approximated exponential equation, as known in the art, include Equation 1 and Equation 2 as follows. Equation 1 is a Taylor approximation function that is an approximated Taylor series expansion. Equation 2 is a pseudo-exponential function. Equation 1 and Equation 2 are given as follows:
Equation 3 is similar to the pseudo-exponential Equation as described in Equation 2. That is, the variable gain amplifier according to the related art, shown in
In order to widen the range of gain variation of the variable gain amplifier according to the related art, a variable gain amplifier has been generally implemented in multiple stages. As a result, the multi-stage variable gain amplifier consumes more power and requires a larger chip area, causing low noise characteristics and low linearity. In particular, an increase in the number of gain stages used causes reductions in the noise characteristics and the linearity.
In consideration of frequency response of the circuit, shown in
Therefore, there has been required a variable gain amplifier that can reduce the number of stages providing gains to consume a small amount of bias current and use a small chip area, have wide gain variation, and provide wide bandwidth even at high gains.
An aspect of the present invention provides a variable gain amplifier that is implemented with a CMOS device and has wide gain variation and wide bandwidth by a predetermined exponential function.
According to an aspect of the present invention, there is provided a variable gain amplifier having wide gain variation and wide bandwidth, the variable gain amplifier including: a differential amplification section differentially amplifying an input signal according to a gain adjustment signal; and a gain adjustment section supplying the gain adjustment signal on the basis of an approximated exponential function determined according to a predetermined bias current, and adjusting a gain of the differential amplification section.
The approximated exponential function may satisfy the following equation:
where k and a are constants determined by the bias current, and x is an independent variable.
The gain adjustment section may include a current converter converting a current level of a predetermined adjustment signal into a current level of the gain adjustment signal having a different current level from that of the adjustment signal.
The gain adjustment section may further include: a voltage-to-current converter converting a voltage level of a control signal from the outside into the current level of the adjustment signal; and a bias circuit supplying the bias current to the voltage-to-current converter.
The current converter may include: a plurality of amplification units connected in parallel with each other and each having at least two amplifier devices connected in series to each other between a driving power supply terminal supplying predetermined driving power and a ground terminal; and a current squaring unit connected in parallel with the amplification units between the driving power supply terminal and the ground terminal, and having a plurality of amplifier devices mirroring a current from the amplification units.
The voltage-to-current converter may include: a level converting circuit having a plurality of amplifier devices connected in parallel with each other between a driving power supply terminal supplying predetermined driving power and a ground terminal, and converting a voltage level of the adjustment signal into a current level; and a current mirror circuit having a plurality of amplifier devices connected in parallel with each other between the level converting circuit and the ground terminal, and mirroring a current from the level converting circuit.
The bias circuit may include: a bias unit mirroring a current from the predetermined driving power and supplying the bias current; and a cascode amplification unit amplifying the bias current.
The differential amplification section may further include: a cascode input terminal increasing an operating frequency bandwidth by adjusting the capacitance of an input terminal of the input signal; and an inductive active load connected to an output terminal of the differential amplification section, adjusting the capacitance of the output terminal, and increasing an operating frequency bandwidth.
The above and other aspects, features and other advantages of the present invention will be more clearly understood from the following detailed description taken in conjunction with the accompanying drawings, in which:
Exemplary embodiments of the present invention will now be described in detail with reference to the accompanying drawings.
Referring to
The gain adjustment section 110 adjusts a gain of the differential amplification section 120 by a predetermined approximated exponential function.
The gain adjustment section 110 includes a current converter 112. When a control signal supplied from the outside is a current signal, the current converter 112 converts a voltage level of the current signal into a predetermined current level. The gain adjustment section 110 further includes a voltage-to-current converter 111 and a bias circuit 113. When the control signal is a voltage signal, the voltage-to-current converter 111 converts a voltage level of the voltage signal into a current level. The bias circuit 113 supplies a predetermined bias current to the voltage-to-current converter 111.
Referring to
The amplification units 112a and the current squaring unit 112b are connected in parallel with each other between a ground terminal and a driving power supply terminal that supplies a predetermined driving current VDD.
Each of the amplification units 112a includes a plurality of amplifier devices M51, M52, M53, and M54. The amplifier device M51 and the amplifier device M53 are connected in series with each other. The amplifier device M52 and the amplifier device M54 are connected in series with each other. The amplifier devices M51 and M53 are in parallel with the amplifier devices M52 and M54, respectively.
The current squaring unit 112b includes a plurality of amplifier devices M55, M56, M57, M58, M59, and M510. A gate of the amplifier device M55 is connected to gates of the amplifier devices M51 and M52 of the amplification unit 112a. A gate of the amplifier device M56 is connected to a gate of the amplifier device M57. Further, the amplifier device M58 is cascade-connected to the amplifier device M56. A gate of the amplifier device M59 is connected to a gate of the amplifier device M510.
Referring to
The amplifier devices M61 and M62 are located between the driving power supply terminal and the ground terminal, and are connected in series with the amplifier devices M65 and M66, respectively. The common mode feedback block CMFB and the amplifier devices M63 and M64 are connected between the amplifier devices M61 and M62, and the amplifier devices M65 and M66. Amplified output signals Vout+ and Vout are output from source terminals of the amplifier devices M63 and M64, respectively.
The amplifier devices M67 and M68 are connected to output terminals of the output signals Vout+ and Vout, respectively. A control signal Ctrl1 is input through a gate terminal of the amplifier device M69. The amplifier devices M610 has a drain terminal that is connected to source terminals of the amplifier devices M67 and M68, and a gate terminal through which a control signal Ctrl2 is input.
Referring to
The active inductive load 121 may include a capacitor C, a current source 191, and amplifier devices M71, M72, M75, and M76 that are connected in parallel with each other. An active inductive load 121 may be connected to output terminals of output signals Vout+ and Vout−.
The cascode input terminal 122 may have input terminals of input signals Vin+ and Vin− that are connected in cascode. Bias power VBIAS may be supplied to gates of amplifier devices M79 and M711. The input signals Vin+ and Vin− may be input to gate terminals of amplifier devices M710 and M712 that are cascode-connected to the amplifier devices M79 and M711, respectively.
Referring to
The current conversion circuit 111a includes a plurality of amplifier devices M81 to M88. The current mirror circuit 111b includes a plurality of amplifier devices M89, M810, M811, and M812 whose gates are connected to each other to mirror a current.
The plurality of amplifier devices M83, M84, M85, M86, M87, M88 of the current conversion circuit 111a are connected in parallel with each other between the driving power supply terminal and the ground terminal. The amplifier devices M81 and M82 are connected in series to the amplifier devices M85 and M86, respectively. Voltages V81 and V82 of control signals from the outside are applied to gates of the amplifier devices M81 and M82, respectively. Signals +Ictrl and −Ictrl having a predetermined voltage level are output from drain terminals of the amplifier devices M83 and M88, respectively.
The current mirror circuit 111b is connected in series between the current conversion circuit 111a and the ground terminal. A gate of the amplifier device M89 is connected to a gate of the amplifier device M811. A gate of the amplifier device M810 is connected to a gate of the amplifier device M812.
Referring to
The bias unit 113a includes a plurality of amplifier device M93, M94, and M95 that are connected in parallel with each other between the driving power supply terminal and the ground terminal. The amplifier device M93, M94, and M95 have gates connected in common with each other to mirror a current and supply predetermined bias currents Ibias and Io.
The cascode amplification unit 113b is connected in series between the bias unit 113a and the ground terminal, and includes amplifier device M91 and M92 that are connected in cascode to amplify the bias current Ibias.
Hereinafter, the operation and effect of the invention will be described in detail.
In order to solve the problem in the variable gain amplifier that is implemented on the basis of the above-described function in the related art with reference to
where k and a are constants, and x is an independent variable.
Referring to
I
sq=2I0+ICtrl2/8I0 Equation 5,
where Io is a bias current. The drain current Isq can be expressed by the sum of the current mirrored by the amplifier device M51 and the amplifier device M52 and a bias current Ibias-2Io. Therefore, currents Ictrl1 and the Ictrl2 satisfy the following equation:
where the currents Ictrl1 and Ictrl2 are the current Ictrl of an adjustment signal. The currents Ictrl1 and Ictrl2 are used to adjust the gain of the differential amplification section 120.
The differential amplification section 120, shown in
Like Equation 3, the gain of the variable gain amplifier according to the embodiment of the invention can be determined by the following equation:
where gm-M65,M66 is transconductance of the amplifier devices M65 and M66 connected to each other at a common source terminal, gm-M67,68 is transconductance of the amplifier devices M67 and M68 of the diode-connected loads. Further, (W/L)M65,66 is a ratio between an area and a width of the amplifier devices M65 and M66, and (W/L)M67,68 is a ratio between an area and a width of the amplifier devices M67 and M68 of the diode-connected loads.
If (W/L)M65,66=(W/L)M67,68 is satisfied in Equation 7, and Equation 5 and Equation 6 are substituted into Equation 7, the gain of the variable gain amplifier according to the embodiment of the invention can be expressed by the following equation:
where M=(W/L)M65,66/(W/L)M67,68, and a=1/IBIAS, k=IBIAS/4Io are satisfied. The variable gain amplifier according to the embodiment of the invention can provide dB-linear gain by Equation 4 that is the approximated exponential equation proposed in the embodiment of the invention. In Equation 8, k, IBIAS, and Io are fixed values that are determined by physical characteristics of the amplifier devices M65, M66, M67, and M68. Therefore, when the current from the gain adjustment section 110 of the variable gain amplifier is adjusted to satisfy k=0.55, that is, when the current Ictrl of the adjustment signal is adjusted so that the current IBIAS is equal to 2.2Io, the gain of the variable gain amplifier can provide the linear variation range of approximately 65 dB or more, as shown in
Referring to
The active inductive load 121 is connected to the first output voltage source Vout+ terminal and the second output voltage source Vout− terminal.
The operation of the active inductive load 121 will now be described. The amplifier devices M72 operates as a load. The amplifier devices M71 and the amplifier devices M72 operating as the load are connected to form negative feedback. Further, the capacitor C improves frequency characteristics by allowing the first output DC voltage Vout+ terminal to have zero, that is, the bandwidth of the variable gain amplifier is extended. Therefore, by controlling the capacitance of the capacitor C, a desired gain can be obtained at desired operating frequency. The operation is equally performed by the amplifier devices M75 and M76, the current source 191 and the capacitor C so as to cause the second output Dc voltage Vout-terminal to have “zero”, such that frequency characteristics are improved.
At the cascode input terminal 122, when each of the amplifier devices M79, M710, M711, M712 has the same ratio between a width W and a length L (that is, (W/L)M79=(W/L)M710=(W/L)M711=(W/L) M712 is satisfied), a differential gain gm-M711/gm-M79 between the input terminals of the input signals Vin+ and Vin− and the drain terminals of the amplifier devices M711 and M712 becomes 1. Therefore, the Miller multiplication reaches the minimum value, and thus the input capacitance reaches the minimum value. As a result, the input pole is moved toward a higher frequency, and the bandwidth at which the variable gain amplifier operates is further increased.
As such, in the embodiment of the invention, a wide linear gain variation range of 65 dB or more can be ensured by one wide stage, and the narrowing of frequency bandwidth can be prevented despite an increase in gain.
The gain adjustment section 110 of the variable gain amplifier 100 according to the embodiment of the invention may further include the voltage-to-current converter 111 and the bias circuit 113.
Referring to
where ID1, ID2, V83, and Vth are the drain currents, the source and threshold voltages of the amplifier devices M81 and M82.
Referring to
If k=IBIAS/4Io is applied to Equation 8, Equation 9, and Equation 10, the gain of the variable gain amplifier 100 can be expressed by the following equation:
where a=(VBIAS−V83−VTH)/(V91−VTH)VDS is satisfied, and x=Vctrl is satisfied. Here, if VBIAS−V83=V91 is satisfied, the gain of the variable gain amplifier 100 can be calculated by the following equation:
where a=1/VDS is satisfied, and the x=Vctrl is satisfied.
As described above, the variable gain amplifier 100 according to the embodiment of the invention can have wide gain variation and wide bandwidth by adjusting the gain on the basis of the proposed approximated exponential equation.
As set forth above, according to the exemplary embodiments of the invention, the variable gain amplifier is implemented by using the approximated exponential equation, as shown in
Further, according to the embodiment of the invention, even when the variable gain amplifier is determined to have a high gain, the narrowing of the bandwidth can be prevented.
While the present invention has been shown and described in connection with the exemplary embodiments, it will be apparent to those skilled in the art that modifications and variations can be made without departing from the spirit and scope of the invention as defined by the appended claims.
Number | Date | Country | Kind |
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10-2007-0094746 | Sep 2007 | KR | national |