Claims
- 1. An off chip variable voltage driver circuit for driving chips which have differing voltage requirements which are mounted on a supporting substrate comprising,
- a predriver stage and an output stage,
- said predriver stage having a data input and a first and a second driver output level input for determining the voltage level at the output, and having control circuits for setting output states at an output of the output stage to a supply level, intermediate voltage level, and a disabled level, and
- the output stage has devices which establish a down level to set a logical state, and
- and an up level and an intermediate level for setting a different logical state,
- an input to the predriver stages being a logical state level signal and the output of the output stage being a logical state level signal,
- whereby a logical state level at the input will normally result in an output at the same logical state level but selection of driver output level inputs determines the voltage level at the output for one of the logical state levels, so that a selected one of said driver output level inputs determines the actual output voltage of the circuit.
- 2. The circuit according to claim 1 wherein said off chip variable voltage driver circuit is deposited on a first chip and the output voltage off said first chip at an interface to a second chip to which said first chip is to be connected is determined by logical selection of the pins of the first driver output level input.
- 3. The circuit according to claim 1 wherein signal integrity is maintained through the ration of device sizes in a feedback path and pre-driver conforming to standard I/O cell definitions and power grid topologies.
- 4. The circuit according to claim 1 wherein the driver circuits are bidirectional and can receive dual voltage swings with receiver thresholds switched through the same logical pin.
- 5. The circuit according to claim 1 wherein the circuit is switchable and generates either a 2.5V signal swing or a 1.8V signal swing without performance loss between the two signal swings, and the 1.8V signal is obtained by a feedback path around the output PFET device.
- 6. The circuit according to claim 1 wherein the circuit is switchable one of multiple signal swings can be selected be selected to put out a selected signal swing through a single input pin enabling migratability across machines with technologies that use differing signal swings.
- 7. The circuit according to claim 1 wherein said off chip driver that produces a variable voltage output swing of differing voltages off of a single 2.5V power supply.
- 8. The circuit according to claim 1 wherein said voltage driver circuit produces a variable voltage output swing off of a single voltage power supply which is logically configurable.
CROSS REFERENCE TO RELATED APPLICATIONS:
The present application related to the following patent application filed concurrently herewith:
"Method of interconnecting CMOS chip types", filed May 4, 1998, U.S. Ser. No. 09/071,906, now U.S. Pat. No. 5,900,777.
This application and the present application are owned by one and the same assignee, International Business Machines Corporation of Armonk, N.Y.
US Referenced Citations (6)
Non-Patent Literature Citations (2)
Entry |
"Switch Mode Power Supply For CRT Display" IBM Technical Disclosure Bulletin, vol. 29, No. 9, Feb. 1987, pp. 3921-3922. |
"Transistor Rectifier Regulator" IBM Technical Disclosure Bulletin, Nov. 1979, pp. 2319-2320. |