1. Technical Field
This disclosure relates to disk drives, including but not limited to hybrid hard drives. More particularly, the disclosure relates to systems and methods for varying data redundancy in solid-state memory of a disk drive.
2. Description of the Related Art
Non-volatile memory devices typically provide better performance for reading and writing data than magnetic media. Accordingly, in storage devices it is advantageous to utilize non-volatile memory for storing data. However, a problem with using non-volatile memory for storing data is that reliability of non-volatile memory degrades over time.
Non-volatile memory devices can typically endure a limited number of write cycles over their useful life. Various factors can contribute to data errors in non-volatile memory devices, which include charge loss or leakage over time, read disturb, and device wear caused by program-erase cycles. Non-volatile memory degradation can cause stored data to be corrupted. For example, when the number of bit errors on a read operation exceeds the ECC (error correction code) correction's capability of the non-volatile memory device, a read operation fails.
Systems and methods that embody the various features of the invention will now be described with reference to the following drawings, in which:
While certain embodiments are described, these embodiments are presented by way of example only, and are not intended to limit the scope of protection. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms. Furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the scope of protection.
Overview
Non-volatile memory devices (NVM) (e.g., flash memory and other types of solid-state memory devices) store information in an array of memory cells. In single-level cell (SLC) non-volatile memory, each cell stores a single bit of information. In multi-level cell (MLC) non-volatile memory, each cell stores two or more bits of information. Non-volatile memory has a limited usable life that is measured by the number of times data can be written to a specific NVM location. As NVM wear increases (e.g., number of program-erase cycles increases), the reliability and data retention of the NVM decreases. MLC non-volatile memory (e.g., MLC NAND) is cheaper than SLC non-volatile memory, but tends to have slower access time, lower endurance, and lower data retention.
To improve performance, some disk drives take advantage of the speed of non-volatile memory to store certain data in non-volatile memory. This data can include frequently accessed data and data accessed at start-up. Disk drives that comprise non-volatile memory cache in addition to magnetic storage are referred to as “hybrid hard disk drives” or “hybrid hard drives” throughout this disclosure. In some hybrid hard drives, MLC NVM can be a good choice for cache storage due to its low cost and high storage density. Non-volatile memory is typically used both as read cache (e.g., a copy of data exists in magnetic storage) and write cache (e.g., data stored in NVM cache is a more recent version than data stored in magnetic storage).
In some embodiments of the present invention, redundancy of data stored in an NVM cache of a hybrid hard drive is increased as the NVM wears out. When reliability (e.g., error rate) of the NVM device falls below a threshold, data redundancy can be implemented to counteract the degradation of reliability of the NVM. In some embodiments, redundancy can be implemented using RAID (Redundant Array of Independent Disks) techniques. For example, when data mirroring or shadowing (e.g., RAID 1) is used, two or more copies of data are written to different locations in the NVM. In case data stored in one location becomes corrupted (e.g., error rate exceeds the ECC capability) and cannot be recovered, a “mirror” copy of the data is used instead. As another example, when RAID parity (e.g., RAID 3, 4, 5, 6, 50, 60, etc.) is used, redundant information or “parity” data is created and written, along with data, to the NVM. When data stored in the NVM becomes corrupted and cannot be recovered, parity data can be is used to reconstruct the data. In some embodiments, varying redundancy of data stored in non-volatile memory cache allows the hybrid hard drive to continue providing improved performance despite the degradation of the NVM's reliability, and even as the NVM nears the end of its usable life. In addition, the effective endurance of the NVM can be extended, which can correspond to using an NVM module that guarantees a smaller number of program-erase cycles that can be endured. This can result in cost reductions of the hybrid hard drive. Moreover, caching data in the non-volatile memory can result in improved power consumption.
System Overview
The non-volatile memory module 150 is preferably implemented using NAND flash memory devices. Other types of solid-state memory devices can alternatively be used, including flash integrated circuits, Chalcogenide RAM (C-RAM), Phase Change Memory (PC-RAM or PRAM), Programmable Metallization Cell RAM (PMC-RAM or PMCm), Ovonic Unified Memory (OUM), Resistance RAM (RRAM), NAND memory, NOR memory, EEPROM, Ferroelectric Memory (FeRAM), or other discrete NVM (non-volatile memory) chips. In one embodiment, the memory devices are preferably MLC devices, although SLC memory devices, or a combination of SLC and MLC devices may be used in some embodiments.
Storage system 120 can store data communicated by the host system 110. That is, the storage system 120 can act as memory storage for the host system 110. To facilitate this function, the controller 130 can implement a logical interface. Logical interface can present to the host system 110 storage system's memory as a set of logical addresses (e.g., contiguous address) where data can be stored. Internally, the controller 130 can map logical addresses to various physical memory addresses in the magnetic media 164 and/or the non-volatile memory module 150.
In one embodiment, at least a portion of the non-volatile memory module 150 can be used as cache 152. In another embodiment, entire non-volatile memory module 150 can be used as cache. The controller 130 can store data communicated by the host system 110 in the non-volatile memory. In one embodiment, non-volatile memory cache 152 can be used as a read cache and/or a write cache. When the non-volatile memory is used as a read cache, a copy of data also exists in the magnetic storage 160. When non-volatile memory is used as a write cache, data stored in non-volatile memory is the most recent version than data stored in the magnetic storage 160. To improve performance of the storage system 120 and/or host system 110, in some embodiments, various types of data can be stored in non-volatile memory cache, including frequently accessed data, data accessed at start-up (e.g., following a reset or power down), system data, sequentially accessed data, etc.
Varying Data Redundancy
In one embodiment, the remaining usable life (or reliability measure) can be based partly or wholly on a number of errors encountered when reading data stored in non-volatile memory. Non-volatile memory can degrade and wear out, which can cause corruption of stored data. With NAND flash memory, for example, data corruption can be caused by a program disturb (e.g., data not intended to be programmed is nonetheless changed by a program operation directed to adjacent NVM blocks), read disturb (e.g., data not intended to be read is changed by a read operation directed to adjacent NVM pages), data loss (e.g., charge loss over an extended storage period), etc. Various error correction code (ECC) mechanisms can be used for detecting and correcting data corruption. In one embodiment, the number of bit corruptions detected and/or fixed by the ECC mechanism can be monitored during the execution of read operations. The number of bit corruptions can provide a measure of remaining usable life of non-volatile memory. This measure can be determined, for example, by comparing the average number of bits corruptions to a set of tiered thresholds.
The remaining usable life (or reliability measure) can also be determined based partially or wholly on voltage threshold levels or voltage reference values selected or determined when reading data from MLC flash memory. The remaining usable life can correspond to a voltage threshold level selected from a range of possible threshold levels during reading data so that data errors are reduced or minimized. In another embodiment, the remaining usable life can correspond to the adjustment of programming algorithm parameters (e.g., programming time, erase time, etc.) when storing data in non-volatile memory.
In block 204, the process determines whether data should be mirrored. Alternatively, some initial redundancy (e.g., parity or mirroring) could be used to account for reliability overhead needed to account for to page read failures commonly encountered in new NVM modules. In one embodiment, the process 200 compares the reliability measurement determined in block 202 to a current mirroring threshold. The current mirroring threshold can be a preset value (e.g., a value corresponding to initial redundancy) or can, for example, be adjusted as non-volatile memory degrades. If the reliability measurement is below the current mirroring threshold, the process transitions to block 208 where it determines a mirroring density that corresponds to (e.g., is required to meet) the reliability measurement. In one embodiment, mirroring density can correspond to a number of copies of data that are written to non-volatile memory. For example, more copies of data (e.g., 2, 3, 4, etc.) can be written to non-volatile memory as its reliability degrades. After the mirroring density is determined, the process transitions to block 214 where the mirroring level is set to the mirroring density. After this operation is completed, the process transitions to block 218 where an allocation unit is created based on the determined mirroring density. In one embodiment, the format of the allocation unit reflects the mirroring density (e.g., number of copies of data to be written to non-volatile memory).
In one embodiment, if the reliability measurement is above (or equal to) the current mirroring threshold, the process transitions to block 206 where it compares the reliability measurement determined in block 202 to a current parity threshold. The parity threshold can be a preset value (e.g., a value corresponding to the initial redundancy) or can, for example, be adjusted as non-volatile memory degrades. If the reliability measurement is below the current parity threshold, the process transitions to block 212 where it determines a parity density that corresponds to (e.g., is required to meet) the reliability measurement. In one embodiment, parity density can correspond to a number of data sectors (e.g., non-volatile memory pages) for which parity data is created and stored in non-volatile memory. For example, parity data can be created for a group of N storage units (e.g., pages), where N can be set to 32, 16, 8, 4, or 2. In one embodiment, parity density is increased (i.e., N is decreased) as the reliability of non-volatile memory degrades. After the parity density is determined, the process transitions to block 216 where the parity level is set to the parity density. After this operation is completed, the process transitions to block 218 where the allocation unit is created based on the determined parity density. In one embodiment, the format of the allocation unit reflects the parity density (e.g., number of pages for which parity data is created).
In one embodiment, when the remaining usable life is determined to be above (or equal to) the current mirroring and parity thresholds, the process 200 transitions to block 210. No data redundancy can be utilized since the non-volatile memory has been determined to have sufficient reliability. Alternatively, some initial redundancy could be used. The process transitions to block 218 where the allocation unit is created based on no redundancy or on initial redundancy. In one embodiment, the format of the allocation unit reflects no redundancy (e.g., no mirroring and no parity data). In another embodiment, the format of the allocation unit reflects initial redundancy (e.g., initial parity or mirroring). Once the allocation unit has been created, the process 200 terminates.
In one embodiment, the remaining usable life can be determined by a signal processing subsystem. The non-volatile memory module 150 can include a bridge device coupled with non-volatile memory module via an interface such as ONFI. The bridge device can be further configured to communicate with the controller 130 over a high speed interface such as PCIe and to provide to the controller physical, page-level access/control to non-volatile memory. The bridge device can perform basic signal processing and channel management of non-volatile memory. This architecture is described in a co-pending patent application Ser. No. 13/226,393, entitled “SYSTEMS AND METHODS FOR AN ENHANCED CONTROLLER ARCHITECTURE IN DATA STORAGE SYSTEMS,” filed Sep. 6, 2011, the disclosure of which is hereby incorporated by reference in its entirety. In other embodiments, a bridge device may not be used and the non-volatile memory module 150 may be managed directly by the controller 130.
As explained above, the process 200 is preferably executed when a new non-volatile memory data storage unit is allocated for data to be written to non-volatile memory (e.g., in response to monitoring of reliability of non-volatile memory). Data to be written can be communicated by the host via a write command.
If the unit is not a newly allocated unit, the process transitions to block 306 where it sets a redundancy level to the already determined allocation unit format (e.g., already determined mirroring level, parity level, or no redundancy). The process transitions to block 308 where data is written to non-volatile memory. If, in block 302, it is determined that the unit is a newly allocated unit, the process transitions to block 304 where it sets the allocation unit format to the redundancy level to the level determined in blocks 210, 214, and/or 216 of
Examples of Varying Data Redundancy
When the reliability falls below threshold 512, mirroring is used for redundancy. In particular, while reliability is between thresholds 512 and 514, one additional copy of data is stored in non-volatile memory. When reliability decreases to being between thresholds 514 and 516, two additional copies of data are stored in non-volatile memory. When reliability decreases to being between thresholds 516 and 518, four additional copies of data are stored in non-volatile memory. Threshold 518 reflects the end of life of non-volatile memory.
As will be apparent, numerous other levels and types of redundancy can additionally or alternatively be used. For example, in some embodiments, the redundancy level may be increased over time by changing an ECC level or algorithm (or parameters of algorithm) used to generate ECC data.
In some embodiments, varying data redundancy allows hybrid hard drives to improve performance and reduce cost. Redundancy of data stored in non-volatile memory can be increased as non-volatile memory degrades. Various types RAID parity and/or mirroring mechanisms can be used depending on the measured reliability of the non-volatile memory. Redundant data can be used to recover data stored in the non-volatile memory in case of data corruption. Varying the redundancy of data stored in the non-volatile memory cache provides performance improvement even as the non-volatile memory's reliability degrades. Costs are reduced because the cheaper non-volatile memory that guarantees a lower number of program-erase cycles can be utilized.
Other Variations
As used in this application, “non-volatile memory” typically refers to solid-state memory such as, but not limited to, NAND flash. However, the systems and methods of this disclosure may also be useful in more conventional hard drives and hybrid drives including both solid-state and hard drive components. The solid-state storage devices (e.g., dies) may be physically divided into planes, blocks, pages, and sectors, as is known in the art. Other forms of storage (e.g., battery backed-up volatile DRAM or SRAM devices, magnetic disk drives, etc.) may additionally or alternatively be used.
Those skilled in the art will appreciate that in some embodiments, other types of redundancy can be implemented. In addition, the actual steps taken in the processes shown in
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of protection. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms. Furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the protection. For example, the various components illustrated in the figures may be implemented as software and/or firmware on a processor, ASIC/FPGA, or dedicated hardware. Also, the features and attributes of the specific embodiments disclosed above may be combined in different ways to form additional embodiments, all of which fall within the scope of the present disclosure. Although the present disclosure provides certain preferred embodiments and applications, other embodiments that are apparent to those of ordinary skill in the art, including embodiments which do not provide all of the features and advantages set forth herein, are also within the scope of this disclosure. Accordingly, the scope of the present disclosure is intended to be defined only by reference to the appended claims.
Number | Name | Date | Kind |
---|---|---|---|
5333138 | Richards et al. | Jul 1994 | A |
5392244 | Jacobson et al. | Feb 1995 | A |
5581785 | Nakamura et al. | Dec 1996 | A |
5586291 | Lasker et al. | Dec 1996 | A |
6016530 | Auclair et al. | Jan 2000 | A |
6044439 | Ballard et al. | Mar 2000 | A |
6115200 | Allen et al. | Sep 2000 | A |
6275949 | Watanabe | Aug 2001 | B1 |
6429990 | Serrano et al. | Aug 2002 | B2 |
6487636 | Dolphin et al. | Nov 2002 | B1 |
6661591 | Rothberg | Dec 2003 | B1 |
6662267 | Stewart | Dec 2003 | B2 |
6687850 | Rothberg | Feb 2004 | B1 |
6725342 | Coulson | Apr 2004 | B1 |
6754021 | Kisaka et al. | Jun 2004 | B2 |
6785767 | Coulson | Aug 2004 | B2 |
6807630 | Lay et al. | Oct 2004 | B2 |
6856556 | Hajeck | Feb 2005 | B1 |
6909574 | Aikawa et al. | Jun 2005 | B2 |
6968450 | Rothberg et al. | Nov 2005 | B1 |
7017037 | Fortin et al. | Mar 2006 | B2 |
7028174 | Atai-Azimi et al. | Apr 2006 | B1 |
7082494 | Thelin et al. | Jul 2006 | B1 |
7107444 | Fortin et al. | Sep 2006 | B2 |
7120806 | Codilian et al. | Oct 2006 | B1 |
7126857 | Hajeck | Oct 2006 | B2 |
7136973 | Sinclair | Nov 2006 | B2 |
7142385 | Shimotono et al. | Nov 2006 | B2 |
7308531 | Coulson | Dec 2007 | B2 |
7334082 | Grover et al. | Feb 2008 | B2 |
7356651 | Liu et al. | Apr 2008 | B2 |
7395452 | Nicholson et al. | Jul 2008 | B2 |
7411757 | Chu et al. | Aug 2008 | B2 |
7424577 | Bali et al. | Sep 2008 | B2 |
7430136 | Merry, Jr. et al. | Sep 2008 | B2 |
7447807 | Merry et al. | Nov 2008 | B1 |
7461202 | Forrer, Jr. et al. | Dec 2008 | B2 |
7472222 | Auerbach et al. | Dec 2008 | B2 |
7477477 | Maruchi et al. | Jan 2009 | B2 |
7502256 | Merry, Jr. et al. | Mar 2009 | B2 |
7509441 | Merry et al. | Mar 2009 | B1 |
7509471 | Gorobets | Mar 2009 | B2 |
7516346 | Pinheiro et al. | Apr 2009 | B2 |
7596643 | Merry, Jr. et al. | Sep 2009 | B2 |
7610438 | Lee et al. | Oct 2009 | B2 |
7613876 | Bruce et al. | Nov 2009 | B2 |
7631142 | Nishide et al. | Dec 2009 | B2 |
7634585 | Conley et al. | Dec 2009 | B2 |
7644231 | Recio et al. | Jan 2010 | B2 |
7653778 | Merry, Jr. et al. | Jan 2010 | B2 |
7685337 | Merry, Jr. et al. | Mar 2010 | B2 |
7685338 | Merry, Jr. et al. | Mar 2010 | B2 |
7685360 | Brunnett et al. | Mar 2010 | B1 |
7685374 | Diggs et al. | Mar 2010 | B2 |
7725661 | Liu et al. | May 2010 | B2 |
7733712 | Walston et al. | Jun 2010 | B1 |
7752491 | Liikanen et al. | Jul 2010 | B1 |
7765373 | Merry et al. | Jul 2010 | B1 |
7831634 | Petev et al. | Nov 2010 | B2 |
7861038 | Fontenot et al. | Dec 2010 | B2 |
7898855 | Merry, Jr. et al. | Mar 2011 | B2 |
7912991 | Merry et al. | Mar 2011 | B1 |
7934053 | Chen et al. | Apr 2011 | B2 |
7936603 | Merry, Jr. et al. | May 2011 | B2 |
7962685 | Cheung et al. | Jun 2011 | B2 |
7962792 | Diggs et al. | Jun 2011 | B2 |
8078918 | Diggs et al. | Dec 2011 | B2 |
8090899 | Syu | Jan 2012 | B1 |
8095851 | Diggs et al. | Jan 2012 | B2 |
8108692 | Merry et al. | Jan 2012 | B1 |
8122185 | Merry, Jr. et al. | Feb 2012 | B2 |
8127048 | Merry et al. | Feb 2012 | B1 |
8135903 | Kan | Mar 2012 | B1 |
8151020 | Merry, Jr. et al. | Apr 2012 | B2 |
8161227 | Diggs et al. | Apr 2012 | B1 |
8166245 | Diggs et al. | Apr 2012 | B2 |
8243525 | Kan | Aug 2012 | B1 |
8254172 | Kan | Aug 2012 | B1 |
8261012 | Kan | Sep 2012 | B2 |
8296625 | Diggs et al. | Oct 2012 | B2 |
8312207 | Merry, Jr. et al. | Nov 2012 | B2 |
8316176 | Phan et al. | Nov 2012 | B1 |
8341339 | Boyle et al. | Dec 2012 | B1 |
8375151 | Kan | Feb 2013 | B1 |
8392635 | Booth et al. | Mar 2013 | B2 |
8397107 | Syu et al. | Mar 2013 | B1 |
8407449 | Colon et al. | Mar 2013 | B1 |
8423722 | Deforest et al. | Apr 2013 | B1 |
8433858 | Diggs et al. | Apr 2013 | B1 |
8443167 | Fallone et al. | May 2013 | B1 |
8447920 | Syu | May 2013 | B1 |
8458435 | Rainey, III et al. | Jun 2013 | B1 |
8478930 | Syu | Jul 2013 | B1 |
8489854 | Colon et al. | Jul 2013 | B1 |
8503237 | Horn | Aug 2013 | B1 |
8521972 | Boyle et al. | Aug 2013 | B1 |
8549236 | Diggs et al. | Oct 2013 | B2 |
8583835 | Kan | Nov 2013 | B1 |
8601311 | Horn | Dec 2013 | B2 |
8601313 | Horn | Dec 2013 | B1 |
8612669 | Syu et al. | Dec 2013 | B1 |
8612804 | Kang et al. | Dec 2013 | B1 |
8615681 | Horn | Dec 2013 | B2 |
8638602 | Horn | Jan 2014 | B1 |
8639872 | Boyle et al. | Jan 2014 | B1 |
8683113 | Abasto et al. | Mar 2014 | B2 |
8700834 | Horn et al. | Apr 2014 | B2 |
8700950 | Syu | Apr 2014 | B1 |
8700951 | Call et al. | Apr 2014 | B1 |
8706985 | Boyle et al. | Apr 2014 | B1 |
8707104 | Jean | Apr 2014 | B1 |
8745277 | Kan | Jun 2014 | B2 |
20010018728 | Topham et al. | Aug 2001 | A1 |
20050125614 | Royer, Jr. | Jun 2005 | A1 |
20050172082 | Liu et al. | Aug 2005 | A1 |
20050251617 | Sinclair et al. | Nov 2005 | A1 |
20060080501 | Auerbach et al. | Apr 2006 | A1 |
20060143360 | Petev et al. | Jun 2006 | A1 |
20060143427 | Marwinski et al. | Jun 2006 | A1 |
20060143507 | Tanaka | Jun 2006 | A1 |
20060195657 | Tien et al. | Aug 2006 | A1 |
20060248124 | Petev et al. | Nov 2006 | A1 |
20060248387 | Nicholson et al. | Nov 2006 | A1 |
20070174546 | Lee | Jul 2007 | A1 |
20070220202 | Sutardja et al. | Sep 2007 | A1 |
20070288692 | Bruce et al. | Dec 2007 | A1 |
20080005462 | Pyeon et al. | Jan 2008 | A1 |
20080040537 | Kim | Feb 2008 | A1 |
20080059694 | Lee | Mar 2008 | A1 |
20080130156 | Chu et al. | Jun 2008 | A1 |
20080141054 | Danilak | Jun 2008 | A1 |
20080141055 | Danilak | Jun 2008 | A1 |
20080177938 | Yu | Jul 2008 | A1 |
20080209114 | Chow et al. | Aug 2008 | A1 |
20080215800 | Lee et al. | Sep 2008 | A1 |
20080222353 | Nam et al. | Sep 2008 | A1 |
20080244164 | Chang et al. | Oct 2008 | A1 |
20080256287 | Lee et al. | Oct 2008 | A1 |
20080294846 | Bali et al. | Nov 2008 | A1 |
20080307270 | Li | Dec 2008 | A1 |
20090019218 | Sinclair et al. | Jan 2009 | A1 |
20090024793 | Fontenot et al. | Jan 2009 | A1 |
20090031072 | Sartore | Jan 2009 | A1 |
20090043831 | Antonopoulos et al. | Feb 2009 | A1 |
20090103203 | Yoshida | Apr 2009 | A1 |
20090106518 | Dow | Apr 2009 | A1 |
20090144501 | Yim et al. | Jun 2009 | A2 |
20090150599 | Bennett | Jun 2009 | A1 |
20090172324 | Han et al. | Jul 2009 | A1 |
20090249168 | Inoue | Oct 2009 | A1 |
20090271562 | Sinclair | Oct 2009 | A1 |
20090327603 | McKean et al. | Dec 2009 | A1 |
20100088459 | Arya et al. | Apr 2010 | A1 |
20100169604 | Trika et al. | Jul 2010 | A1 |
20100174849 | Walston et al. | Jul 2010 | A1 |
20100250793 | Syu | Sep 2010 | A1 |
20100268881 | Galchev et al. | Oct 2010 | A1 |
20110082985 | Haines et al. | Apr 2011 | A1 |
20110099323 | Syu | Apr 2011 | A1 |
20110283049 | Kang et al. | Nov 2011 | A1 |
20120260020 | Suryabudi et al. | Oct 2012 | A1 |
20120278531 | Horn | Nov 2012 | A1 |
20120284460 | Guda | Nov 2012 | A1 |
20120324191 | Strange et al. | Dec 2012 | A1 |
20130132638 | Horn et al. | May 2013 | A1 |
20130145106 | Kan | Jun 2013 | A1 |
20130290793 | Booth et al. | Oct 2013 | A1 |
20140059405 | Syu et al. | Feb 2014 | A1 |
20140115427 | Lu | Apr 2014 | A1 |
20140133220 | Danilak et al. | May 2014 | A1 |
20140136753 | Tomlin et al. | May 2014 | A1 |
Entry |
---|
U.S. Appl. No. 12/720,568, filed Mar. 9, 2010, 22 pages. |
Gokul Soundararajan, Vijayan Prabhakaran, Mahesh Balakrishan, Ted Wobber, “Extending SSD Lifetimes with Disk-Based Write Caches”, http://research.microsoft.com/pubs/115352/hybrid.pdf, Feb. 2010. |
Tao Xie, Deepthi Madathil, “SAIL: Self-Adaptive File Reallocation on Hybrid Disk Arrays”, The 15th Annual IEEE International Conference on High Performance Computing (HiPC 2008), Bangalore, India, Dec. 17-20, 2008. |
Non-Volatile Memory Host Controller Interface revision 1.0 specification available for download at http://www.intel.com/standards/nvmhci/index.htm. Ratified on Apr. 14, 2008, 65 pages. |
Hannes Payer, et al., “Combo Drive: Optimizing Cost and Performance in a Heterogeneous Storage Device”, In First Workshop on Integrating Solid-state Memory into the Storage Hierarchy, Mar. 2009, 8 pages. |
X. Wu and A. L. N. Reddy. Managing storage space in a flash and disk hybrid storage system. IEEE MASCOTS Conf., Sep. 2009, 4 pages. |
U.S. Appl. No. 13/105,785, filed May 11, 2011, to Boyle et al., 19 pages. |