The disclosure relates to voltage-controlled oscillators (VCO's), and more particularly, to techniques for tuning VCO's in the presence of temperature change.
A voltage-controlled oscillator (VCO) is an electrical oscillator designed to generate a signal having an oscillation frequency controlled by a voltage input signal. To ease tuning range requirements, VCO's are often designed to support a voltage input signal that includes both a coarse frequency tuning signal and a fine frequency tuning signal.
The coarse frequency tuning signal is typically determined by selecting an optimal coarse tuning signal during a coarse tuning mode, while setting the fine frequency tuning signal to a constant value. Subsequently, the fine frequency tuning signal is dynamically adjusted during a fine tuning mode, while setting the coarse frequency tuning signal to the earlier determined optimal coarse tuning signal.
During fine tuning mode, VCO temperature change may affect the level of the fine frequency tuning signal required to maintain a constant VCO output frequency. Such temperature change may undesirably cause the fine frequency tuning signal to exceed the linear input range of the VCO, especially when the VCO is operated using a low supply voltage.
It would be desirable to provide techniques for limiting the effects of temperature change on the VCO fine frequency tuning signal.
An aspect of the present disclosure provides a method for tuning an output frequency of a voltage-controlled oscillator (VCO), the method comprising setting a fine tuning signal Vtune for the VCO during a coarse tuning mode, and determining a preferred coarse tuning signal for the VCO during the coarse tuning mode, the method further comprising: sensing a temperature; during the coarse tuning mode; and setting the fine tuning input signal Vtune during the coarse tuning mode based on the sensed temperature.
Another aspect of the present disclosure provides an apparatus for tuning an output frequency of a voltage-controlled oscillator (VCO), the VCO accepting a fine tuning voltage Vtune and a coarse tuning signal for controlling the output frequency of the VCO, the apparatus comprising: a temperature sensor for measuring a temperature T; and a voltage generator for generating a voltage Vtune_coarse(T) based on the measured temperature T, the VCO accepting the voltage Vtune_coarse(T) as the fine tuning voltage Vtune during a coarse tuning mode of the VCO.
Yet another aspect of the present disclosure provides an apparatus for tuning an output frequency of a voltage-controlled oscillator (VCO), the VCO accepting a fine tuning voltage Vtune and a coarse tuning signal for controlling the output frequency of the VCO, the apparatus comprising: means for sensing a temperature; and means for setting the fine tuning input signal Vtune during the coarse tuning mode based on the sensed temperature.
Yet another aspect of the present disclosure provides a computer program product for tuning an output frequency of a voltage-controlled oscillator (VCO), the VCO accepting a fine tuning voltage Vtune and a coarse tuning signal for controlling the output frequency of the VCO, the product comprising: computer-readable media comprising code for causing a computer to sense a temperature; and computer-readable media comprising code for causing a computer to set the fine tuning input signal Vtune during the coarse tuning mode based on the sensed temperature.
The detailed description set forth below in connection with the appended drawings is intended as a description of exemplary embodiments of the present invention and is not intended to represent the only exemplary embodiments in which the present invention can be practiced. The term “exemplary” used throughout this description means “serving as an example, instance, or illustration,” and should not necessarily be construed as preferred or advantageous over other exemplary embodiments. The detailed description includes specific details for the purpose of providing a thorough understanding of the exemplary embodiments of the invention. It will be apparent to those skilled in the art that the exemplary embodiments of the invention may be practiced without these specific details. In some instances, well known structures and devices are shown in block diagram form in order to avoid obscuring the novelty of the exemplary embodiments presented herein.
To ease dynamic range requirements, the VCO 130 supports a voltage input signal that includes both a coarse frequency tuning signal 150a (or “coarse tuning signal”) and a fine frequency tuning signal 120a, or Vtune. To tune the VCO output frequency to a desired frequency, the operation of the frequency synthesizer 100 may be divided into a coarse tuning mode followed by a fine tuning mode. The VCO tuning process for the frequency synthesizer 100 is further described herein with reference to the flow diagram in
In
At step 181, a coarse tuning mode bank selector 150 in
Upon completion of the coarse tuning mode, the frequency synthesizer 100 switches to a fine tuning mode at step 182. The coarse tuning mode bank selector 150 sets the coarse tuning signal 150a to be the preferred coarse tuning signal determined at step 181. At step 183, the switch 120 couples Vtune to the output 110a of a loop filter (LPF) 110, which is also coupled to a phase-frequency detector/charge pump (PFD/CP) 105. Collectively, the PFD/CP 105, LPF 110, VCO 130, and frequency divider 140 form a phase-locked loop (PLL) that allows the frequency of the divider output 140a to track the frequency Fref of a reference signal provided to the PFD/CP 105.
In certain implementations, if an additional frequency divider (not shown) is provided to further divide the divider output 140a prior to the PFD/CP 105, then the signal provided to the coarse tuning bank selector 150 need not be the same as the signal fed back to the PFD/CP 105. In that case, the reference frequencies provided to the coarse tuning bank selector 150 and the PFD/CP may be correspondingly different.
In certain implementations (not shown), additional modulation may be applied to the frequency or phase of a PLL output signal by, e.g., dynamically modulating the divider ratio, or employing other techniques well-known to one of ordinary skill in the art.
In certain implementations, the functionality of the coarse tuning bank selector 150 may be performed using a pulse counter and comparator (not shown). For example, the pulse counter may count the number of pulses in the VCO output signal over a period of time, and compare the number of counted pulses to a reference number of pulses based on a reference signal. The comparison gives an indication of whether the VCO output signal is slower or faster than the reference signal, which may be used to select the appropriate coarse tuning mode setting for the VCO 130. These and other implementations of a PLL are known to one of ordinary skill in the art, and are contemplated to be within the scope of the present disclosure.
In certain implementations, Vtune may be an analog signal directly coupled to, e.g., a variable capacitance element, such as a varactor. In alternative implementations, Vtune may be digitally specified, and be, e.g., directly coupled to a plurality of weighted capacitances in a capacitor bank. The techniques of the present disclosure are contemplated to be applicable to all such implementations of a VCO.
In
One factor contributing to the deviation of Vtune from Vtune_coarse is the difference in precision between coarse tuning mode and fine tuning mode. In particular, the VCO output frequency after coarse tuning mode may generally be offset from the actual target frequency, e.g., by up to one-half of the coarse frequency step size of the capacitor bank used in the VCO. Therefore, during fine tuning mode, Vtune may be adjusted away from Vtune_coarse to allow the VCO output frequency to track the target frequency to within the resolution of the fine tuning mode. In
Another factor contributing to the deviation of Vtune from Vtune_coarse is any temperature change experienced by the VCO after switching from coarse tuning mode to fine tuning mode. In particular, as previously described with reference to
As an illustration of the effects of temperature change on Vtune, assume that the VCO temperature during coarse tuning mode is the minimum expected operating temperature, Tmin. In the subsequent fine tuning mode, if the VCO temperature increases to the maximum expected operating temperature, Tmax, then assuming the characteristics shown in
Conversely, if the VCO temperature during coarse tuning mode is the maximum expected operating temperature, Tmax, and the VCO temperature decreases to the minimum expected operating temperature, Tmin, during fine tuning mode, then Vtune will be expected to decrease by a corresponding amount Vtemp_max, i.e., Vtune will change by −Vtemp_max (4).
Due to the factors described above, Vtune may generally vary during fine tuning mode from a minimum voltage level {Vtune_coarse−[(3)+(4)]} to a maximum voltage level {Vtune_coarse+[(1)+(2)]}. This range in voltage variation is also denoted as Vtune_range in
One of ordinary skill in the art will appreciate that, because the prior art frequency synthesizer 100 does not account for the actual VCO temperature during coarse tuning mode, both possible temperature-dependent variations in Vtune (i.e., increase by up to +Vtemp_max (3) and decrease by up to −Vtemp_max (4)) must be budgeted for in a robust circuit design.
As modern devices move toward employing lower supply voltages to save power, it becomes increasingly difficult to keep Vtune within the VCO linear operating range across temperature. In particular,
As the variation of Vtune with temperature is generally unaffected by a change in the supply voltage, the limits of Vtune_range are seen to exceed the limits of Vrange_linear_lo when the supply voltage is VDD_lo. In particular, a portion (A) of Vtune_range is higher than the upper limit Vmax_lo of Vrange_linear_lo, while a portion (B) of Vtune_range is lower than the lower limit Vmin_lo of Vrange_linear_lo. This leads to Vtune undesirably being outside the VCO linear range for some temperatures during fine tuning mode.
According to the present disclosure, techniques are provided to reduce the expected variation of Vtune across temperature, so that the VCO may reliably operate across temperature using reduced supply voltage levels.
In
The digital controller 470 maps the signal 480a to a digital value of Vtune_coarse(T), or signal 470a. A voltage generator 460 converts signal 470a to an analog voltage level Vtune_coarse(T), or signal 460a, which is provided to the VCO 130 as Vtune during coarse tuning mode. As the digital controller 470 adjusts the value of signal 470a based on the sensed temperature 480a, Vtune_coarse(T) is effectively a temperature-adjusted level of Vtune_coarse. As further described hereinbelow, providing such a temperature-adjusted Vtune_coarse(T) during coarse tuning mode may help reduce the expected variation of Vtune over temperature during fine tuning mode.
In an exemplary embodiment, the elements of the generator 450 collectively function to map the sensed temperature T to a voltage Vtune_coarse(T) according to a V-T characteristic, such as that shown in
Note the V-T characteristic 490 depicted in
In an exemplary embodiment (not shown), a VCO V-T characteristic such as characteristic 490 in
In
Immediately after the frequency synthesizer 400 switches from coarse tuning mode to fine tuning mode, the voltage Vtune may deviate from the initial coarse tuning mode level of Vtune_coarse(T) by up to +Verr (2) and −Verr (3), due to the aforementioned frequency bank step size and other factors not explicitly enumerated herein. These deviations are identical to those depicted in
Furthermore, due to subsequent temperature variation during fine tuning mode, Vtune may further vary from Vtune_coarse(T) by a maximum positive adjustment +Vtemp_hi(T) (5), and a maximum negative adjustment −Vtemp_lo(T) (6).
For example, assume that the VCO temperature during coarse tuning mode is the minimum expected operating temperature Tmin, as illustrated in
Similarly, if the VCO temperature during coarse tuning mode is the maximum expected operating temperature Tmax, as shown in
For intermediate values of T between Tmin and Tmax, the variation of Vtune over temperature is expected to be similarly reduced due to the features described above.
One of ordinary skill in the art will thus appreciate that by making Vtune_coarse temperature-dependent in the manner described, the total variation of Vtune over temperature during fine tuning mode may be decreased. This allows the frequency synthesizer 400 to, e.g., maintain linear operation using a lower supply voltage than may be supported by the prior art synthesizer 100.
In
At step 605, the three-way switch 120 couples Vtune to a signal 460a, or Vtune_coarse(T), generated by the Vtune_coarse(T) voltage generator 450. Vtune_coarse(T) voltage generator 450 may implement the temperature-dependent voltage generation techniques for Vtune_coarse(T) described earlier herein.
At step 610, the coarse tuning mode bank selector 150 determines the preferred coarse tuning signal.
At step 620, the coarse tuning mode bank selector 150 sets the coarse tuning signal 150a to be the preferred coarse tuning signal determined at step 181.
At step 630, the switch 120 couples the Vtune to the output 110a of a loop filter (LPF) 110, which may also coupled to a phase-frequency detector/charge pump (PFD/CP) 105 as shown in
The techniques described herein may be implemented in hardware, software, firmware, or any combination thereof. If implemented in hardware, the techniques may be realized using digital hardware, analog hardware or a combination thereof. If implemented in software, the techniques may be realized at least in part by a computer-program product that includes a computer readable medium on which one or more instructions or code is stored.
By way of example, and not limitation, such computer-readable media can comprise RAM, such as synchronous dynamic random access memory (SDRAM), read-only memory (ROM), non-volatile random access memory (NVRAM), ROM, electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), FLASH memory, CD-ROM or other optical disk storage, magnetic disk storage or other magnetic storage devices, or any other tangible medium that can be used to carry or store desired program code in the form of instructions or data structures and that can be accessed by a computer.
The instructions or code associated with a computer-readable medium of the computer program product may be executed by a computer, e.g., by one or more processors, such as one or more digital signal processors (DSPs), general purpose microprocessors, ASICs, FPGAs, or other equivalent integrated or discrete logic circuitry.
In this specification and in the claims, it will be understood that when an element is referred to as being “connected to” or “coupled to” another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected to” or “directly coupled to” another element, there are no intervening elements present.
A number of aspects and examples have been described. However, various modifications to these examples are possible, and the principles presented herein may be applied to other aspects as well. These and other aspects are within the scope of the following claims.