Vector fixed-lag algorithm for decoding input symbols

Information

  • Patent Grant
  • 6708149
  • Patent Number
    6,708,149
  • Date Filed
    Monday, April 30, 2001
    24 years ago
  • Date Issued
    Tuesday, March 16, 2004
    22 years ago
Abstract
The present invention discloses an apparatus and method of decoding information received over a noisy communications channel to determine the intended transmitted information. The present invention uses a vector fixed-lag algorithm to determine the probabilities of the intended transmitted information. The algorithm is implemented by multiplying an initial state vector with a matrix containing information about the communications channel. The product is then recursively multiplied by the matrix τ times, using the new product with each recursive multiplication and the forward information is stored for a fixed period of time, τ. The final product is multiplied with a unity column vector yielding a probability of a possible input. The estimated input is the input having the largest probability.
Description




FIELD OF THE INVENTION




The present invention relates generally to a method and apparatus for decoding received symbols. More particularly, the present invention discloses a vector fix-lag algorithm for determining the probabilities of transmitted symbols given received symbols.




BACKGROUND OF THE INVENTION




Forward-backward algorithms (FBAs) are often used in a variety of applications such as speech recognition, handwriting verification such as signature verification, error correction code decoding, etc., to calculate probabilities. As the name suggests, FBAs are a combination of forward algorithms and backward algorithms using vector-matrix products. Equipment that performs the algorithms requires large amounts of memory for storing all the matrices and intermediate matrix products needed to support the algorithms.




FBAs can be used to calculate the probabilities associated with the functions of Hidden Markov Models (HMMs) in voice recognition to recognize discrete and continuous speech. When a HMM is applied to describe a communication channel, products of sequences of probability density matrices are used to estimate the a posteriori probabilities of transmitted symbols given the received symbols. In other words, mathematical models are used to estimate the probabilities of the transmitted symbol knowing the received symbol.




Conventional FBA techniques require that a sequence of matrices multiplied by a first vector in a recursive manner in a forward part of the algorithm be stored in memory. The decoding process can start only after a long sequence of symbols has been received. This is unacceptable in many applications (a telephone application, for example) that impose strict constraints on the message delivery delay. Thus, new technology is needed to improve the vector-matrix product calculation that enables a decoder to estimate the product, and thus estimate the input symbols, without waiting for the whole symbol sequence to be received. This technology enables a designer to trade the product estimation accuracy for smaller delays in information delivery.




SUMMARY OF THE INVENTION




The invention provides a method and apparatus that performs a fixed-lag computation process.




The present invention discloses an apparatus and method of decoding information received over a noisy communications channel to determine the intended transmitted information. The present invention improves upon the traditional forward-backward algorithm with a vector fixed-lag algorithm. The algorithm is implemented by multiplying an initial state vector with a matrix containing information about the communications channel. The product is then recursively multiplied by the matrix τ times, using the new product with each recursive multiplication. The new product forward information is stored in storage elements. The final product is multiplied with a final state column vector yielding a probability of a possible input. The estimated input is the input having the largest probability. The invention may be applied to a maximum a posteriori estimation of input symbols in systems modeled by an input-output HMM such as symbols transmitted over noisy channels, to handwriting and speech recognition and other probabilistic systems.




The vector fixed-lag process of the invention replaces the conventional forward-backward algorithm. This eliminates the need of saving long sequences of the forward vectors. Accordingly, memory requirements and decoding delay are reduced when using the fixed-lag process to decode information transmitted over a communication channel.




The present invention discloses a fixed-lag method for determining the probability of a transmitted symbol at a time t, transmitted along a communications channel with bursts of errors, given a received symbol. The method comprises obtaining initial state information vector about the channel and obtaining channel information matrices describing the probabilities that the transmitted symbol would be transmitted along a communications channel with and without error. The method further comprises generating intermediate probabilities, each intermediate probability being the product of the initial state information vector at a time previous to time t, and a channel information matrix, storing the intermediate probabilities in storage elements, and multiplying a last intermediate probability with a final state vector to yield the probability of the transmitted symbol.











BRIEF DESCRIPTION OF THE DRAWING




The invention will be described with reference to the accompanying Figures in which like elements are referenced with like numerals and in which:





FIG. 1

illustrates information processing according to the invention over a wireless communication channel;





FIG. 2

illustrates a decoder used to decode symbols transmitted according to

FIG. 1

;





FIG. 3

illustrates a decoder in another aspect;





FIG. 4

illustrates matrix storage according to the invention;





FIG. 5

illustrates matrix storage according to the invention in another aspect;





FIG. 6

illustrates a fixed-lag decoding apparatus for three memory elements according to the invention;





FIG. 7

illustrates a fixed-lag decoding apparatus according to another embodiment of the invention in which matrix inversion is used;





FIG. 8

illustrates a flowchart according to the invention;





FIG. 9

illustrates a decoder in accordance with another embodiment of the present invention;





FIG. 10

illustrates an encoder in which the present invention may be used; and





FIG. 11

illustrates a table of data exemplifying the embodiments of FIGS.


9


and


10


.











DETAILED DESCRIPTION OF THE INVENTION




The invention provides a method and apparatus to generate estimates for processing data symbols using algorithms and sequences of matrices. The purpose of the algorithms is to determine the intended transmitted or input symbol from the received symbol, which has been corrupted with noise. In general, the matrices reflect the relationship between a system state variables, input sequences and output sequences. For example, the matrices may describe a HMM of a communication system representing the following probabilities: Pr(X


t


,Y


t


,S


t


|S


t−1


). In other words, the matrices describe the transition from state S


t−1


(i.e., state S at a prior time of t−1) to the next state S


t


(i.e., state S at a later time t) and generate the next input symbol X


t


and the next output symbol Y


t


.




The communication system modeled above could be a wireless radio system, fiber optical system, wired system, or other suitable system. Many other systems can be analyzed using state matrix information. For instance, bioelectrical signals such as electrocardiograms, seismic measurements, handwriting recognition devices, speech recognition devices, control systems and others can be modeled as machines or processes whose next state depends upon the current state, plus input information or symbols. All these systems can be described in terms of communications systems. For example, in speech recognition, the output sequence is what is heard, while the input sequence is the intended meaning. In handwriting recognition, the output is the sequence of scanned handwritten symbols, while the input is the intended sequence of letters that a decoder must recognize. Therefore, in the sequel we will use the communication system terminology, but the results have a broader application.




For the applications noted above or for other suitable applications, the following general structure may be used to calculate the matrix product to determine the probability of the intended input.










p
t

=



α
0






i
=
1


t
-
1





M
i



W
t






i
=

t
+
1


T




M
i



β
T






=


α

t
-
1




W
t



β
t







(
1
)













where α


0


is a row vector representing an initial condition, β


T


is a column vector representing a terminal condition, and M


i


and W


i


are square matrices. For different applications, matrices M


i


can have different meanings.




Although not exemplified here, the matrices M


i


and W


i


could be of a dimension other than square as long as the dimensions of the row and column vector correspond appropriately to permit for proper matrix multiplication.




The evaluation of the parameter p


t


according to Equation (1) above is conventionally done by the forward-backward algorithm (FBA). The FBA requires that the decoding unit must receive all symbols in an input sequence, compute and store the forward vectors











α
t

=



α
0






i
=
1

t




M
i






for





all





t



=
1


,
2
,





,
T




(
2
)













then compute the backward vectors










β
t

=




i
=

t
+
1


T




M
i



β
T







(
3
)













and compute p


t





t−1


W


t


β


t


for all t=T−1,T−2, . . . , 1. T represents some total time period which is usually equal to the number of observed output symbols.




This calculation places large demands on memory and processing resources. The present invention avoids the necessity of storing the complete symbol sequence and reduces processing time compared to conventional technology. The invention does so in part by observing that a sufficient estimate of p


t


may be made, if the application exhibits a fading or finite memory so that some tail portion of the product







β
t

=




i
=

t
+
1


T




M
i



β
T













shown in Equation 1 may be ignored with little penalty in accuracy.





FIG. 1

shows an exemplary communications system


10


as a typical application of the estimate process according to the invention. In

FIG. 1

, an information source


100


outputs information signals to an encoder/transmitter


110


, such as a base station in a wireless cellular communications system. Encoder/transmitter


110


transmits an encoded signal from antenna


120


over a communication channel


130


, which may, for instance, be the radio frequency channels according to Personal Communications Service (PCS) or other forms of communication channels. The transmitted symbols


140


are received at a receiving unit


150


, which may be a mobile cellular telephone, over an antenna


180


. The receiving unit


150


receives the transmitted symbols


140


and processes them in a decoder


160


to provide decoded output symbols to an input/output unit


170


. The input/output unit


170


may, for instance, output voice sounds in a cellular telephone.




Real communication channels are characterized by the bursty nature of errors that can be modeled quite accurately by HMMs as known in the art. Therefore, communications system


10


may be modeled by an HMM, and the transmitted symbols


140


may be decoded by known methods such as maximum a posteriori (MAP) symbol estimation as briefly discussed herein.




In many applications, it is necessary to find a symbol X


t


maximum a posteriori estimate by maximizing its a posteriori probability density function (APPDF) as follows:










p


(


X
t

|

Y
1
T


)


=



p


(


X
t

,

Y
1
T


)



p


(

Y
1
T

)



.





(
a
)













Since the received sequence Y


1




T


is fixed, it is sufficient to maximize the unnormalized APPDF p(X


t


,Y


1




T


) as follows:












X
^

t

=




arg





max


X
t








p


(


X
t

,

Y
1
T


)



=



arg





max


X
t








p


(


X
t

|

Y
1
T


)










where




(
b
)







p


(


X
t

,

Y
1
T


)


=

π





i
=
1


t
-
1





P


(

Y
i

)




P


(


X
t

,

Y
t


)







i
=

t
+
1


T




P


(

Y
1

)



1.









(
c
)













This equation can be evaluated by the forward-backward algorithm.




Forward part: Compute and save






α(


Y




1




0


)=π, α(


Y




1




t


)=α(


Y




1




t−1


)


P


(


Y




t


),


t


=1,2


. . . , T


−1.  (d)






Backward part: For t=T, T−1, . . . , 2 compute








p


(


X




t




,Y




1




T


)=α(


Y




1




t−1


)


P


(


X




t




,Y




t


)β(


Y




t+1




T


), where  (e)








β(


Y




T+1




T


)=1, β(


Y




t




T


)=


P


(


Y




t


)β(


Y




t+1




T


).  (f)






If we need to calculate only one or two of the products in Equation (c), we can apply a forward algorithm, but if we need to calculate p(X


t


,Y


1




T


) for many values of t, we use the forward-backward algorithm.




Since all products of probabilities tend to zero, to increase the calculation accuracy and avoid underflow, it is necessary to scale the equations if T is not small. The scaled vectors are denoted as follows:






{overscore (α)}(


Y




1




t


)=


c




t


α(


Y




1




t


).  (g)






After the variable substitution Equation (d) takes the form






{overscore (α)}(


Y




1




t+1


)=λ


t+1


{overscore (α)}(


Y




1




t


)


P


(


Y




t


),  (h)






where λ


t+1


=c


t+1


/c


t


.




Let d


t


be the scaling factor for β(Y


t




T


):






{overscore (β)}(


Y




t




T


)=


d




t


β(


Y




t




T


).  (i)






If we use {overscore (α)}(Y


1




t−1


) instead of α(Y


1




t−1


) and {overscore (β)}(Y


t+1




T


) instead of β(Y


t+1




T


) in Equation (e), we obtain:




{overscore (p)}(X


t


,Y


1




T


)=p(X


t


Y


1




T





t


where μ


t


=c


1


c


2


. . . c


t−1


d


t+1


. . . d


T


. If the scaling factors do not depend on X


t


, then μ


t


does not depend on X


t


, and the solution of Equation (b) does not change if we replace P(X


t


,Y


1




T


) with {overscore (p)}(X


t


,Y


1




T


).




In principle, c


i


and d


i


can be any numbers. However, it is convenient to choose








c




t


=1/α(


Y




1




t


)1.  (j)






so that the normalized vector {overscore (α)}(Y


1




T


)1=1




The normalized vectors can be obtained recursively using Equation (d) and normalizing the result after each recursive step:






{circumflex over (α)}(


Y




1




t+1


)={overscore (α)}(


Y




1




t


)


P


(


Y




t


), {overscore (α)}(Y


1




t+1


)=λ


t+1


{circumflex over (α)}(


Y




1




t+1


)  (k)






where






λ


t+1


=1/{circumflex over (α)}(


Y




1




t+1


)1


=c




t+1




/c




t


.






The normalization factors c


t


can be recovered from the normalization factors λ


t


of the scaled forward algorithm (k):







c
t

=




i
=
1

t








λ
i

.












We can select the normalizing factors for β(Y


t




T


) similarly. However, if we use







d
t

=




i
=
1

T







λ
i












we will have c


t


d


t


=1/p(Y


1




T


), ∀t and we can write the APPDF as








p


(


X




t




|Y




1




T


)={overscore (α)}(


Y




1




t−1


)


P


(


X




t




,Y




t


){overscore (β)}(


Y




t+1




T


)/λ


t


.






If T is large and the maximum density functions do not have special structures simplifying their multiplication, the forward-backward algorithm uses a lot of computer resources. Therefore, it is beneficial to find approximate algorithms that have a satisfactory accuracy.




One of the approaches is based on the fact that many processes have a “fading” memory: the process samples dependency is a decreasing function of the sample time separation. In this case








p


(


X




t




Y




1




t


)≈


p


(


X




t




Y




1




t+T


)






and we can use the fixed-lag algorithm.




With reference back to the modeling, a FBA process may be applied that evaluates a probability at time t, P(X


t


|Y


1




T


), for the transmitted symbol X


t


and for the actually received symbols Y


1




T


=Y


1


,Y


2


, . . . Y


T


. P(X


t


|Y


t




T


) is proportional to








P


(


X




t




,Y




1




T


)=α


t−1




P


(


X




t




,Y




t





t








where α


0


is the row vector of the Markov state initial probabilities, α


t


, and β


t


are computed according to Equations (2) and (3) in which M


i


=P(Y


i


) representing the matrix probabilities of receiving symbols Y


i


. However, channel distortions affecting the transmitted information symbols


140


only persist for a finite period of time, for instance as a result of multipath fading. Thus, it is only necessary to look forward by a fixed period of time or time lag τ through the received sequence to decode the transmitted symbols.




If the memory in the communication channel is of length τ, then probability P(X


t


|Y


1




T


) at time t of a transmitted symbol X


t


, given the received sequence may be estimated by the expression:











p
t




α
0






i
=
1


t
-
1





M
i



W
t






i
=

t
+
1



t
+
τ





M
i



β








=


a

t
-
1




W
t



β

t
,
τ







(
3.1
)













where W


t


=P(X


t


,Y


t


) is the matrix probability of transmitting X


t


and receiving Y


t


. When compared with the conventional FBA, at a given time t, only the terms extending from 1 to t+τ rare computed instead of 1 to T, where T is the total time period of the complete received symbols. Thus, the terms extending from t+τ to T are eliminated when computing the estimate. The invention presents the algorithm for computing vectors










β

t
,
τ


=





i
=

t
+
1



t
+
τ





M
i



β




=


M

t
+
1


t
+
τ




β








(
4
)













recursively, thus saving both the memory space and processing time required to support computation of p


t


.




The invention makes use of the fact that the matrices







M

t
+
1


t
+
τ


=




i
=

t
+
1



t
+
τ




M
i












can be computed recursively by the following equation








M




t+k+1




t+τ+1




=M




t+k+1




t+τ




M




t+τ+1




, k


=1,2, . . . , τ  (5)






and then compute β


t+1


=M


t+2




t+τ+1


β





. The vector β





=1 in most applications. With β





equal to a unity column vector, the mathematical computation is the summing of elements (by rows) in the matrix M


t+2




t+τ+1


being multiplied by the unity vector.





FIG. 2

shows a flow diagram of a general process for generating the estimate p


t


. In this figure, letter “R” on signal lines indicates that the corresponding matrix multiplies the matrix on the other line from the right. It is important to show, because matrix products are not commutative. As illustrated in

FIG. 2

, M


t+τ+1


is input on signal line


202


, and then multiplied by a series of matrices: M


t+τ


stored in storage element


204


, M


t+τ+1


stored in storage element


206


, . . . , M


t+1


stored in storage element


208


, and M


t


stored in storage element


210


. α


t−1


stored in storage element


226


is then right-multiplied by multiplier


210


and the result is output over signal line


236


to update α


t−1


to α


t


. α


t


is output over signal line


240


for right multiplication by W


t


by multiplier


214


. The result of the multiplier


214


is output over signal line


242


to multiplier


216


as a forward portion of the estimate p


t


. The storage elements


204


,


206


, . . . ,


208


, and


210


serve to delay the matrices M


t


→M


t+τ


to synchronize the generation of the forward pattern with the generation of a backward portion as described below. The partial matrix product M


t+1




t+τ


stored in the storage element


235


is then right multiplied by the vector β





stored in the storage element


228


and the result is multiplied from the left by the forward portion obtained on line


242


thus producing the desired estimate p


t


. The partial matrix products stored in the storage elements


230


,


232


, . . . ,


235


may be generated in a progressive manner according to equation (5) by storing a sequence of τ−1 matrix products where each member of the sequence is generated by matrix multiplying a prior member of the sequence by M


t+τ+1


from the right and storing the result in a storage element of the next sequence member.




As shown in

FIG. 2

, storage elements


230


,


232


, . . . ,


234


and


235


store the sequence of matrix products. When M


t+τ+1


is generated, 1) the content of the storage element


235


is matrix multiplied with β





by multiplier


225


to generate the next backward portion, 2) the storage element


235


is then used to store the result of the matrix product between the content of the storage element


234


and M


t+τ+1


generated by multiplier


224


, 3) the storage element


234


is then used to store the matrix product between the content of the next storage element earlier in the sequence and M


t+τ+1


generated by the multiplier


222


and so on. After the content of the storage element


232


is used to generate the matrix products for the following storage element in the sequence, it is used to store the output of multiplier


221


. Finally, the storage element


230


stores the product M


t+τ


M


t+τ+1


. Thus, the storage elements


230


,


232


,


234


and


235


stores τ−1 sequence of matrix products for generating the backward portion of the p


t


. The backward portion is multiplied by multiplier


216


with the forward portion to generate p


t


as the probability at time t.




In the alternative implementation of the algorithm, we assume that it is possible to calculate the inverse matrices M


t




−1


. In this case, the partial matrix products can be evaluated according to the following equation








M




t+2




t+τ+1




=M




t+1




−1




M




t+1




t+τ




M




t+τ+1


  (6)






Therefore, the whole sequence of storage elements and multipliers


230


through


235


in

FIG. 2

may be replaced with a single storage device, two multipliers and the matrix inversion unit. The latter may be replaced with storage units if the inverse matrices are pre-computed and saved. This embodiment is described below more particularly with respect to FIG.


7


.




The generation of p


t


according to

FIG. 2

can be implemented by an exemplary fixed-lag apparatus


250


shown in FIG.


3


. The fixed-lag apparatus may include a controller


252


, a memory


254


, a matrix multiplier


256


, a matrix inverter


258


and an input/output device


260


. The above components are coupled together via signal bus


262


.




While the fixed-lag apparatus


250


is shown with a common bus architecture, other structures are well known to one of ordinary skill in the art. In addition, the functions performed by each of the devices could be performed by a general purpose computer, digital signal processors, application specific integrated circuits, DGA's, DLA, etc. which are well known in the art.




When generating p


t


, the controller


252


reads values of the matrices M


i


out of memory


254


for multiplication by matrix multiplier


256


or inversion by matrix inverter


258


. The individual matrices M


t


−M


t+τ


are stored in memory


254


, which may be electronic random access memory or other forms of electronic or other storage appreciated by persons skilled in the art. Memory


254


likewise contains the matrix products of storage elements


234


-


235


which are M


t+τ−1


M


t+τ


, M


t+τ−1


M


t+τ−2


M


t+τ−3


, . . . , M


t+1


M


t+2


. . . M


t+τ


.




At each time t, the controller


252


generates the matrix M


t+τ+1


. This matrix may be generated based on the HMM of the underlying process and received sequence of symbols for the period T (e.g., received encoded data over a communication channel,or a handwriting analysis process). Once generated, M


t+τ+1


is stored in the memory


254


and used for the fixed-lag operation as described below.




The controller


252


directs matrix multiplier


256


to generate α


t


by multiplying α


t−1


stored in storage element


226


by M


t


, further directing the matrix multiplier


256


to multiply α


t


, by W


t


to generate the forward portion. The controller


252


generates the backward portion by directing the matrix multiplier


256


to multiply β





stored in the storage element


228


with M


t+1




t+τ


stored in storage element


235


. The controller


252


then generates p


τ


by directing the matrix multiplier


256


to multiply the forward portion with the backward portion and outputs p


t


to further downstream processes.




After generating the backward portion, the controller


252


proceeds to generate each of the matrix products to be stored in the storage element


230


,


232


,


234


and


235


by directing the matrix multiplier


256


to multiply M


t+τ+1


with the contents of each respective storage element and storing the result in the next following storage element in the sequence. In this way, all the contents of the storage elements


230


,


232


,


234


and


235


are prepared for the generation of p


t+1


.





FIG. 4

shows a FIFO


270


as an exemplary device for the storage elements


204


,


206


,


208


and


210


. The FIFO


270


has τ+1 locations


272


,


274


,


276


and


278


that correspond to the storage elements


204


,


206


,


208


and


210


, respectively.




For each t, M


t


is read from the FIFO


270


and a M


t+τ+1


is generated and “pushed” into the FIFO


270


. For example, at time t=1, the FIFO


270


contains M


t+τ


in location


278


, M


τ


in location


274


, M


2


in location


276


and M


1


in location


278


. At t=2, the FIFO


270


contains M


2+τ


in location


278


, M


τ+1


in location


274


, M


3


in location


276


and M


2


in location


278


. M


1


is consumed by vector matrix multiplication with α


0


to for α


1


now stored in storage element


226


.





FIG. 5

shows an exemplary memory management scheme of a memory space


280


for storage elements


230


,


232


,


234


and


235


. A block of locations


284


,


286


,


288


and


290


in the memory


254


may be set aside corresponding to the storage elements


230


,


232


,


234


and


235


. Thus, at t=1, location


284


contains M


τ


M


1+τ


, location


286


contains M


τ−1


M


τ


M


1+τ


location


288


contains M


3


M


4


. . . M


1+τ


, and location


290


contains M


2


M


3


. . . M


1+τ


. The pointer


282


is pointing at location


290


in preparation for generating the backward portion of p


1


. At t=2 the controller


252


reads the contents of the location pointed to by the pointer


282


and obtains M


2


M


3


. . . M


1+τ


and sends this matrix product to the matrix multiplier


256


to generate the first backward portion M


2




1+τ


β





. Then the controller


252


directs the matrix multiplier


256


to multiply M


1+τ


with M


2+τ


and stores the product in the location pointed to by the pointer


256


which is location


290


thus overwriting M


2


M


3


. . . M


1+τ


. The controller


252


then updates the pointer


256


to point to location


288


by decrementing the pointer


256


by M, for example, where M is the number of elements in each of the matrix product. In this regard, each of the locations


284


,


286


,


288


and


290


actually is a block of memory space sufficient to store one of the matrix products.




Then, the controller


252


directs the matrix multiplier


256


to matrix multiply the contents of each of the remaining locations


284


,


286


and


288


with M


2+τ


. At this point, the memory space


280


is ready for the next cycle to generate the backward portion for p


t+1


.




After τ−2 cycles, the pointer


282


would be pointing to location


284


. During the τ−1 cycle the pointer


256


would be incremented by τ−2 to again point to location


290


which essentially permits the memory space


280


to be a circular buffer of τ−1 locations


284


,


286


,


288


and


290


.





FIG. 6

shows a specific example of decoding according to the invention where τ is set equal to 3 and T=256. As illustrated in

FIG. 6

, the calculations are initialized using α


t−


and M


t+1




t+3


to generate p


t


. Matrix M


t+4


is then input over signal line


302


to a sequence of matrices M


t+3


. M


t+2


, M


t+1


, and M


t


stored in storage elements


304


,


306


,


308


and


310


, respectively, right-multiply the M


t


in storage element


302


by multiplier


312


with α


t−1


(of storage element


326


) thus generating α


t


. The forward portion is generated by α


t


is output over signal line


336


to store α


t


into storage element


326


, thus updating α


t−1


to α


t


. Simultaneously, α


t−1


is output over signal line


340


to right-multiplier


314


for right-multiplication by W


t


, that product in turn being output to multiplier


316


. Multiplier


320


receives M


t+1




t+3


stored in storage


332


and right-multiplies it by β





stored in storage


328


and then output to multiplier


316


which multiplies it from the left by the quantity α


t−1


W


t


and outputs over signal line


338


the desired result p


t





t−


W


t


M


t+1




t+3


β





. In the mean time, the contents of the storage elements


330


and


332


are replaced by M


t+3




t+4


=M


t+




3


M


t+4


and M


t+2




t+4


=M


t+2


M


t+3


M


t+4


, respectively. The storage elements


304


,


306


,


308


and


310


also updated by shifting their contents thus preparing for the next cycle.




In decoder


160


, the received value p


t


which is used to decode the current transmitted symbol. The following illustrates the calculation of several initial values of p


t


.








p




1


α


0




W




1




M




2




M




3




M




4


β





, α


1





0




M




1




, M




4




5




=M




4




M




5




, M




3




5




=M




3




M




4




M




5












p




2





1




W




2




M




3




5


β





, α


2





1




M




2




, M




5




6




=M




5




M




6




, M




4




6




=M




4




M




5




M




6


, and so on.






As can be seen from FIG.


2


and from










p
t




α
0






i
=
1


t
-
l









M
i



W
l






i
=

t
+
1



t
+
τ









M
i



β











(
7
)













in the invention, the conventional products of Markov matrices are truncated according to the persistence of memory in communications channel


130


, reducing storage and computation significantly.




The effects of memory on communications channel


130


are accounted for by the product of matrices M


t


−M


t+3


. Therefore, decoder


160


as illustrated in

FIG. 2

outputs to input/output unit


170


a probability value p


t


that a symbol X


t


was transmitted at time t. In the illustrative embodiment, the encoder/transmitter


110


may be transmitting wireless voice or data signals over communications channel


130


, and input/output unit


170


may output a voice output over receiving unit


150


, such as a voice sound.




The general form of the equation for calculating the partial matrix products according to the invention is shown in Equation 7 above for arbitrary τ. As can be seen from that expression, in the invention it is only necessary to compute matrix products of matrices modeling the communication channel, whether wireless, radio frequency, optical or otherwise, over the period of time τ representing channel memory.




The transmitted information symbols


140


are illustrated in

FIG. 1

as being cellular wireless voice or data symbols, however, it will be understood that the invention can be applied to any information signals that can be modeled by an HMM. Such information signals could also be, for instance, voice recognition information, handwriting information, bioelectrical signals such as electrocardiographs, seismic signals, and others. In a handwriting implementation, for instance, each letter would represent an information symbol which is modeled by an HMM, whose states are composed of preceding and succeeding letters and some hidden states representing a particular style of writing, for example, which would be reflected in matrices drawn to that model.




The system and method of the invention according to the foregoing description achieves information decoding in a streamlined manner. Using the invention, it is possible among other things to avoid having to store all forward (as well as backward) vectors in an HMM, and moreover to look forward through the chain by only a fixed lag, rather than through the entire sequence. This reflects the realization that time delays or fades which create a memory effect and distort a channel are of finite duration. Those distortions could only influence the present information signal as long as those time delays, fades or other distortions are still propagated. The invention capitalizes on these and other characteristics of non-Gaussian channels to achieve improved processing efficiency, while placing much reduced demands on processor bandwidth and storage capacity. Further efficiencies are gained when coefficients are recovered using an inverse matrix as described above.




An embodiment of the invention is illustrated in

FIG. 7

, in which advantage is taken of the property of matrix inversion to realize storage gains in the backward portion of the algorithm. Specifically, when dealing with products of matrices necessary to compute backward portion, it is possible to avoid the chain multiplication over the complete time period t to t+τ, when the intermediate matrix can be inverted. In this embodiment, the matrices for the forward portion of the algorithm are stored similarly to the apparatus of

FIG. 2

, with M


t


being stored in storage element


708


, M


t+1


being stored in storage element


706


, and so forth with the last M


t+τ


being stored in storage element


700


. M


t


is multiplied by α


t−1


stored in storage element


710


by multiplier


712


and the result is stored in storage element


710


thus generating the forward portion α


t


. Simultaneously, α


t−1


is sent over signal line


720


for multiplication by W


t


and that result is then multiplied by multiplier


716


by the product of M


t+1




t+τ


stored in storage element


726


and β





stored in storage element


724


to crate p


t


, generally as in the other described embodiment.




However, according to equation (6), to update the value of β


t


at time t+1, in the case of invertible matrices, storing the entire backward potion is not necessary. M


t+2




t+τ+1


can be generated by inverting M


t+1


in the matrix inverter


258


, and multiplying M


t+2




t+τ+1


or by that inverted matrix in multiplier


730


to generate M


t+2




t+τ


and then multiplying M


t+2




t+τ


by M


t+τ+1


in multiplier


728


to generate M


t+2




t+τ+1


. This has the effect of removing the earliest term from the matrix product, while adding the next multiplicative term at time t+τ+1. Because of all the new matrix products, except for the last term, are dropped and the new value replaces the old one in storage element


726


, no more of the backward sequence need to be saved in order to update β


t


.




The decoding operation is illustrated in another aspect in the flowchart of FIG.


8


. It will be understood that the following processing steps are illustrated as executed by controller


252


in coordination with memory


254


, matrix multiplier


256


and related elements. Processing begins in step


610


, followed by initialization in step


615


of the matrices and parameters as described herein. In step


620


, the current matrix is read from the FIFO, and in


625


that quantity is used to generate the current forward portion, α


t−1


. In step


626


α


t−1


W


t


is generated. In step


630


, α


t


is stored in storage location


226


. In step


635


, β


t


is generated. In step


640


p


t


representing the a posteriori probability of the input symbol is generated by multiplying α


t−1


W


t


and β


t


. In step


645


, the controller


252


directs the generation of the next matrix model for the following time period. In step


650


, the next matrix model is written into the FIFO. In step


655


, the next matrix model is multiplied by the contents of each of the storage locations


230


,


232


, . . . ,


234


. In step


660


, the results of those multiplications are stored in locations


232


, . . . ,


235


. The next matrix model is then overwritten in storage location


204


in step


665


, and in step


675


the matrix values for succeeding storage elements


206


,


208


, . . . ,


210


are replaced with the matrix contents for the next time. In step


680


, the processing tests whether time has reached the end of the time period T. If not, processing repeats for t+1, otherwise it ends in step


685


.




In an alternate embodiment, the fixed-lag algorithm can be implemented in the vector form thus reducing the computation and storage requirements. Consider the following probability vectors:










s


(


X
t

,

Y
1

t
+
τ



)


=



α
0






i
=
1


t
-
l









M
i



W
t






i
=

t
+
1



t
+
τ








M
i





=


α

t
-
1




W
t



M

t
+
1


t
+
τ








(
I
)













We can see that s(X


t


,Y


1




t


) can be computed recursively as








s


(


X




t




,Y




1




t


)=α


t−1




W




t


  (II.A)










s


(


X




t




,Y




1




u


)=


s


(


X




t




,Y




1




u−1


)


M




u


, (


u=t


+1


, . . . , T


)  (II.B)






Using these vectors, we can rewrite Equation (1) as








p




t




=s


(


X




t




,Y




1




T








  (III)






A list structure can be used for evaluating the a posteriori probabilities in the following way. Suppose that, for all X


t


where t<u, α


u−1


, s(X


t


,Y


1




u−1


) represents a list at the moment u. We may then replace α


u−1


with α


u


and s(X


t


,Y


1




u−1


) with s(X


t


,Y


t




u


) using Equation (II.B) and the equation




 α


u





u−1




M




u


  (IV)




and add to the list s(X


u


,Y


1




u


). At the end, we obtain p


t


from equation (III).




In contrast with the forward-backward algorithm, this algorithm does not have a backward portion. Thus, computing probabilities with this algorithm requires less memory than required by the forward-backward algorithm. In addition, a fixed-lag algorithm using vectors requires less storage and computation than the matrix fixed-lag algorithm presented above. In this case we do not need to keep in memory s(X


t


,Y


1




t+τ


) for u≦t. Therefore, the list of the forward-only algorithm increases only at the beginning while t<τ.




This vector fixed-lag algorithm is illustrated in FIG.


9


.

FIG. 9

shows a flow diagram of a process for generating the estimate p


t


using vectors in an alternate embodiment. Matrix M


t+1


is input along signal line


902


. α


t


is initially stored in storage element


904


. Recall that α


t


is a row vector. In this embodiment, α


t


is right-hand multiplied by M


t+1


at multiplier


906


and right hand multiplied by matrix W


t+1


at multiplier


910


. The result of the first multiplication is then stored in storage element


904


. For exemplary purposes, if a row vector and a square matrix are used, the multiplication yields a row vector being stored in storage element


904


. The result of the second multiplication is stored in storage element


912


as shown by arrow


914


.




The storage elements


912


,


914


, and


918


at time t contain the probability vectors s


t+1


=s(X


t


,Y


1




t


), s


t+2


=s(X


t−1


,Y


1




t


), . . . , s


t+τ+1


=s (X


t−τ


,Y


1




t


), respectively. The content of storage element


912


and the content of storage element


914


are right-hand multiplied by matrix M


t+1


at multipliers


916


and


920


and shifted to the next storage element as indicated by arrows. Additional storage elements may be added with the same multiplication pattern as indicated by the dashed lines


926


. The product of the last multiplication is stored in storage element


918


. This product is right hand multiplied with β





. As discussed above, if β





is a unity column vector, the mathematical operation is summing the elements in the row vector s


t+τ+1


. The product is the probability p


t+τ−1


=p(X


t−τ−1


,Y


1




t−1


).




Given that row vector α


t


is right-hand multiplied by matrix M


t+1


yielding a row vector, at the beginning of the algorithm, the storage requirements of storage elements


904


,


912


,


914


,


918


are less than the storage requirements of the storage elements shown in

FIG. 2

(storing matrices). In addition, the total number of storage elements shown in

FIG. 9

is less than the total number of the storage elements shown in FIG.


2


. Thus, the algorithm shown in

FIG. 9

has a faster computation time than the algorithm shown in

FIG. 2

as well as a smaller memory requirement.





FIGS. 10 and 11

are used to exemplify the process described in FIG.


9


.

FIG. 10

illustrates a convolutional encoder


1000


having shift registers


1004


and


1006


and summers


1008


and


1010


. Input symbols I


j


are input into encoder


1000


along signal line


1002


. As shown in FIG.


10


,








x




j1




=I




j




+I




j−1




I




j−2








as shown by signal line


1002


, shift registers


1004


and


1006


and summer


1008


, and








x




j2




=I




j




+I




j−2








as shown by signal line


1002


, shift register


1006


and summer


1010


. The state of encoder


1000


is shown by the contents of shift registers


1004


and


1006


and is represented by the following expression, S


j


=[x


j−1


, x


j−2


]. Encoder


1000


output symbols X


j1


and X


j2


are mapped to a modulator, such as a quadrature phase shift keying (QPSK) modulator shown in FIG.


10


. The encoder is a rate one-half encoder, outputting two bits for each input bit. The modulated symbols are transmitted over a communications channel with memory that is modeled by an HMM.




Assume that the communications channel has bursts of errors as presented in the following parameters: a


0


=[0.91892 0.08108]







P


(
0
)


=



[



0.997


0.00252




0.034


0.81144



]







P


(
1
)



=

[



0.0


0.00048




0.0


0.15456



]












The α


0


row vector represents the initial conditions of the communications channel. The P(


0


) square matrix and the P(


1


) square matrix are the matrix probabilities of correct reception and erroneous reception, respectively. Assume further that the following bit sequence is received:




Y


1




T


=11 01 11 00 00 11 01 01 00 10 11 00, where T=12. (Given the rate one-half encoder, Y


1


=11; Y


2


=01, Y


3


=11 . . . Y


12


=00).





FIG. 11

illustrates the normalized a posteriori probabilities of the transmitted bits given the above received bits using the forward-backward algorithm (columns two and three); the vector fixed-lag algorithm with τ=1 (columns four and five); and the vector fixed-lag algorithm with τ=3 (columns six and seven). Column one represents time t and column eight represents the predicted input bit.




So, at time t=0, using the forward-backward algorithm, we can see that the probability that the input X


0


was a 0 is 0.00000 and the probability that X


0


is a 1 is 0.79311. Thus, it is more likely that the input bit X


0


was a 1. Using the vector fixed-lag algorithm with the lag, or memory τ=1, we can see that the probability that the input X


0


was a 0 is 0.00013 and the probability that X


0


is a 1 is 0.24542. Thus, under this algorithm with τ=1, it is still more likely that the input bit X


0


was a 1.




Finally, using the vector fixed-lag algorithm, with the lag, or memory τ=3, we can see that the probability that the input X


0


was a 0 is 0.00003 and the probability that X


0


is a 1 is 0.67481. Thus, under this algorithm with τ=3 it is also more likely that the input bit X


0


was a 1. Column eight shows that the input X


0


is 1. The remaining entries in the table show the probabilities of input symbols at times t=1−9.




As we can see, the lag τ=3 estimates (columns


6


and


7


) are closer to the complete a posteriori probability (columns


2


and


3


) than lag τ=1 estimates (columns


2


and


3


), but in both cases the vector fixed-lag algorithm decodes the same input sequence, even for these small lags, as the complete forward-backward algorithm.




The foregoing description of the system and method for processing information according to the invention is illustrative, and variations in configuration and implementation will occur to person skilled in the art.



Claims
  • 1. A fixed-lag method for determining the probability of a transmitted symbol at a time t, transmitted along a communications channel with bursts of errors, given a received symbol, the method comprising:obtaining initial state information vector about the channel; obtaining channel information matrices describing the probabilities that the transmitted symbol would be transmitted along a communications channel with and without error; generating τ intermediate probabilities, where τ equals a memory or lag value, each intermediate probability being the product of the initial state information vector, at a time previous to time t, and a channel information matrix; storing the intermediate probabilities in storage elements; and multiplying a last intermediate probability with a final state vector to yield the probability of the transmitted symbol.
  • 2. The fixed-lag method of claim 1, wherein the transmitted symbols are one of handwriting symbols in handwriting recognition, voice print features in voice recognition, and bioelectrical signals grouped into symbol units.
  • 3. The fixed-lag method of claim 2, wherein the channel information matrices model processes including communication over channels, handwriting recognition, voice recognition and bioelectrical signal recognition, the matrices being generated based on modeling techniques including Hidden Markov Models.
  • 4. A fixed-lag method for estimating an input symbol given an output symbol, the method comprising:multiplying an initial state vector, α0, stored in a first storage element and containing information about an initial state of a communications channel, with a first matrix, Mt+1, containing information about the communications channel, yielding a first vector product; multiplying the first vector product with a second matrix, Wt+1, containing information about the communications channel, yielding a second vector product, st+1; storing the second vector product in a second storage element; multiplying the second vector product with the first matrix, yielding a next vector product, st+2, and storing the next vector product in a next storage element; repeating the third multiplying step using the next vector product in the multiplication, for a total of τ times, until the last vector product, st+τ+1, is calculated; and multiplying the last vector product with a final state vector, β∞, to yield a probability, pt−τ−1=p(Xt−τ−1,Y1t−1), that a selected symbol was the input symbol.
  • 5. The fixed-lag method of claim 4, wherein the input symbol is one of handwriting symbols in handwriting recognition, voice print features in voice recognition, and bioelectrical signals grouped into symbol units.
  • 6. The fixed-lag method of claim 4, wherein the first and second matrices model processes including communication over channels, handwriting recognition, voice recognition and bioelectrical signal recognition, the matrices being generated based on modeling techniques including Hidden Markov Models.
  • 7. A fixed-lag processing device for determining the probability of a transmitted symbol, transmitted along a communications channel with bursts of errors, given a received symbol, the device comprising:a plurality of storage elements, for storing vectors; at least one matrix multiplier; and a controller coupled to the storage elements and the at least one matrix multiplier, the controller generating τ intermediate product vectors, where each intermediate product vector is yielded by multiplying a content of one of the storage elements with a matrix, wherein the matrix contains information about the communications channel, the controller generating a last product vector and multiplying the last product vector with a final state vector, and the controller outputting the probability that the transmitted symbol is a selected symbol.
  • 8. The fixed-lag device of claim 7, wherein the transmitted symbol is one of handwriting symbols in handwriting recognition, voice print features in voice recognition, and bioelectrical signals grouped into symbol units.
  • 9. The fixed-lag device of claim 7, wherein the matrix models processes including communication over channels, handwriting recognition, voice recognition and bioclectrical signal recognition, the matrix being generated based on modeling techniques including Hidden Markov Models.
CROSS-REFERENCES TO RELATED APPLICATIONS

This application is a continuation-in-part of 09/183,474 filed Oct. 30, 1998 of U.S. Pat. No. 6,226,613, issued May 1, 2001, entitled Fixed-Lag Decoding of Input Symbols to Input/Output Hidden Markov Models.

US Referenced Citations (2)
Number Name Date Kind
5963906 Turin Oct 1999 A
6226613 Turin May 2001 B1
Non-Patent Literature Citations (4)
Entry
William Turin, “MAP Decoding using the EM Algorithm,” Proc. IEEE 49th Vehicular Technology Conference, vol. 3, p. 1866-1870.*
William Turin and Michele Zorzi, “Performance Analysis of Delay-Constrained Communications over Diverse Burst-Error Channels,” Proc. IEEE 50th Vehicular Technology Conference, vol. 3, p. 1305-1309.*
William Turn, “MAP Decoding in Channels with Memory,” IEEE Trans. on Communications, vol. 48, No. 5, p. 757-763.*
William Turin, “The Forward-Backward Algorithm—Work Project No. 311614-2003”, Technical Memorandum, AT&T, Nov. 1997.
Continuation in Parts (1)
Number Date Country
Parent 09/183474 Oct 1998 US
Child 09/845134 US