Vertical-cavity surface emitting laser diode

Abstract

The present invention provides a VCSEL (vertical-cavity surface emitting laser) diode, in which a p-type cladding layer is formed on an active layer and surrounded with an insulation edge. An annular p-type electrode is formed on the ptype cladding layer close to the insulation edge and an upper DBR mirror is formed therewithin. According to the present invention, light beams emitting from the active layer will not be shielded by a central electrode and brightness of the laser diode is improved.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a laser diode, in particular, to a VCSEL (vertical-cavity surface emitting laser) diode comprising a DBR mirror within an annular p-type electrode.

2. Description of the Related Art

For conventional VCSEL diode, the cavities of distributed Bragg reflectors (DBR) can be formed by epitaxial growth. In general, reflectivity of the DBR higher than 99% is required. To obtain such reflectivity, appropriate pair numbers of DBRs with appropriate refractive index deviation (Δn) are provided. For VCSEL devices of wavelength at 1,310 or 1,550 nm, only the InGaAsP/InP Bragg mirror grown on an active layer of InP series is considered. However, heat dissipation of the InGaAsP/InP mirror is poor and Δn thereof is too small when compared with GaAs/AlAs or dielectric Bragg mirrors. Therefore, lots of Bragg reflector pairs are associated to achieve desired reflectivity. As a result, complicated epitaxial processes including thousands of MBE or MOCVD during at least 4-8 hours is necessary. In addition, to maintain growth deviation of production less than 1% is very hard for manufacturing.

The above problems may be solved by applying direct wafer-bonding technology once or twice during manufacturing. For example, a laser diode of wavelength at 1,310 nm can be obtained by bonding an epitaxial structure to a GaAs substrate on which another epitaxial AlGaAs/GaAs DBR structure is grown. Such processes need an epitaxial system complying requirement of lattice matching which is not necessary for VCSEL epitaxial system. However, direct wafer-bonding needs to be performed at high temperature and through lattice alignment, which significantly limit production yields and increase manufacturing cost.

Therefore, it's desirable to find a VCSEL diode to overcome the above disadvantages.

SUMMARY OF THE INVENTION

The object of the present invention is to provide a VCSEL (vertical-cavity surface emitting laser) diode, in which light beams can emit from a central area without shielding and exhibit superior brightness.

The VCSEL diode of the present invention comprises an n-type cladding layer with a top surface partially etched; an active layer with quantum well structure formed on the un-etched surface of said n-type cladding layer; a p-type cladding layer surrounded with an insulating edge and formed on said active layer; an n-type ohmic contact electrode deposited on said etched surface of said n-type cladding layer; an annular p-type ohmic contact electrode deposited on said p-type cladding layer close to said insulating edge; an upper DBR pair of dielectric material formed on said p-type cladding layer at least within said annular p-type ohmic contact electrode; a bottom DBR pair of dielectric material formed beneath said n-type cladding layer; a metal conductive layer formed beneath said bottom DBR pair; and a permanent substrate formed beneath said metal conductive layer.

The upper and/or bottom DBR pair can be a metal reflective layer or made from a composite material selected from the group consisting of ZnSe/MgF₂, SiO₂/Si, Si₃N₄/Si, TiO₂/Si, Ta₂O₅/Si, HfO₂/SiO₂, Ta₂O₅/SiO₂, ZrO₂/SiO₂, TiO₂/SiO₂.

The VCSEL diode can further comprises a transparent conductive film formed on said ptype ohmic contact electrode.

The VCSEL diode can also further comprises an insulating spacer between said n-type cladding layer and said bottom DBR pair, and said insulating spacer is formed beneath said n-type cladding layer but not overlaps main area of said active layer, and said metal conductive layer and said permanent substrate are formed beneath said bottom DBR pair only corresponding to said insulating spacer. Therefore, the emitted light beams will not shielded by the spacer and can be transmitted from the bottom DBR pair.

BRIEF DESCRIPTION OF THE DRAWINGS

FIGS. 1-7 illustrate cross sections of the first embodiment during manufacturing.

FIG. 8 illustrates the structure of the first embodiment with an additional transparent conductive film.

FIGS. 9-11 illustrate cross sections of the second embodiment different from the first embodiment during manufacturing.

FIG. 12 illustrates the second embodiment having a plated permanent substrate without overlapping scrub lines.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIGS. 1-7 illustrate cross sections of the first embodiment during manufacturing. In FIG. 1, an InP substrate 91 is provided for sequentially epitaxy an n-type cladding layer 11, an active layer with quantum well structure 12 and a p-type cladding layer 13 thereon. In this embodiment, both electrodes are formed at the top side. Therefore, according to size of each laser diode die, the p-type cladding layer 13, the active layer 12 and an upper portion of the n-type cladding layer 11 are partially etched. As a result, trenches deep to the n-type cladding layer 11 are formed as shown in FIG. 1.

In FIG. 2, lateral surface of the p-type cladding layer 13 and the active layer 12 along the trenches are oxidized by wet oxidation to form an surrounding insulating edge 14 for each laser diode die. For each laser diode die, an annular p-type ohmic contact electrode 31 is then disposed on the top edges of the p-type cladding layer 13 close to the insulating edge 14, and an n-type ohmic contact electrode 32 is disposed on the exposed n-type cladding layer 11, i.e., bottom of the trenches aforementioned. The electrodes 31, 32 can be formed on predetermined positions by a lift-off process, and then generate ohmic contact interfaces with the semiconductor layer by rapid thermal annealing above 350° C.

FIG. 3 illustrates an upper DBR pair 21 coated on the p-type cladding layer 14 and within the annular p-type ohmic contact electrode 31. Sputtering is preferably applied for completing the DBR pair due to suitable coating rate and adhesion effect. Particularly, the DBR pair is deposited after annealing, and therefore reflectivity thereof can be preserved without damage.

FIG. 4 shows that a glass substrate 92 coated with wax 93 is bonded to the top surface of the wafer, and associated with the upper DBR pair 21 and the ohmic contact electrodes 31, 32. By supporting the epitaxial structure with the glass substrate 92, the InP substrate 91 is no longer necessary and can be removed by chemical mechanical polishing or etching. The n-type cladding layer 11 is thus exposed.

FIG. 5 shows a bottom DBR pair 22 is coated beneath the n-type cladding layer 11 by sputtering. In the present invention, both the DBR pairs 21, 22 are made from dielectric material, for example, ZnSe/MgF₂, SiO₂/Si, Si₃N₄/Si, TiO₂/Si, Ta₂O₅/Si, HfO₂/SiO₂, Ta₂O₅/SiO₂, ZrO₂/SiO₂, TiO₂/SiO₂.

To enhance heat dissipation of the laser diode, a metal permanent substrate 42 is plated beneath a metal conductive layer 41 which is previously deposited beneath the DBR pair 22 as shown in FIG. 6. The plating process can be completed in an electrolyte containing Cu⁺², to obtain a stable copper substrate 42. The glass substrate 92 used for temporarily supporting the structure can be then removed by melting the wax 93 below 100° C. At last, a laser diode die as shown in FIG. 7 is obtained after dicing.

FIG. 8 shows that an additional transparent conductive film 33 of ITO material is deposited between the p-type cladding layer 13 and the p-type ohmic contact electrode 31 to enhance current spreading.

For the laser diode of FIGS. 7 and 8, light is emitted out through the upper DBR pair 21. The present invention also provides another embodiment in which light is emitted out through the bottom DBR pair 22. FIGS. 9-11 illustrate cross sections of such laser diode different from the first embodiment during manufacturing.

FIG. 9 shows a photoresist layer 60 and an insulating layer 50 are coated beneath the n-type cladding layer 11 after the InP substrate 91 is removed. The photoresist layer 60 is coated where mainly corresponding to the active layer 12. The insulating layer 50 is deposited on other bottom surface of the cladding layer 11, i.e., opposite bottom edges of the n-type cladding layer 11 as shown in FIG. 9.

The bottom DBR pair 22 is then deposited beneath the photoresist layer 60 and the insulating layer 50. After the photoresist layer 60 is removed, a spacer formed by the insulating layer 50 is obtained, as shown in FIG. 10. Next, the metal conductive layer 41 is deposited beneath the bottom DBR pair 22 corresponding to the insulating layer 50; and the copper substrate 42 is plated beneath the metal conductive layer 41. Accordingly, light passing through the bottom DBR pair 22 will not be shielded by the metal conductive layer 41 and the copper substrate 42.

In like manner, the wafer is diced after removing the glass substrate 92, and a laser diode as shown in FIG. 11 is obtained.

Furthermore, by applying a voltage to the substrate 42 and the electrode 32 of the second embodiment, wavelength of the laser diode can be modulated by an electrostatics means.

In the present invention, the substrate 42 is not necessarily plated through the bottom surface of the diode. Scrub lines 43 of the wafer can be optionally exposed as shown in FIG. 12, so that wafer dicing can be performed conveniently.

According to description of the preferred embodiments, advantages of the present invention can be roughly summarized as follows:

a) production cost is low and the laser diode retains good light-emitting efficiency;

b) processes are easily completed by providing the DBR pairs of dielectric material (or companied with metal mirrors); and

c) heat dissipation of the diode is promoted by plating the metal permanent substrate, which also facilitates preserving the DBRs without damage.

Claims

1. A VCSEL (vertical-cavity surface emitting laser) diode, comprising: an n-type cladding layer with a top surface partially etched; an active layer with quantum well structure formed on the un-etched surface of said n-type cladding layer; a p-type cladding layer surrounded with an insulating edge and formed on said active layer; an n-type ohmic contact electrode deposited on said etched surface of said n-type cladding layer; an annular ptype ohmic contact electrode deposited on said p-type cladding layer close to said insulating edge; an upper DBR pair of dielectric material formed on said p-type cladding layer at least within said annular p-type ohmic contact electrode; a bottom DBR pair of dielectric material formed beneath said n-type cladding layer; a metal conductive layer formed beneath said bottom DBR pair; and a permanent substrate formed beneath said metal conductive layer.

2. The VCSEL diode as claimed in claim 1, wherein said upper DBR pair is made from a composite material selected from the group consisting of ZnSe/MgF2, SiO2/Si, Si3N4/Si, TiO2/Si, Ta2O5/Si, HfO2/SiO2, Ta2O5/SiO2, ZrO2/SiO2, TiO2/SiO2.

3. The VCSEL diode as claimed in claim 1, wherein said upper DBR pair is a metal reflective layer.

4. The VCSEL diode as claimed in claim 1, wherein said bottom DBR pair is made from a composite material selected from the group consisting of ZnSe/MgF2, SiO2/Si, Si3N4/Si, TiO2/Si, Ta2O5/Si, HfO2/SiO2, Ta2O5/SiO2, ZrO2/SiO2, TiO2/SiO2.

5. The VCSEL diode as claimed in claim 1, wherein said bottom DBR pair is a metal reflective layer.

6. The VCSEL diode as claimed in claim 1 further comprising a transparent conductive film formed on said p-type ohmic contact electrode.

7. The VCSEL diode as claimed in claim 1 further comprising an insulating spacer between said n-type cladding layer and said bottom DBR pair, and said insulating spacer is formed beneath said n-type cladding layer but not overlaps main area of said active layer, and said metal conductive layer and said permanent substrate are formed beneath said bottom DBR pair only corresponding to said insulating spacer.