The present disclosure relates generally to a vertical cavity surface emitting laser (VCSEL) and to a VCSEL with an enhanced modulation bandwidth.
A vertical-emitting laser device, such as a VCSEL, is a laser in which a beam is emitted in a direction perpendicular to a surface of a substrate (e.g., vertically from a surface of a semiconductor wafer). Multiple vertical-emitting devices may be arranged in an array with a common substrate.
In some implementations, a VCSEL includes a substrate having a first side and a second side, a first mirror disposed to the first side of the substrate, a second mirror disposed to the first side of the substrate and defining a first optical cavity between the first mirror and the second mirror, an active region between the first mirror and the second mirror, and a third mirror defining a second optical cavity. The VCSEL may be configured to generate a primary optical mode and a secondary optical mode under direct modulation. The second optical cavity may be configured to resonate the secondary optical mode.
In some implementations, an emitter includes a first mirror, a second mirror defining a first optical cavity between the first mirror and the second mirror, and a third mirror defining a second optical cavity between the third mirror and the first mirror or the second mirror. The emitter may be configured to generate a primary optical mode and a secondary optical mode under direct modulation. The second optical cavity may be configured to resonate the secondary optical mode.
In some implementations, a VCSEL includes a substrate having a first side and a second side, a first mirror disposed to the first side of the substrate, a second mirror disposed to the first side of the substrate and defining a first optical cavity between the first mirror and the second mirror, an active region between the first mirror and the second mirror, and a third mirror defining a second optical cavity. The VCSEL may be configured to generate a primary optical mode and a secondary optical mode under direct modulation. The second optical cavity may be configured to cause at least one of a photon-photon resonance effect or a detuned-loading effect in an optical output of the VCSEL.
The following detailed description of example implementations refers to the accompanying drawings. The same reference numbers in different drawings may identify the same or similar elements.
Directly-modulated VCSELs are suitable for numerous applications, such as applications in data centers for data communications and in three-dimensional (3D) sensing for light detection and ranging (LIDAR). Generally, a large modulation bandwidth for directly-modulated VCSELs is desirable. However, current modulation bandwidths for directly modulated VCSELs may be less than 30 gigahertz (GHz).
Some implementations described herein provide a directly-modulated emitter device (e.g., a VCSEL) that utilizes a photon-photon resonance (PPR) effect and/or a detuned-loading effect (e.g., separately or at the same time) to improve a modulation bandwidth of the emitter device. In some implementations, the emitter device may include a substrate having a first side (e.g., a top surface) and a second side (e.g., a bottom surface). A first mirror and a second mirror of the emitter device, defining a first optical cavity of the emitter device, may be disposed to the first side of the substrate. A third mirror of the emitter device may define a second optical cavity with the first mirror or the second mirror. For example, the third mirror may be disposed to the second side of the substrate. However, other configurations may be employed without departing from the scope of the present disclosure.
Direct modulation of the emitter device may generate a primary optical mode and a secondary optical mode in a vicinity (i.e., in a frequency range) of the primary optical mode. In some implementations, the second optical cavity may provide feedback (e.g., passive feedback) and facilitate excitation of the secondary optical mode to cause a resonant enhancement of a modulation sideband near the primary optical mode using the PPR effect. In this way, the PPR effect may provide enhancement of the modulation bandwidth of the emitter device.
Furthermore, the second optical cavity may provide a reflection spectrum associated with different reflectivity when the emitter device is biased at different current settings (e.g., associated with an on state of the emitter device and an off state of the emitter device). For example, a wavelength of an optical output of the emitter device may shift (e.g., a wavelength chirp) as the emitter device is modulated from an on state to an off state. The shift may move the wavelength away from a peak reflectivity of the second optical cavity, thereby decreasing the feedback from the second optical cavity. Thus, due to the detuned loading effect, the optical output of the emitter device may decrease faster than the optical output would decrease by a change in drive current alone, thereby providing a modulation bandwidth enhancement for the emitter device. For example, the shift may effectively enhance differential gain, thereby improving the modulation speed of the emitter device. Moreover, a linewidth enhancement factor may also be reduced due to the detuned loading effect, thereby improving a relative intensity noise (RIN) performance of the emitter device.
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As further shown, emitter 100 includes an optical aperture 108 in a portion of emitter 100 within the inner radius of the partial ring-shape of ohmic metal layer 104. Emitter 100 emits a laser beam via optical aperture 108. As further shown, emitter 100 also includes a current confinement aperture 110 (e.g., an oxide aperture formed by an oxidation layer of emitter 100 (not shown)). Current confinement aperture 110 is formed below optical aperture 108.
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Notably, while the design of emitter 100 is described as including a VCSEL, other implementations are contemplated. For example, the design of emitter 100 may apply in the context of another type of optical device, such as a light emitting diode (LED), or another type of vertical emitting (e.g., top emitting or bottom emitting) optical device. Additionally, the design of emitter 100 may apply to emitters of any wavelength, power level, and/or emission profile. In other words, emitter 100 is not particular to an emitter with a given performance characteristic.
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Backside cathode layer 128 may include a layer that makes electrical contact with substrate layer 126. For example, backside cathode layer 128 may include an annealed metallization layer, such as an AuGeNi layer, a PdGeAu layer, or the like.
Substrate layer 126 may include a base substrate layer upon which epitaxial layers are grown. For example, substrate layer 126 may include a semiconductor layer, such as a GaAs layer, an InP layer, and/or another type of semiconductor layer.
Bottom mirror 124 may include a bottom reflector layer of emitter 100. For example, bottom mirror 124 may include a distributed Bragg reflector (DBR).
Active region 122 may include a layer that confines electrons and defines an emission wavelength of emitter 100. For example, active region 122 may be a quantum well.
Oxidation layer 120 may include an oxide layer that provides optical and electrical confinement of emitter 100. In some implementations, oxidation layer 120 may be formed as a result of wet oxidation of an epitaxial layer. For example, oxidation layer 120 may be an Al2O3 layer formed as a result of oxidation of an AlAs or AlGaAs layer. Trenches 112 may include openings that allow oxygen (e.g., dry oxygen, wet oxygen) to access the epitaxial layer from which oxidation layer 120 is formed.
Current confinement aperture 110 may include an optically active aperture defined by oxidation layer 120. A size of current confinement aperture 110 may range, for example, from approximately 4 μm to approximately 20 μm. In some implementations, a size of current confinement aperture 110 may depend on a distance between trenches 112 that surround emitter 100. For example, trenches 112 may be etched to expose the epitaxial layer from which oxidation layer 120 is formed. Here, before protective layer 114 is formed (e.g., deposited), oxidation of the epitaxial layer may occur for a particular distance (e.g., identified as do in
Top mirror 118 may include a top reflector layer of emitter 100. For example, top mirror 118 may include a DBR.
Implant isolation material 116 may include a material that provides electrical isolation. For example, implant isolation material 116 may include an ion implanted material, such as a hydrogen/proton implanted material or a similar implanted element to reduce conductivity. In some implementations, implant isolation material 116 may define implant protection layer 102.
Protective layer 114 may include a layer that acts as a protective passivation layer, and which may act as an additional DBR. For example, protective layer 114 may include one or more sub-layers (e.g., a dielectric passivation layer and/or a mirror layer, a SiO2 layer, a Si3N4 layer, an Al2O3 layer, or other layers) deposited (e.g., by chemical vapor deposition, atomic layer deposition, or other techniques) on one or more other layers of emitter 100.
As shown, protective layer 114 may include one or more vias 106 that provide electrical access to ohmic metal layer 104. For example, via 106 may be formed as an etched portion of protective layer 114 or a lifted-off section of protective layer 114. Optical aperture 108 may include a portion of protective layer 114 over current confinement aperture 110 through which light may be emitted.
Ohmic metal layer 104 may include a layer that makes electrical contact through which electrical current may flow. For example, ohmic metal layer 104 may include a Ti and Au layer, a Ti and Pt layer and/or an Au layer, or the like, through which electrical current may flow (e.g., through a bondpad (not shown) that contacts ohmic metal layer 104 through via 106). Ohmic metal layer 104 may be P-ohmic, N-ohmic, or other forms known in the art. Selection of a particular type of ohmic metal layer 104 may depend on the architecture of the emitters and is well within the knowledge of a person skilled in the art. Ohmic metal layer 104 may provide ohmic contact between a metal and a semiconductor, may provide a non-rectifying electrical junction, and/or may provide a low-resistance contact. In some implementations, emitter 100 may be manufactured using a series of steps. For example, bottom mirror 124, active region 122, oxidation layer 120, and top mirror 118 may be epitaxially grown on substrate layer 126, after which ohmic metal layer 104 may be deposited on top mirror 118. Next, trenches 112 may be etched to expose oxidation layer 120 for oxidation. Implant isolation material 116 may be created via ion implantation, after which protective layer 114 may be deposited. Via 106 may be etched in protective layer 114 (e.g., to expose ohmic metal layer 104 for contact). Plating, seeding, and etching may be performed, after which substrate layer 126 may be thinned and/or lapped to a target thickness. Finally, backside cathode layer 128 may be deposited on a bottom side of substrate layer 126.
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The emitter 200 may be configured for direct modulation. For example, an apparatus or a system that includes the emitter 200 may provide direct modulation of the emitter 200. The emitter 200 may be configured to generate a primary optical mode and a secondary optical mode under direct modulation.
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The emitter 200 may include a third mirror 214. In some implementations, the third mirror 214 may be disposed to the second side of the substrate 202 (e.g., disposed on the second side of the substrate 202), as shown. In some implementations, the third mirror 214 may be disposed to the first side of the substrate 202 (e.g., the third mirror 214 may be in the set of epitaxial layers 204) between the substrate 202 and the first mirror 206. Here, a semiconductor layer (not shown), similar to the substrate 202, may be disposed between the third mirror 214 and the first mirror 206. In some implementations, the third mirror 214 may be disposed to the first side of the substrate 202 (e.g., the third mirror 214 may be in the set of epitaxial layers 204) between the first mirror 206 and the second mirror 208. In some implementations, the third mirror 214 may be disposed to the first side of the substrate 202 (e.g., the third mirror 214 may be in the set of epitaxial layers 204), and the second mirror 208 may be between the first mirror 206 and the third mirror 214.
The third mirror may define a second optical cavity (e.g., an optical resonator) between the third mirror 214 and the first mirror 206 or the second mirror 208. For example, the second optical cavity may be between the third mirror 214 and the first mirror 206. As another example, the second optical cavity may be between the third mirror 214 and the second mirror 208. In some implementations (e.g., when the third mirror 214 is disposed to the second side of the substrate 202), the substrate 202 may be in the second optical cavity. The second optical cavity may be inactive (e.g., there may be no gain medium in the second optical cavity). In some implementations, the second optical cavity may be an optical cavity that is external to a main structure of the emitter 200, defined by the set of epitaxial layers 204, and that is integrated into the main structure.
In some implementations, the third mirror 214 may include a plurality of dielectric layers (e.g., dielectric films) having alternating refractive indexes. For example, the dielectric layers may include interleaved higher refractive index layers and lower refractive index layers (e.g., a difference between the higher refractive index and the lower refractive index may be from about 0.1 to about 2). In some implementations, the third mirror 214 may include a DBR, as described herein. In some implementations, the third mirror 214 may be configured to provide an optical power reflection of less than 10%, such as about 5% or less or about 3% or less. In this way, an output power of the emitter 200 may not be significantly diminished.
In some implementations, the second optical cavity may be configured to resonate the secondary optical mode that may be generated by the emitter 200 under direct modulation. For example, the second optical cavity may be tuned (e.g., the third mirror 214 may be tuned) to resonate at a frequency of the secondary optical mode. In some implementations, the emitter 200 may be configured for thermal tuning of the first optical cavity and/or the second optical cavity (e.g., for thermal tuning of the first mirror 206, the second mirror 208, and/or the third mirror 214). For example, the emitter 200 may include one or more heating elements for thermal tuning. In some implementations, the first optical cavity may be tuned to align the primary optical mode and the secondary optical mode (e.g., the primary optical mode may be biased at a longer-wavelength side of the first mirror 206 and/or the second mirror 208).
The second optical cavity may be configured to cause at least one of the PPR effect or the detuned-loading effect in an optical output of the emitter 200 (e.g., to cause both of the PPR effect and the detuned-loading effect in an optical output of the emitter 200), as described herein. For example, the second optical cavity may be configured to cause the PPR effect and/or the detuned-loading effect under direct modulation of the emitter 200. The second optical cavity, by resonating the secondary optical mode, may provide PPR, thereby improving a response time and a modulation bandwidth of the emitter 200. Moreover, modulation of the emitter 200 from an on state to an off state may cause a wavelength shift away from a peak reflectivity of the second optical cavity, thereby quickly diminishing feedback from the second optical cavity and improving a modulation bandwidth of the emitter 200.
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As shown, an optical element 316 may be integrated into the second side (e.g., the bottom surface) of the substrate 302. For example, the optical element 316 may be a lens. The emitter 300 may include a third mirror 314 disposed to the second side of the substrate 302 (i.e., disposed on the bottom surface of the substrate 302); however, other configurations of the third mirror 314 may be utilized, in a similar manner as described in connection with
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The emitters described herein (e.g., the emitter 200, 300, or 400) may include an oxide confined emitter device, an implant-only emitter device, a mesa type emitter device, a top-emitting emitter device, a bottom-emitting emitter device, a multi-junction emitter device (e.g., an emitter with multiple active regions 210 included within epitaxial layers 204), and/or another emitter device. The emitters may be configured to emit light associated with one or more wavelength ranges such as 800 nanometers (nm) to 1550 nm, and/or may utilize different material systems, such as those that include a GaAs substrate or an InP substrate. The emitters may include emitters of any number, any sizes, and/or arranged in any array shape, among other examples. The emitters may employ a circular shape oxidation aperture, or another shape oxidation aperture, such as oval, rectangular, or the like. As described herein, the emitters may be VCSELs.
Some implementations provide a method of fabricating the emitter 200, 300, or 400. In some implementations, the method may include forming a first mirror (e.g., first mirror 206, 306, or 406) on a first side of a substrate (e.g., substrate 202, 302, or 402). The method may include forming an active region (e.g., active region 210, 310, or 410) on the first mirror. The method may include forming a second mirror (e.g., second mirror 208, 308, or 408) on the active region. The method may include forming a third mirror (e.g., third mirror 214, 314, or 414) on a second side of the substrate or on the first side of the substrate, as described herein.
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The foregoing disclosure provides illustration and description, but is not intended to be exhaustive or to limit the implementations to the precise forms disclosed. Modifications and variations may be made in light of the above disclosure or may be acquired from practice of the implementations. Furthermore, any of the implementations described herein may be combined unless the foregoing disclosure expressly provides a reason that one or more implementations may not be combined.
Even though particular combinations of features are recited in the claims and/or disclosed in the specification, these combinations are not intended to limit the disclosure of various implementations. In fact, many of these features may be combined in ways not specifically recited in the claims and/or disclosed in the specification. Although each dependent claim listed below may directly depend on only one claim, the disclosure of various implementations includes each dependent claim in combination with every other claim in the claim set. As used herein, a phrase referring to “at least one of” a list of items refers to any combination of those items, including single members. As an example, “at least one of: a, b, or c” is intended to cover a, b, c, a-b, a-c, b-c, and a-b-c, as well as any combination with multiple of the same item.
No element, act, or instruction used herein should be construed as critical or essential unless explicitly described as such. Also, as used herein, the articles “a” and “an” are intended to include one or more items, and may be used interchangeably with “one or more.” Further, as used herein, the article “the” is intended to include one or more items referenced in connection with the article “the” and may be used interchangeably with “the one or more.” Furthermore, as used herein, the term “set” is intended to include one or more items (e.g., related items, unrelated items, or a combination of related and unrelated items), and may be used interchangeably with “one or more.” Where only one item is intended, the phrase “only one” or similar language is used. Also, as used herein, the terms “has,” “have,” “having,” or the like are intended to be open-ended terms. Further, the phrase “based on” is intended to mean “based, at least in part, on” unless explicitly stated otherwise. Also, as used herein, the term “or” is intended to be inclusive when used in a series and may be used interchangeably with “and/or,” unless explicitly stated otherwise (e.g., if used in combination with “either” or “only one of”). Further, spatially relative terms, such as “below,” “lower,” “above,” “upper,” “top,” “bottom,” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the apparatus, device, and/or element in use or operation in addition to the orientation depicted in the figures. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.
This patent application claims priority to U.S. Provisional Patent Application No. 63/380,148, filed on Oct. 19, 2022, and entitled “BANDWIDTH ENHANCED VERTICAL CAVITY SURFACE EMITTING LASER.” The disclosure of the prior application is considered part of and is incorporated by reference into this patent application.
Number | Date | Country | |
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63380148 | Oct 2022 | US |