Patent Application
20120032752
1. Field of the Invention
The present invention generally relates to electrical interconnects in high-speed circuits. In particular, some example embodiments relate to vertical via interconnects between coplanar waveguide (CPWG) transmission lines in high-speed transponders.
2. Related Technology
Due to process technology limits and other design challenges, cheap and efficient packaging of components in high-speed circuits, such as high-speed transponders, is difficult. Bulky, expensive, interconnections are instead frequently relied on. Such interconnections include coaxial cable and microwave/radio frequency (RF) connectors, such as GPPO or V-connectors. In addition to their high cost and space consumption, such cables and connectors introduce complexity in component packaging.
Coaxial cables and their associated connectors can be eliminated by using vertical high-speed interconnects, but not without introducing other design challenges. For example, typical vertical high-speed interconnects critically degrade performance by introducing transmission losses, reflection losses, electromagnetic interference, and reduced bandwidth, among other things. Relatively large pad pitches (e.g., 0.8 mm or more) is a typical design constraint for vertical high-speed interconnects in multi-layer surface-mounted packages, whereby correspondingly large losses in signal quality are introduced. Thus, no satisfactory technology exists for replacing coaxial cables and RF connectors with surface-mountable vertical interconnects in high-speed circuits.
The subject matter claimed herein is not limited to embodiments that solve any disadvantages or that operate only in environments such as those described above. Rather, this background is only provided to illustrate one exemplary technology area where some embodiments described herein may be practiced.
In general, example embodiments of the invention relate to vertical high-speed interconnects for conveying electrical signals between coplanar waveguide transmission lines. The coplanar waveguide transmission lines may transmit signals between, for example, integrated circuits (ICs) and/or optoelectric circuits (OCs) and packages that include ICs and/or OCs.
In one example embodiment, a coplanar waveguide signal transition element transitions high-speed signals between vertically stacked coplanar waveguide transmission lines. The signal transition element comprises one or more dielectric layers and a plurality of electrically conductive vias extending through at least a portion of the one or more dielectric layers. The vias include one or more signal vias and one or more ground vias that are configured to transition signals between the vertically stacked coplanar waveguide transmission lines. The signal transition element also comprises a ground plane disposed within the one or more dielectric layers and electrically coupled to the one or more ground vias. The ground plane has one or more openings through which the one or more signal vias respectively pass.
The signal transition element configured with a ground plane having one or more openings overcomes many of the shortcomings of prior art vertical interconnects by mimicking conventional grounded CPWG transmission lines. Conventional grounded CPWG transmission lines are suitable for routing signals only in a planar surface. However, the proposed signal transition element is suitable for vertical transitions among different layers of CPWG transmission lines. For example, the proposed signal transition element can be employed in connecting one set of planar CPWG transmission lines in one layer of a package to another set of planar CPWG transmission lines in a different layer of the same or a different package. The one or more openings in the ground plane through which the one or more signal vias respectively pass provide smooth electromagnetic mode transitions from a set of planar CPWG transmission lines to the vertical signal vias.
In another example embodiment, a circuit comprises a printed circuit board (PCB), a first set of coplanar waveguide transmission lines disposed on the PCB, a vertical transition component mounted on the PCB, a ground plane disposed within the vertical transition component, and an integrated circuit mounted on the vertical transition component so as to be in electrical contact with a second set of coplanar waveguide transmission lines. The vertical transition component has electrically conductive vias extending through at least a portion of the vertical transition component, the vias being configured to transition signals between the first set of coplanar waveguide transmission lines and the second set of coplanar waveguide transmission lines arranged in a plane separate from that of the first set of coplanar waveguide transmission lines. In addition, the ground plane is electrically coupled to a first set of one or more of the vias and has one or more openings through which a second set of one or more of the vias pass.
Additional features of the invention will be set forth in the description which follows, and in part will be obvious from the description, or may be learned by the practice of the invention. The features of the invention may be realized and obtained by means of the instruments and combinations particularly pointed out in the appended claims. These and other features of the present invention will become more fully apparent from the following description and appended claims, or may be learned by the practice of the invention as set forth hereinafter.
To further clarify the above and other features of the present invention, a more particular description of the invention will be rendered by reference to specific embodiments thereof which are illustrated in the appended drawings. It is appreciated that these drawings depict only typical embodiments of the invention and are therefore not to be considered limiting of its scope. The invention will be described and explained with additional specificity and detail through the use of the accompanying drawings in which:
Reference will now be made to the figures wherein like structures will be provided with like reference designations. It is understood that the figures are diagrammatic and schematic representations of presently preferred embodiments of the invention, and are not limiting of the present invention, nor are they necessarily drawn to scale.
Example embodiments of vertical interconnects disclosed herein are configured such that standard package configurations can be employed, obviating the need for specialized IC and OC packages commonly used in high-speed transponders, such as GPPO equipped packages. Additionally, example high-speed vertical interconnects disclosed herein are scalable such that high-speed data rates, such as 40 GHz, 100 GHz, or higher, can be accommodated. Thus, the example high-speed vertical interconnects disclosed herein can be employed to simplify the complexity of transponder design while enabling transfer of high-speed signals between the transponder's constituent packages. The example vertical interconnects disclosed herein are less expensive, and therefore have better market potential, than interconnects that employ relatively more expensive coaxial cable and GPPO or V-connectors. Some example vertical interconnects disclosed herein can also improve space efficiency within a high-speed transponder.
With reference to
IC package 104 transmits and/or receives high-speed electrical signals to and/or from RF traces 106 through vertical interconnects 114 and a surface mount interface 116. Surface mount interface 116 may be, for example, an array of solder joints such as a ball grid array (BGA), a pin grid array (PGA), a land grid array (LGA), or the like. IC package 104 may integrate various components such as a multiplexer/demultiplexer, a serializer/deserializer, and a clock and data recovery circuit, among other things. The vertical interconnects 114 can be implemented using aspects of quasi-CPWG transmission line technology, which mimics transmissions over horizontal CPWG transmission lines and is disclosed in more detail with reference to
With reference now to
With reference now to
The signal vias 204b, 206b, and side-ground vias 202b and 206b are substantially aligned in a first y-z plane, while back-ground vias 210b, 212b are arranged in a second y-z plane offset from but parallel to the first y-z plane. Moreover, back-ground vias 210b, 212b may be disposed in the second y-z plane such that a distance between the ground via 210b and signal via 204b is minimized and a distance between ground via 212b and signal via 206b is minimized. Because the second plane is parallel to the first plane, the distance from back-ground via 210b to signal via 204b is equal to the distance from back-ground via 212b to signal via 206b. In addition, these via to via distances may be equal to the distance between side-ground via 202b and signal via 204b and the distance between side-ground via 208b and signal via 206b. The distance between signal vias 204b and 206b and the distance between back-ground vias 210b and 212b may also be equal to the other neighboring via distances. Thus, the distance between any two neighboring vias may be equal and may be minimized, within pad pitch design constraints, to preserve signal energy.
Although the example embodiments shown in
The vertical via for single-ended signals mimics a partially grounded conventional planar CPWG transmission line for single-ended signals. The vertical vias for single-ended signals can be employed in a high-speed application as a vertical transition connecting a first set of singled-ended CPWG transmission lines to a second set of single-ended CPWG transmission lines. The first set and second set of single-ended CPWG transmission lines can be arranged, for example, on first and second layers of a multi-layer package.
With reference now to
Although ground openings 408, 410 are depicted as half-circles, the shape of one or both may vary. For example, the shape of ground openings 408, 410 may be ovoid or polygonal (e.g., having multiple sides corresponding to half of a regular polygon, such as a rectangle, hexagon, octagon, etc., or corresponding to irregular polygonal shapes having, e.g., jagged sides of equal or unequal lengths). The shape and dimensions of ground openings 408, 410 may be selected so as to optimize smoothness of mode transition from horizontal planar transmission to vertical transmission using, e.g., standard optimization techniques.
The dielectric material in CPWG signal transition component 400 may be a substantially monolithic dielectric element or, as in one example embodiment, may comprise one or more high temperature co-fired ceramic (HTCC) layers. For example, a first HTCC layer may be disposed between intermediate ground plane 406 and CPWG transmission lines 402 and 404. One or more additional HTCC layers may be disposed below intermediate ground plane 406. The HTCC layers may incorporate other vertical vias (not shown), as well as horizontally disposed signal traces (not shown) to provide interconnections with other components and terminals in integrated circuit package 104.
The present invention may be embodied in other specific forms without departing from its spirit or essential characteristics. The described embodiments are to be considered in all respects only as illustrative and not restrictive. The scope of the invention is, therefore, indicated by the appended claims rather than by the foregoing description. All changes which come within the meaning and range of equivalency of the claims are to be embraced within their scope.
