VERY HIGH EFFICIENCY UNINTERRUPTIBLE POWER SUPPLY

Abstract

The invention is an electrical power conversion topology. The preferred embodiment is as a three-phase, on-line Uninterruptible Power Supply (UPS). The desired AC output voltage waveform is formed on each output line or phase of the UPS, using pulse modulation techniques and a smoothing output filter inductor. A semiconductor switching matrix is used to switch the power converter side of each output filter inductor between three voltage potentials, a positive battery potential, a negative battery potential and a third intermediate and varying AC potential synchronized with the desired output voltage. The invention potentially provides the same performance as that of a multi-level inverter topology approaching an infinite number of DC levels.

Description

BACKGROUND OF THE INVENTION

As the power conversion industry matures and the cost of energy increases, manufacturers of uninterruptible power supplies (UPS), renewable energy power converters and motor drives have been challenged by market demands to provide products with higher conversion efficiencies, higher reliability and lower cost per kilowatt. Thirty years ago many large commercial power converters were based on low frequency SCR (silicon controlled rectifier) and thyristor based topologies. These were replaced by 2-level, half-bridge, higher frequency, pulse modulated IGBT (insulated gate bipolar transistor) based topologies. In the last few years, the industry has seen the emergence of 3-level neutral point clamp, and higher level IGBT based topologies previously used only in high power, medium-voltage applications. The invention potentially approaches the same performance as that of a multi-level inverter topology with an infinite number of DC levels. When compared to all prior art power conversion topologies in on-line UPS applications, the invention provides higher conversion efficiencies, higher reliability and lower cost.

BRIEF SUMMARY OF THE INVENTION

The invention is an electrical power conversion topology or a power converter based on the disclosed power converter topology. The preferred embodiment is as a three-phase, on-line Uninterruptible Power Supply (UPS). The desired AC output voltage waveform is created on each output line or phase of the UPS, using pulse modulation techniques and a smoothing output filter inductor. A semiconductor switching matrix is used to switch the power converter side of each output filter inductor between three voltage potentials, a positive battery potential, a negative battery potential and a third intermediate and varying AC potential synchronized with the desired output voltage. Under most load conditions, this third, varying AC potential is only connected during what would be the inductor freewheel period when using prior art topologies. As such, the stored inductor energy is substantially constant during the portion of a PWM (pulse width modulated) cycle when energy is not being sourced from either battery and through the inductor to any load. This varying AC potential need not be an exact match with the desired output voltage to significantly reduce the “idle” voltage across the inductor. If, however, this AC potential and the AC output are at the same instantaneous voltage, then the inductor voltage will be effectively be clamped at zero and the inductor di/dt will be zero. Current will still be delivered to support the load during this zero-inductor-voltage period but will be sourced directly from the utility grid, pre-rectifier. A close voltage match for a 480 Vac in and 480 Vac out on-line UPS or power conditioner is the normal condition when primary power is available. The invention potentially provides the same performance as that of a multi-level inverter topology approaching an infinite number of DC levels. In addition, when using the invention in a typical on-line UPS, comprising a 3-phase rectifier, batteries and a 3-phase buck converter, the power processed by the rectifier is reduced by more than half for buck converter modulation indices less than ½ since load power is sourced directly from the utility source, for sub-switching-cycle periods as in an off-line UPS but with the input power factor correction, the power quality and seamless transfer of an on-line UPS.

UTILITY OF THE INVENTION

The best utility of the invention is found in on-line uninterruptible power supplies (UPS) used in data centers, banks, hospitals, air traffic control and other applications where power availability and quality are critical. The current global market for UPS systems is $7.2 B and is projected to reach $10 B by 2015. It is estimated that a 1 MW high-availability data center can consume $20,000,000 of electricity over its lifetime, a cost that is orders of magnitude greater than the cost of the UPS equipment. Currently “high efficiency” on-line UPS systems have input rectifier and output bridge power conversion efficiencies of 96% (each) or total throughput efficiencies of 92%. This equates to $1,600,000 of electricity lost in power conversion waste heat over the life of one 1 MW system. A UPS system based on the invention would have less than half the power conversion losses of the highest performance state-of-the-art machines now on the market and would also have significant reductions in cost, weight, size and installation site heat removal requirements.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1—Is an electrical schematic which illustrates the invention in its simplest possible form.

FIG. 2—Illustrates the relative performance of a prior art, 3-level DC-to-AC power converter switching between three DC levels and a DC-to-AC power converter based on the invention, switching between two DC levels and an AC potential.

FIG. 3—Is an electrical schematic of the invention preferred embodiment as a 3-phase on-line uninterruptible power supply.

DETAILED DESCRIPTION OF THE INVENTION

FIG. 1 is an electrical schematic which illustrates the invention in its simplest possible form. Positive DC source 6, AC source 7, Negative DC source 8, and load 10 are all referenced to and have a common connection to arbitrary neutral 0. Switch pole 4 and switch throws 1, 2 and 3 together form a single-pole-three-throw switch (SP3T). In practice, the SP3T switch function would be configured as a high speed semiconductor switching matrix. Sources 6, 7 and 8 connect to switch throws 1, 2 and 3, respectively. Switch pole 4 connects to the switched end of inductor 5. The load end of inductor 5 is connected to load 10 at circuit connection point 9. The inductor and therefore the load current are illustrated by arrow 50. If AC source 7 were replaced with a short circuit the topology would be a prior-art, three level neutral point clamp (3LNPC) power converter topology.

FIG. 2B illustrates the performance of a prior art, three level neutral point clamp DC-to-AC power converter switching between three DC levels. FIG. 2C illustrates the performance of a DC-to-AC power converter based on the invention and switching between two DC levels and an AC potential. FIGS. 1 and 2 share associative reference designators so that the circuit topology in FIG. 1 can be linked to the circuit performance comparison illustrated in FIG. 2. FIG. 2A locates the operating point on inductor current 50 bounded by box 51 and detailed in FIGS. 2B and 2C. In FIG. 2B, waveform 42 is the pulse width modulation required to produce instantaneous inductor current 52 and average inductor current 50 using a prior art three level neutral point clamp power converter topology where, referring back to FIG. 1, source 7 is replaced by a short circuit. Waveform 42 is, referring back to FIG. 1, the voltage swing at switch pole 4, on the switched side of inductor 5, and moves between the plus DC potential at switch terminal 1 and neutral 0 (assumes AC source 7 is shorted) at switch terminal 2. In FIG. 2C, waveform 43 is the pulse width modulation required to produce instantaneous inductor current 53 and average inductor current 50 using the invention per FIG. 1. Waveform 43 is the voltage swing at switch pole 4, on the switched side of inductor 5, and moves between the plus DC potential at switch terminal 1 and switch terminal 2, the instantaneous voltage of AC source 7 in FIG. 1. At operating point 51 and assuming a load voltage half that of positive DC source voltage 6, with the invention, semiconductor switching losses are reduced by 50%, peak-to-peak ripple currents are reduced by 60% and the conduction time of the semiconductor switch matrix in position 1 is reduced by 60% compared to a prior art three-level-neutral-point-clamp topology.

FIG. 3A is a schematic diagram for a preferred embodiment of the invention 70 as an on-line UPS (uninterruptible power supply) with the same nominal input and output voltages and using simple symbols to illustrate the machine function. Switches 12, 13, 22, 23, 32 and 33 in conjunction with inductors 11, 21 and 31 are arranged as a typical, prior art, three-phase rectifier used to convert power from utility source 60 at unity power factor to supply batteries 46 and 47 and indirectly, loads 80, as the system is battery-centric with respect to energy transfer. Batteries 46 are paralleled with capacitors 44 forming a positive DC bus and batteries 47 are paralleled with capacitors 45 forming a negative DC bus, both with respect to AC and DC neutral point 0. UPS 70 outputs are connected to loads 81, 82 and 83 in a grounded wye configuration. The voltage across each load is independently regulated. Current is delivered to load 81 through inductor 15 as a function of the relative “on” times or conduction times of semiconductor switches 16, 17 and 18. The same applies for load 82, inductor 25 and switches 26, 27 and 28 as well as load 83, inductor 35 and switches 36, 37 and 38, respectively. Each line or phase of the UPS output breaks down to the basic topology shown in FIG. 1. In FIG. 3A, there is one AC source per phase, sources 61, 62 and 63, analogous to AC source 7 in FIG. 1. Semiconductor switching elements 17, 27 and 37 are each any arrangement of semiconductor devices capable of selectively blocking voltages of either polarity. A common emitter IGBT configuration is shown by example in FIG. 3B as elements 17A and 17B. In the preferred mode of operation, switches 17, 27 and 37 will only be in conduction when inductors 15, 25 and 35 are not being sourced from batteries 46 and 47, as analogous to the inductor freewheeling portion of a PWM cycle in prior art power converters. When utility source 60 is lost, each output line or phase of UPS 70 functions as a 2-level, half-bridge topology. An additional bi-directional switch may also be used between the switched side of each inductor and neutral, so that when source 60 is lost, the UPS may function as a 3-level neutral point clamp topology. In practice, AC power capacitors will be required across source inputs 61, 62 and 63 to neutral 0, to limit voltage overshoot on switches 17, 27 and 37. If the nominal source voltages 60 and the load voltages 80 are not the same, an autotransformer or transformer may be used to facilitate a closer match.

The invention potentially provides the same performance as that of a multi-level inverter topology approaching an infinite number of DC levels. In addition, when using the invention in a typical on-line UPS, comprising a 3-phase rectifier, batteries and a 3-phase buck converter, the power processed by the rectifier is reduced by more than half, for buck converter modulation indices less than ½, since load current is sourced directly from the utility source, for sub-switching-cycle periods, as in an off-line UPS but with the input power factor correction, the power quality and the availability (seamless transfer) of an on-line UPS.

Claims

1. A power converter comprising an inductor, a positive DC input, a negative DC input, an AC input and an AC output, and further comprising a means of selectively coupling one of the three inputs to a first terminal of the inductor and where a second terminal of the inductor is connected to the AC output.

2. A power converter according to claim 1 where all inputs and outputs are referenced to a common neutral and where a load may be connected across the AC output and the common neutral.

3. A power converter according to claim 1 where said means of selectively coupling one of the three inputs is a semiconductor switching matrix operating as a single-pole-three-throw or SP3T switch.

4. A power converter according to claim 1 further comprising three of the power converters described in claim 1 and capable of conversion to three-phase AC potentials.

5. A power conversion method for converting power to a desired AC output potential to supply a load by using DC sources to selectively increase the stored energy of an inductor while supplying load current through the inductor and by using an AC source of similar, frequency, phase and amplitude to the desired AC output potential to in effect clamp the inductor voltage close to zero, and at the same time supply load current from the AC source through the inductor when said DC sources are not supplying inductor current.

6. An on-line uninterruptible power supply or power conditioner comprising an input rectifier, batteries and an output regulator as a means to convert an AC input source to and AC output source to power external loads and further comprising a means to source power directly from the AC input source, during a fraction of an output regulator pulse-width-modulation cycle, to an external load or loads.