The invention relates to a method and device for measuring and digitally processing a vibration sensor signal. Especially, the invention is related to a low-power wireless vibration analysis sensor system to monitor for vibration damage to buildings according to DIN 4150-3.
The standard of the German Institute for Standardization DIN 4150-3 “Vibration in buildings—Part 3: Effects on structures” defines a method to measure and assess vibrations on buildings and recommends thresholds below which vibrations can be considered not harmful for different classes of buildings, such as industrial, residence, and old or bad structural states.
Existing systems for this task usually consist of a data logger to which one or multiple sensing devices, usually geophones, are connected. This data logger may be used for measurements until the on-board memory is filled, upon which the measurement is terminated.
Some data loggers have integrated functions to trigger recordings for a certain amount of time. Other systems may be wireless, but often transmit their recorded data in bulk, requiring much bandwidth and transferring much information that is of no interest to the monitor, hence requiring considerable energy and thus resulting in a short system lifetime.
Some vibration sensing systems are designed for low-power wireless communication and also perform different signal processing functions. Those usually use microcontrollers for processing, which allow only a limited complexity of algorithms or require extended computation times, hence not allowing low-power operation or continuous monitoring. One such example is described in the document US 2008/0082296 A1.
Other devices with wireless communication and vibration sensors employ field-programmable gate arrays (FPGA) for filtering, such as the one presented in “Development of a smart wireless sensing unit using off-the-shelf FPGA hardware and programming products, in Smart Structures and Systems, Vol. 3(1), 2007”, or the one presented in “Development of wireless smart sensor for structural health monitoring, Proceedings SPIE, 2005”. However, these devices do not generate events, but rather describe distributed signal processing algorithms. Additionally, they do not include special functionality for long-term monitoring of damage to buildings.
Therefore, there is a need for an improved method and device for processing a vibration signal.
According to a first aspect, the invention is embodied as a method for monitoring vibrations to detect distinct vibration events in an acceleration waveform converted into acceleration samples. The method comprises:
In embodiments, the method may comprise one or more of the following features:
According to another aspect, the invention is embodied as apparatus for monitoring vibrations to detect distinct vibration events, wherein the apparatus is configured for performing all the steps of the method of the invention.
A system and a method embodying the invention will now be described, by way of non-limiting examples, and in reference to the accompanying drawings, where:
The invention describes a method for monitoring vibrations and detecting vibrations exceeding given thresholds, for example the ones stated in DIN 4150-3 for limits of vibration on building structures. A vibration is first transformed into an acceleration waveform that is then converted from an analog continuous quantity to a discrete time digital representation. These acceleration samples form acceleration frames from which a number of velocity parameters are determined. Acceleration frames are stored in a cache memory. A cache memory is a memory which serves as temporary storage. For each acceleration frame, the velocity parameters are saved to a long-term storage device, thus creating a continuous stream of velocity parameters. The method further compares the velocity parameters to a configurable threshold function, e.g. defined by DIN 4150-3. In case the threshold function is exceeded, the acceleration frame corresponding to the event is also forwarded to a long-term storage device. Forwarding means that the acceleration data is moved from the cache memory to the long-term storage device. A long-term storage device is able to store a larger amount of data compared to the cache memory. The long-term storage device may be an external memory, that is, a memory distinct from the cache memory. Advantageously, the acceleration frame can be provided upon later request for a possible more detailed analysis. Favorably, a device for monitoring vibration is designed for low-power operation allowing continuous vibration monitoring over several months from a single battery.
In reference to
The data acquisition step S100 may be divided into five steps respectively carried out by dedicated modules, as illustrated in
For instance, the data acquisition unit may acquire acceleration waveforms for each axis x, y, and z with a dynamic range of ±2 g and a resolution of 0.5 mg. The vibration signals may be detected by a sensor device consisting of a Microelectromechanical systems (MEMS) acceleration sensor. Each of the acceleration waveforms may be filtered with an individual low pass 210 with a 3 dB cut-off frequency of 128 Hz. Then, the vibration waveform may be sampled with a 16-bit analog-to-digital converter (ADC) 220 at a rate of 2,048 kHz. The acceleration samples may then be temperature compensated before further processing. A digital filter 230 may implement a third order Butterworth filter with a 3 dB cut-off frequency of 128 Hz that advantageously reinforces the analog filter before the signal is downsampled to a 256 Hz signal by a downsampler 2400.
It is to be understood that the different acquisition acceleration waveforms x, y, and z from the sensors may be handled in parallel, i.e. for each channel, separate filters are used.
The division of the low-pass filter into an analog and digital part advantageously allows reducing the number of physical components required for the embodiment of the invention, thus facilitating the implementation, and saving costs. The logic may be transferred into a programmable and configurable integrated circuit such as a field-programmable gate array (FPGA) 240.
Referring back to
Then, at steps S120 to S160, the cached acceleration samples are processed for detecting the presence or the absence of a distinct vibration event. This may be done by testing whether a set of signal parameters exceed a threshold function. To this aim, the filtered and sampled acceleration samples are segmented into overlapping acceleration frames and further processed in an integration unit 2420, peak detection unit 2430, and dominant frequency detection unit 2450, as illustrated in
At step S120, a velocity frame is computed from the acceleration frame retrieved from the cache memory. The computation of the velocity frame may be carried out by first computing the mean velocity value of the acceleration frame using forward Euler integration, then subtracting said mean velocity value within a second backward Euler integration to obtain a DC-offset compensated velocity frame. The velocity frame is computed for an acceleration frame comprising a number of acceleration samples F. The step S120 may be performed by the integration unit 2420 illustrated on
In practice, the acceleration data of an individual axis is integrated to determine the velocity parameters |vi|max, tis, and fi. For the analysis, the integration unit retrieves an acceleration frame from the cache memory. For instance, an acceleration frame may comprise F=512 acceleration samples. If the sampling period T is selected such that T= 1/256 seconds, then an acceleration frame comprising 512 acceleration samples represents the acceleration signal of two seconds. Subsequent frames may overlap by half a frame size, i.e. one second.
For the integration, a DC offset compensation circuit first computes a mean value
over the frame F using forward Euler integration vf(k+1)=vf(k)+T·a(t), where T is the sample period (e.g. T= 1/256 s). The mean velocity value is used to compute a DC offset free velocity signal through a backward Euler integration v(k+1)=v(k)+T·a(k+1)−
Advantageously, using forward Euler integration for computing the DC offset
The dynamic range of the integrator may be extended to 18 bits, further, the accumulator may saturate due to under- or over-flow, which is indicated to the event detector, such that it can handle it in compliance with DIN 45669-1 describing requirements for devices used for performing measurements according to DIN 4150-3.
Next, at steps S130 of
Next, at step S140, a window of length W centered at tis is extracted from the velocity frame. This may be carried out by shifting the velocity values of each velocity frame such that the maximum absolute vibration velocity |vi|max is in the centre of said window of a length W and by dropping all velocity values of each velocity frame that are outside said window of a length W. For instance, a window of size W=256 can be extracted from the velocity frame of step S130 by selecting the velocity values [tis−128, tis+127]. The windowed velocity frame v′(k) is then forwarded to the dominant frequency detection unit.
The centered window may be computed by the window centering unit 2440 of
Next, step S150 determines the dominant frequency fi of the windowed velocity frame v′(k). The dominant frequency fi may be detected by the dominant frequency detection unit 2450 of
An example of a dominant frequency detection unit is represented in
The standard Bruun FFT defines a sequence of operations using the Butterfly depicted within
The first modification of the implementation of the standard Bruun FFT comprises a prescaling of the velocity values of each windowed velocity frame of length W: when reading in the windowed velocity frame v′(k), the values are prescaled by bitshifting all incoming values arithmetically left by 18−ceil(log2(|vi|max)), where ceil is a function rounding a real number up to the next integer. This way, the maximum absolute vibration velocity is represented by the maximum valid digital number specified for an input signal in the dominant frequency detection unit. This advantageously allows to ensure the maximum value uses the most significant bits and reduces the bitwidth required for internal computation.
The second modification of the implementation combines the multiplication of a window function w(k) with storing the incoming windowed velocity frame v′(k) into memory and simultaneously computing the first stage of the Bruun FFT. The window function w(k) may implement a Hamming window. All calculations are performed using the Bruun FFT Butterfly unit as shown in
While reading in the second W/2 velocity values of the windowed velocity frame v′(k), the first stage of the Bruun FFT on the previously stored first W/2 values of v″(k) can be performed simultaneously to the multiplication with the window function and the first stage of the Bruun FFT on the second incoming W/2 velocity values. The results of the first Bruun FFT stage f1(k) and
can be computed with the relations
Using the multiplication of the Butterfly unit to multiply the shifted incoming windowed velocity frame v′(k) with the corresponding window function factor w(k), setting one of the summands equal to the previously stored value
and the other to zero, the Butterfly unit will produce
as its outputs.
The third modification of the implementation relies on that, in the last stage of the original Bruun FFT, the real and imaginary components of the complex FFT are computed. For the detection of the dominant frequency however only the magnitude is needed. The Bruun FFT defines in the last stage S a multiplication
to determine the complex result, where m and n are the indexes of the values of the previous stage as in the standard Bruun FFT procedure. The magnitude could then be computed by summing up the squares as in |fs(k)|2=Re(fs(k))2+Im(fs(k))2. The invention uses the Butterfly unit and the cosine table also used by the other Bruun FFT stages to compute the magnitude directly using the law of cosines:
Using the law of cosines allows computing the magnitude in 3 steps using the available butterfly and thus no additional hardware is required. In the first step
is computed using the corresponding cosine table entry and fs-1(n) as multiplicants, zero as first, and f7(m) as second summand. As a second step, fs-12(n) can be computed by setting the multiplicants both to fs-1(n) and the summands to zero. In a third step, the output of the first step is multiplied by fs-1 (m), the first summand is set to zero, and the second to the output of the second step.
The maximum frequency magnitude mf can be found by setting mf initially to zero, and iteratively compare it to the output of the third magnitude computation step. In case a larger magnitude is found, the value mf is set to this new maximum and its index is stored. After having computed all |fs(k)|2, the index then contains
which is passed to the event detection unit as dominant frequency of the windowed velocity frame of the current axis i.
From now, the velocity parameters
and fi have been computed for all axes i.
Next, at step S160, it is determined whether or not the window W′ comprises a distinct vibration event, that is, whether the velocity parameters exceed a threshold function. The detection may be performed by an event detection unit 2460 as depicted on
Referring now to
An event is triggered if for any axis the condition vth(fi)−|vi|max≦0 is met. In such a case, the event detection unit generates an additional signal parameter ex=1, ey=1, or ez=1. An example frequency parameter set for residential buildings after DIN 4150-3 is [F1=10 Hz; F2=50 Hz; s01=0 mm; s12=0.25 mm; s23=0.125 mm; b0=5 mm/s; b1=5 mm/s; b2=15 mm/s].
Referring now to step S170, the acceleration frame from which a distinct vibration event is detected at step S160 may be forwarded from the cache memory to a long-term storage device in case an event is detected. In other words, in case an event is triggered, the corresponding filtered acceleration samples of all axes are written to the long-term storage device.
Next, at step S180, the velocity parameters of all axes together with the events and a frame index that is incremented after having processed the acceleration frames are stored in the long-term storage device.
It is to be understood that the step S170 may also be performed after the step S180, or both steps S170 and S180 may be concurrently performed.
Therefore, the acceleration data acquired at step S100 is stored within a cache memory for further processing, and moved to the long-term storage device in case of detecting a vibration event. The long-term storage device is a dedicated memory used to extend the cache available and to allow the device to operate for several hours autonomously, while saving all relevant generated data. The relevant data consist of a continuous sequence of computed velocity parameters, window indices, and filtered acceleration data windows of detected events.
Referring now to
Back to
In practice, the long-term storage device 310 has larger storage capabilities than the cache memory 300, which provides two advantages. First, more event data (acceleration data 3100 and velocity parameters 3110) can be stored and kept until it is requested by a monitor. This is important for longer bursts of vibrations generating events, such as during an earthquake. Second, the computed velocity parameters may be stored to this device as well, which allows for several hours of storage until they may be retrieved by the monitor. This ensures continuous monitoring, even if the monitoring device is disconnected for several hours.
The method according to the invention may be implemented within a sensor device to be used within a wireless network of the same sensors for distributed detection of vibration events. Each sensor device autonomously acquires acceleration data, integrates it to determine the velocity of the vibration, determines the velocity signal parameters, and communicates those parameters through a wireless network to a remote monitor. The velocity parameters are delivered in a reliable transmission to allow for uninterrupted monitoring.
In case the thresholds are exceeded, the corresponding acceleration signal is stored and may at a later point be provided upon request received through the network. Advantageously, the network may optimize for low-rate periodic signal parameter transmissions and implement a dedicated method to transmit the acceleration signal as a burst from a limited set of nodes.
The method according to the invention may be implemented within apparatus for monitoring vibrations to detect distinct vibration events, e.g. a sensor device as the one depicted on
The microcontroller 260 for controlling the wireless network may comprise a wireless network controller 2610 that may be in connection with a serial communications unit 2600 that is able to exchange data with the serial communication unit 2470 on the FPGA of the sensor device. In other terms, both serial communication units 2470 and 2600 access a common communication medium between the wireless network controller 2610 and the FPGA.
The wireless network controller 2610 may follow a network sleep and active schedule and decide upon the appropriate time to communicate one or more velocity signal parameters sets. When the wireless network controller 2610 requests data from the FPGA 240, synchronization of the FPGA and microcontroller 260 clock are performed. This synchronization allows to relate the time a measurement was taken to the network global time the microcontroller generates.
During its active phase, the microcontroller may at any time request the delivery of the signal parameters or acceleration data stored within the long-term storage, or reconfigures the threshold function. Upon such a request, the FPGA retrieves the data from the memory and may add its own synchronization information to enable the network controller to estimate the time of acquisition and relate it to the network global time reference. The data obtained from the FPGA may be forwarded by the network controller over the wireless network to some remote monitor.
The synchronization may be performed as follows. The microcontroller being the master of a Serial Peripheral Interface (SPI) communication 2470 and 2600 writes a byte to the FPGA, to which an FPGA synchronously writes a byte back. At the initiation of a transfer of velocity parameters, the FPGA may access an internal clock register when the microcontroller starts sending its SPI byte. This generates a timestamp that is taken close to the communication. After having received this byte, the microcontroller immediately accesses its own time register and stores this value. The intermediate time can be measured with high accuracy and is constant to a high degree.
During the communication, the FPGA may additionally transmit its current window index t, which is always incremented during the same known FPGA time value within a second. Relating a current frame index received with the velocity signal parameters and the timestamp of the reception allows an accurate relation to the network global time.
Referring now to
Several sensor nodes and relay nodes may form a network which communicates, possibly over multiple hops, to a base station (BS), which is connected to a gateway. A sensor node is a node having vibration signal sensing capabilities, and a relay node is a node having only network support function.
The base station may further be connected to a Global Positioning System (GPS) to synchronize the network time to a globally valid reference time. The base station may execute a network controller and a message broker, e.g. a MQTT (MQ Telemetry Transport) broker.
The broker may transmit information relative to the detected events to a remote monitor, e.g. a backend application that further analyses the transmitted information. This backend application may also send information to individual sensor nodes via the broker. The backend application may for instance configure the threshold function vth(f) used within a sensor node.
It is to be understood that even in the case of multiple hours of network failure, the information relative to the detected event can be safely stored into the long-term memory. Therefore, this strategy advantageously allows a reliable continuous monitoring even in the presence of extended wireless network failure. Furthermore, the wireless network of
As will be appreciated by one skilled in the art, aspects of the present invention may be embodied as a system, method or computer program product. Accordingly, aspects of the present invention may take the form of an entirely hardware embodiment, an entirely software embodiment (including firmware, resident software, micro-code, etc.) or an embodiment combining software and hardware aspects that may all generally be referred to herein as a “circuit,” “module” or “system.” Furthermore, aspects of the present invention may take the form of a computer program product embodied in one or more computer readable medium(s) having computer readable program code embodied thereon.
Any combination of one or more computer readable medium(s) may be utilized. The computer readable medium may be a computer readable signal medium or a computer readable storage medium. A computer readable storage medium may be, for example, but not limited to, an electronic, magnetic, optical, electromagnetic, infrared, or semiconductor system, apparatus, or device, or any suitable combination of the foregoing. More specific examples (a non-exhaustive list) of the computer readable storage medium would include the following: an electrical connection having one or more wires, a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), an optical fiber, a portable compact disc read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the foregoing. In the context of this document, a computer readable storage medium may be any tangible medium that can contain, or store a program for use by or in connection with an instruction execution system, apparatus, or device.
A computer readable signal medium may include a propagated data signal with computer readable program code embodied therein, for example, in baseband or as part of a carrier wave. Such a propagated signal may take any of a variety of forms, including, but not limited to, electro-magnetic, optical, or any suitable combination thereof. A computer readable signal medium may be any computer readable medium that is not a computer readable storage medium and that can communicate, propagate, or transport a program for use by or in connection with an instruction execution system, apparatus, or device.
Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.
Computer program code for carrying out operations for aspects of the present invention may be written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like and conventional procedural programming languages, such as the “C” programming language or similar programming languages. The program code may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, or remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider).
Aspects of the present invention have been described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems) and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer readable medium that can direct a computer, other programmable data processing apparatus, or other devices to function in a particular manner, such that the instructions stored in the computer readable medium produce an article of manufacture including instructions which implement the function/act specified in the flowchart and/or block diagram block or blocks.
The computer program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other devices to cause a series of operational steps to be performed on the computer, other programmable apparatus or other devices to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide processes for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.
Number | Date | Country | Kind |
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11171732.8 | Jun 2011 | EP | regional |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/IB2012/052811 | 6/5/2012 | WO | 00 | 12/23/2013 |