Patent Application
20060238647
1. Field of the invention
The invention relates to a video data processing method and device for amplified dynamic video, more particularly the method and the device that ensure the amplified videos displayed on a television wall can remain high in resolution and saturated color.
2. Related Art
For a television wall consisting of multiple televisions, an analog video amplifying device is connected between the televisions and an incoming video signal for amplifying the signal. The incoming video signal input to the amplifying device has the same standard as a video signal received by the television, i.e. the AV signal and S signal. After the AV/S signals have passed through the amplifying device, the amplified signals then contain significant analog noises that may cause obvious differences in color among the televisions.
As the conventional analog video amplifying technique may result in ill effects to the displaying quality, researchers start to compare diverse video signals to find their differentiation. The study results show the VGA signal has representation superior to the AV/S signal in resolution and color saturation. Therefore, after the AV/S signal has been converted to an RGB signal, the problem of poor color saturation is much worse. As a result, the VGA video signal output from a VGA card of the computer is adopted as the source signal for the amplifying device. Because the incoming video signal has been altered, this VGA amplifying device accordingly has circuits different to the conventional amplifying device.
Because earlier televisions were only equipped with an AV/S terminal to receive video data, the amplifying device had to convert the original incoming VGA signal to the AV/S signal to be output to the television. However, the AV/S signal still has different colors to the VGA signal after the converting processes.
For a new proposed computer-controlled television wall that can directly receive the VGA signal, an amplifying device suitable for the television wall is expensive due to high manufacturing cost. The amplifying device needs a time to amplify the received original VGA signal to fit the television wall, so a register is required to temporarily store the incoming data.
With reference to
For example, when the operating frequency of the processor is 15.75 ns and a 60 MHz video signal with 1024×768 resolution is to be processed, the operating frequency of the register should be 7.8 ns. However, when adopting the most commonly used 10 ns asynchronous SRMA, it still causes the image delay problem on the screen.
Although the computer-controlled television wall can provide the amplified signal with superior quality, the data processing problem of the amplifying device is unfavorable to improving displaying resolution. The need for a fast operating frequency register will further increases the fabricating cost.
For the above reasons, there is a need to provide a novel data processing method and device for the dynamic images to mitigate and solve the problems.
An objective of the present invention is to provide a video data processing method that ensures videos can be displayed with a high resolution and saturated color without need of an expensive and high operating speed register.
The method performs video data loading actions and video data saving actions respectively in two stages, wherein the loading or saving actions depend on whether the received video signal contains valid data. When the received data is determined to be valid, only saving the valid data to a register is performed at each clock cycle, and at the same time the register will not be read. Therefore, the operating clock cycle of the register does not need to be twice as fast as that of the processor. In other words, a inexpensive register with normal operating clock cycle can be adopted.
To accomplish the objective, the video data processing device provides:
a processor providing functions including data accessing, valid video data determining and video amplifying;
a signal converting unit connected between the processor and a digital video source for converting a digital video source signal to a digital signal with a level acceptable for the processor;
a register connected to the processor for temporarily storing video data accessed by the processor; and
a digital to analog (D/A) converter connected between an output terminal of the processor and a display for converting an amplified video signal output from the processor to a VGA signal.
The processing device can further comprise a video signal switching unit coupled between the signal converting unit and multiple digital video sources, wherein the video signal switching unit selects one of the multiple digital video sources and outputs the selected digital video source to the signal converting unit.
The video signal switching unit further comprises:
a multiplexer having multiple input terminals and an output terminal, wherein the output terminal of the multiplexer is connected to the signal converting unit; and
multiple signal converters, wherein each signal converter has an input terminal to receive a respective digital video source and has an output terminal connected to a respective input terminal of the multiplexer.
Other objects, advantages and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.
With reference to
The processor (11) provides multiple functions such as data accessing, valid video data determining and video amplifying.
The signal converting unit (12) is connected between the processor (11) and a digital video source for converting a digital video interactive (DVI) signal to a digital TTL signal with a level acceptable for the processor (11). The processor (11) can be a field programmable gate array (FPGA) with transistor-transistor logic (TTL) signal level standard.
The register (13) is connected to the processor (11) for temporarily storing data accessed by the processor (11). The register (13) can be a static random access memory (SRAM).
The D/A converter (14) is connected between an output terminal of the processor (11) and a display (30) equipped with a VGA terminal.
The DVI signal received by the signal converting unit (12) is amplified by the processor (11) and output to the D/A converter (14). The D/A converter (14) transforms the amplified signal to a VGA signal for presenting on the display (30) with high resolution and superior color saturation.
With reference to
The multiple processors (11) are connected as a series, wherein each processor (11) can provide multiple functions such as data accessing, valid video data determining and video amplifying. Each processor (11) can be a field programmable gate array (FPGA) with transistor-transistor logic (TTL) signal level standard.
The signal converting unit (12) is connected between the first processor (11) and a digital video output terminal for converting a digital video interactive (DVI) signal to a signal with a level acceptable for the processor (11).
Each register (13) is connected to a respective processor (11), for temporarily storing data accessed by the processor (11). The register (13) can be a static random access memory (SRAM).
Each D/A converter (14) is connected between an output terminal of a respective processor (11) and a respective display (30).
With reference to
The output terminals of all the signal converters (22) are connected to input terminals of the multiplexer (21). An output terminal of the multiplexer (21) is connected to the signal converting unit (12′) of the video data accessing device (10″). The multiplexer (21) can be formed by a complex programmable logic device (CPLD). A desired video signal can be selected and supplied to the signal converting unit (12′) from the different digital signals (DVI1, DVI2, DVI3) by applying a control signal to the multiplexer (21). For the purpose of image quality improvement, the LVDS converter (23) can be connected to the output terminal of the multiplexer (21) to transform the TTL video signal to an LVDS signal. Consequently, the signal converting unit (12′) has to transform the LVDS signal to a TTL signal.
As discussed above, the video data accessing device can be applied to the television wall consisting of multiple displays. With reference to
With reference to
With reference to
The processes performed by the processor (11) can be concluded to the steps as following:
loading a digital video signal;
determining whether the digital video signal contains valid video data;
only saving the valid video data to a register if the valid video data are detected; and
reading the valid video data saved in the register and amplifying the valid video data according to an amplifying multiple.
In conclusion, the video data accessing method of the present invention purposely separates the reading and saving actions upon the existence of valid data. In comparison with the prior art that performs reading and saving actions in each clock cycle, inexpensive registers can be adopted in the present invention. Even for the application of high resolution display, the amplifying processes can remain operating at high speed without experiencing any delay problem. Further, since both the input signal and output signal of the amplifying device are the VGA standard, the chromatic aberration problem can be avoided.
It is to be understood, however, that even though numerous characteristics and advantages of the present invention have been set forth in the foregoing description, together with details of the structure and function of the invention, the disclosure is illustrative only, and changes may be made in detail, especially in matters of shape, size, and arrangement of parts within the principles of the invention to the full extent indicated by the broad general meaning of the terms in which the appended claims are expressed.
