Patent Application
20130214956
The disclosure relates to analog to digital converters, in particular to logical circuit blocks, a system and a method, that provide functionality of an additional analog to digital converter.
Microcontrollers often comprise analog to digital converters (ADCs) which convert an analog voltage applied to their input pin to a digital value. In particular, a successive approximation (SAR) ADC comprises an input multiplexer that allows selection of an analog input channel from a plurality of analog input channels connected to the input pins of the ADC.
In many applications, an analog input signal of an input channel may be measured by two different ADCs depending on respective application requirements. In this case, however, the measurement result will fall off in quality.
On the one hand, an ADC input itself represents a load for the analog signal source and, on the other hand, the multiplexer itself represents a capacitance whose charge has to be changed when changing between different input signals. Additionally, leakage current may degrade the measurement result.
An additional error may occur when two ADCs simultaneously measure the same analog signal, e.g. when the two measurements temporarily overlap. Then, the signal source will “see” a doubled load during the overlap, that will degrade the measurement result.
In some specific applications, a large number of analog inputs, e.g. 50 analog inputs, have to be measured by ADCs. In such cases, the large number of inputs is divided between several ADCs to keep the capacitance of the multiplexer small, which also allows to measure more than one signal at a time.
Such applications also often require capability of a background scan, i.e. capability to separately test or scan all or some of the plurality of analog channels. In case this background scan is carried out by means of an additional ADC, the individual analog inputs are connected to two multiplexers (of the two different ADCs) which leads to a degradation of conversion quality. Additionally, a rather complex synchronization of the ADCs would be required to avoid overlap of sampling of the ADCs, i.e. to avoid two ADCs sampling the same signal at the same time. Furthermore, an analog multiplexer having many inputs is rather large and may lead to substantial leakage current.
Therefore, there e.g. exists a need for an apparatus and a method that provide the functionality of an additional ADC while avoiding degradation of conversion quality.
In accordance with an aspect of the disclosure, there is provided a logical circuit block, which is configured to be connected to a plurality of ADCs each comprising a plurality of input pins connected to a plurality of analog input channels. The logical circuit block is further configured to cause one ADC of the plurality of ADCs to perform an ADC conversion of an analog input signal received via a particular analog input channel of the plurality of analog input channels to which an input pin of the one ADC is connected.
In accordance with a further aspect of the disclosure, there is provided a method comprising sending, by a logical circuit block, a request to one analog digital converter (ADC) of a plurality of ADCs to cause the one ADC to perform an ADC conversion. The method further comprises performing, by the one ADC, the ADC conversion and sending the result of the ADC conversion to the logical circuit block.
Further features, aspects and advantages of the present disclosure will become apparent from the following detailed description of the disclosure made with reference to the accompanying drawings.
The accompanying drawing is included to provide a further understanding of the present disclosure and is incorporated in and constitutes a part of this specification. The drawing illustrates an embodiment of the present disclosure and together with the description serves to explain the principles of the disclosure. Other embodiments of the present disclosure and many of the intended advantages of the present disclosure will be readily appreciated as they become better understood by reference to the following detailed description.
In the following detailed description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the disclosure may be practiced. It is to be understood that other embodiments may be utilized and structural or other changes may be made without departing from the scope of the present disclosure. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present disclosure is defined by the appended claims.
It is suggested to introduce a “virtual ADC” (VADC) to avoid input multiplexers of multiple ADCs being connected in parallel to the same pin. Such a VADC is not a physical ADC connected in parallel to an input pin, but a logical circuit block that “borrows” input pins or rather input channels from another physical ADC. That is, the VADC requests conversion of analog input signals of a specific analog input channel from an ADC that has an input pin connected to this specific analog input channel.
This approach has two main advantages: On the one hand, an individual analog input channel is only connected to one multiplexer and, on the other hand, the risk of a possible overlap of two conversions that would distort measurement results is eliminated.
The system depicted in
Each ADC of the plurality of ADCs 10a and 10b comprises a converter 11a/11b and a multiplexer 12a/12b having its inputs connected to the plurality of analog input channels 30 via respective input pins and its output connected to an input of the converter 11a/11b.
Each ADC of the plurality of ADCs 10a and 10b further comprises a control interface for receiving ADC conversion requests from the VADC 20: The VADC sends a request to one ADC of the plurality of ADCs 10a and 10b that causes the one ADC to perform a requested ADC conversion. The request of the VADC 20 may comprise information identifying one specific analog input channel of the plurality of input channels 30 and cause the one ADC to perform an ADC conversion of analog signals received via the one specific analog input channel that is connected to an input pin of the one ADC.
The ADCs which are connected to a VADC advantageously support a priority scheme. For this, the control interface of each ADC may advantageously comprise programmable priority controlling means configured to decide on the priority of requests, i.e. decide whether VADC requests have a higher or lower priority than requests received directly by the respective ADC.
A background scan of a plurality of analog input channels is one possible application for which the VADC shown in
However, a VADC may be used for many other applications, for example, for handling conversions of analog signals of a great number of input channels. This can be easily accomplished by the VADC requesting the signal conversions from ADCs which are connected to these input channels.
Accordingly, embodiments of the present disclosure allow to implement the functionality of an additional ADC without actually including an additional physical ADC by temporarily “borrowing” input channels from existent ADCs. Such a virtual VADC can be used (and programmed) in the same way as an additional “physical” ADC connected in parallel. However, the VADC, which is a logical block configured to request another ADC to perform a required ADC conversion, obviates the need for an additional ADC connected in parallel to already existing ADCs and also the need for additional multiplexers. Accordingly, the VADC, when employed in a background scan, for example, provides a solution advantageous with respect to chip area and additionally avoiding a loss of ADC conversion quality.
It is also possible to provide a hybrid ADC. A physical ADC having its “own” input pins connected to analog input channels is additionally enabled to “borrow” a number of input pins/channels from other ADCs, i.e. the hybrid ADC can additionally cause another ADC to perform an ADC conversion of analog signals received via an analog input channel connected to an input pin of the other ADC. Thus, the control circuitry of the hybrid ADC can manage or handle more input channels than actually connected to the input pins of the physical ADC by “borrowing” input channels from other ADCs.
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present disclosure. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this disclosure be limited only by the claims and the equivalents thereof.
This application claims priority to U.S. Provisional Patent Application 61/600,824 filed on Feb. 20, 2012, entitled “Virtual Analog to Digital Converter”, the contents of which are hereby incorporated by reference.
| Number | Date | Country | |
|---|---|---|---|
| 61600824 | Feb 2012 | US |
