The present invention relates to virtual machines, and more specifically, to scheduling control blocks of virtual machines operating in a processing system.
Virtual machines emulate computer systems. Any number of virtual machines may be operated on a real computing system or network. The virtual machines may naively execute operating systems and software by emulating the underlying hardware of a real machine. Other virtual machines may perform particular processes in a virtual execution environment.
In some instances, virtual machines are controlled by a hypervisor or a virtual machine monitor that typically operates on a host machine and provides a virtual operating platform to virtual machines (guest machines). Such hypervisors may in turn, operate on a guest machine and host additional guest machines (nested hypervisors/virtual machines), such that there may be a hierarchy of hypervisors operating on a real host machine.
According to an embodiment of the present invention, a method for operating a processing system comprising in a hypervisor, negotiating with a host platform to determine compatibility between a virtual machine and the host platform, responsive to determining that the virtual machine is compatible with the host platform, receiving a control block from the virtual machine, tagging the control block with information that associates the control block with a control group, determining whether the hypervisor is a base hypervisor, and scheduling the control block for processing responsive to determining that the hypervisor is the base hypervisor.
According to another embodiment of the present invention, a method for operating a processing system comprises in a first virtual machine, negotiating with a host platform to determine compatibility between the first virtual machine and the host platform, responsive to determining that the first virtual machine is compatible with the host platform, tagging a control block with information that associates the control block with a control group associated with the first virtual machine, and sending the tagged control block to a scheduler.
According to yet another embodiment of the present invention, a computer program product comprising a computer readable storage medium having program instructions embodied therewith, the program instructions executable by a processor to cause the processor to perform a method that comprises in a hypervisor, negotiating with a host platform to determine compatibility between a virtual machine and the host platform, responsive to determining that the virtual machine is compatible with the host platform, receiving a control block from the virtual machine, tagging the control block with information that associates the control block with a control group, determining whether the hypervisor is a base hypervisor, and scheduling the control block for processing responsive to determining that the hypervisor is the base hypervisor.
Hypervisors, or more generally, operating systems, schedule processes or compute tasks by encapsulating each process or task in a uniform memory backed data structure. These data structures can be referred to as control blocks. Hypervisors typically receive control blocks from guest machines, the control blocks are portions of processing tasks that are sent to the real machine hardware for execution. In this regard, if multiple virtual machines are operating on a particular real machine, hypervisors will receive multiple control blocks from each of the virtual machines. The hypervisors may associate control blocks from each virtual machine with corresponding control groups. The hypervisor may then apply scheduling rules that promote fairness in the order in which the control blocks are processed amongst the control groups.
This scheme does indeed promote fairness across control groups if none of the guest machines are in turn hosting other guest machines. In such an alternative scheme, imposing fairness in control block processing becomes more complex. Further, if virtual machines host nested hypervisors or virtual machines of a similar nature, each level of scheduling is operating on the same structures, but the levels of scheduling are isolated from each other. The embodiments described below allow control blocks to be normalized and scheduled from a single context. This reduces scheduling inefficiencies and global scheduling across the system can be optimized.
In block 410, if the present hypervisor is the base scheduler (e.g., hypervisor I 202 of
In block 508, the virtual machine sends the control block to the hypervisor or scheduler for scheduling. Thus, in the embodiment described in
Such exemplary methods of operation described above improve the efficiency of the processing of the control blocks of virtual machines and improves the performance of the system.
The present invention may be a system, a method, and/or a computer program product. The computer program product may include a computer readable storage medium (or media) having computer readable program instructions thereon for causing a processor to carry out aspects of the present invention.
The computer readable storage medium can be a tangible device that can retain and store instructions for use by an instruction execution device. The computer readable storage medium may be, for example, but is not limited to, an electronic storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. A non-exhaustive list of more specific examples of the computer readable storage medium includes the following: a portable computer diskette, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or Flash memory), a static random access memory (SRAM), a portable compact disc read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanically encoded device such as punch-cards or raised structures in a groove having instructions recorded thereon, and any suitable combination of the foregoing. A computer readable storage medium, as used herein, is not to be construed as being transitory signals per se, such as radio waves or other freely propagating electromagnetic waves, electromagnetic waves propagating through a waveguide or other transmission media (e.g., light pulses passing through a fiber-optic cable), or electrical signals transmitted through a wire.
Computer readable program instructions described herein can be downloaded to respective computing/processing devices from a computer readable storage medium or to an external computer or external storage device via a network, for example, the Internet, a local area network, a wide area network and/or a wireless network. The network may comprise copper transmission cables, optical transmission fibers, wireless transmission, routers, firewalls, switches, gateway computers and/or edge servers. A network adapter card or network interface in each computing/processing device receives computer readable program instructions from the network and forwards the computer readable program instructions for storage in a computer readable storage medium within the respective computing/processing device.
Computer readable program instructions for carrying out operations of the present invention may be assembler instructions, instruction-set-architecture (ISA) instructions, machine instructions, machine dependent instructions, microcode, firmware instructions, state-setting data, or either source code or object code written in any combination of one or more programming languages, including an object oriented programming language such as Java, Smalltalk, C++ or the like, and conventional procedural programming languages, such as the āCā programming language or similar programming languages. The computer readable program instructions may execute entirely on the user's computer, partly on the user's computer, as a stand-alone software package, partly on the user's computer and partly on a remote computer or entirely on the remote computer or server. In the latter scenario, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or the connection may be made to an external computer (for example, through the Internet using an Internet Service Provider). In some embodiments, electronic circuitry including, for example, programmable logic circuitry, field-programmable gate arrays (FPGA), or programmable logic arrays (PLA) may execute the computer readable program instructions by utilizing state information of the computer readable program instructions to personalize the electronic circuitry, in order to perform aspects of the present invention.
Aspects of the present invention are described herein with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each block of the flowchart illustrations and/or block diagrams, and combinations of blocks in the flowchart illustrations and/or block diagrams, can be implemented by computer readable program instructions.
These computer readable program instructions may be provided to a processor of a general purpose computer, special purpose computer, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions/acts specified in the flowchart and/or block diagram block or blocks. These computer readable program instructions may also be stored in a computer readable storage medium that can direct a computer, a programmable data processing apparatus, and/or other devices to function in a particular manner, such that the computer readable storage medium having instructions stored therein comprises an article of manufacture including instructions which implement aspects of the function/act specified in the flowchart and/or block diagram block or blocks.
The computer readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device to cause a series of operational steps to be performed on the computer, other programmable apparatus or other device to produce a computer implemented process, such that the instructions which execute on the computer, other programmable apparatus, or other device implement the functions/acts specified in the flowchart and/or block diagram block or blocks.
The flowchart and block diagrams in the Figures illustrate the architecture, functionality, and operation of possible implementations of systems, methods, and computer program products according to various embodiments of the present invention. In this regard, each block in the flowchart or block diagrams may represent a module, segment, or portion of instructions, which comprises one or more executable instructions for implementing the specified logical function(s). In some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams and/or flowchart illustration, and combinations of blocks in the block diagrams and/or flowchart illustration, can be implemented by special purpose hardware-based systems that perform the specified functions or acts or carry out combinations of special purpose hardware and computer instructions.
The descriptions of the various embodiments of the present invention have been presented for purposes of illustration, but are not intended to be exhaustive or limited to the embodiments disclosed. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The terminology used herein was chosen to best explain the principles of the embodiments, the practical application or technical improvement over technologies found in the marketplace, or to enable others of ordinary skill in the art to understand the embodiments disclosed herein.
This application is a continuation of U.S. patent application Ser. No. 14/940,568, filed Nov. 13, 2015, the disclosure of which is incorporated by reference herein in its entirety.
Number | Date | Country | |
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Parent | 14940568 | Nov 2015 | US |
Child | 15078040 | US |