Patent Application
20090193321
This application claims the benefit of Korean Patent Application No. 2008-9086, filed in the Korean Intellectual Property Office on Jan. 29, 2008, the disclosure of which is incorporated herein by reference.
1. Field of the Invention
Aspects of the present invention relate to a Viterbi decoder and a Viterbi decoding method.
2. Description of the Related Art
In general, Viterbi decoders detect optimal binary data based on a statistical characteristic of an input signal. Viterbi decoders detect binary data having fewer errors as optimal binary data of an input signal by defining a level corresponding to a characteristic of the input signal and determining a statistical characteristic of the input signal according to the defined level. Such a Viterbi decoder is called a Viterbi detector.
Viterbi decoders generate levels determined according to a number of taps. For example, a 3-tap Viterbi decoder obtains optimal decoding performance of an input signal by generating maximum 23 (8) levels.
The trellis diagram shown in
Referring to
Hardware of the Viterbi decoders is configured to generate and use all levels that can be generated according to the number of taps. Thus, when a Viterbi decoder is applied to devices, such as an optical disc reproducing system with increasing recording density, hardware of the Viterbi decoder can be very complicated since the number of taps increases as recording density increases. As recording density increases, a unit length formed on a disc decreases, and therefore, the intensity of a signal reflected from the disc decreases due to an optical characteristic, and inter-symbol interference (ISI) increases. In order to solve the increasing ISI, the number of taps of a Viterbi decoder is generally increased. Since a Viterbi decoder generates 2L levels when the number of taps is L, if the number of taps increases, the number of levels increases exponentially, and thus, hardware of the Viterbi decoder must be configured to consider all of the exponentially increasing number of levels. Thus, when a Viterbi decoder is applied to devices, such as an optical disc reproducing system with increasing recording density, hardware of the Viterbi decoder is more complicated, and an operation speed is slower.
Aspects of the present invention provide a Viterbi decoder and a Viterbi decoding method for simplifying hardware and increasing an operation speed by providing a level used for branch metric calculation using a decision feedback structure.
According to an aspect of the present invention, a Viterbi decoder is provided. The Viterbi decoder comprises a path memory unit (PMU) to store a survivor path; a decision feedback unit (DFU) to select one of at least two levels based on at least one survivor symbol fed back from the PMU; a branch metric calculation unit (BMCU) to calculate a branch metric based on the level selected by the DFU and the received symbol; and an add-compare-selection unit (ACSU) to determine the survivor path based on the branch metric calculated by the BMCU and a previously stored state metric and to transmit the decided survivor path to the PMU.
According to another aspect of the present invention, the number of taps of the Viterbi decoder is L and the number of reduced-taps is K, the number of fed-back survivor symbols is L−K, the DFU comprises 2L levels, L and K are positive integers, and K is smaller than L.
According to another aspect of the present invention, the BMCU performs 2K branch metric calculations.
According to another aspect of the present invention, the at least two levels are previously set levels, the previously set levels comprise a level based on a case where level distribution of the received symbol has asymmetry, and the most significant bit (MSB) of each of the at least two levels is a bit corresponding to the fed-back survivor symbol.
According to another aspect of the present invention, the Viterbi decoder further comprises a level calculation unit (LCU) to calculate the at least two levels and to transmit the calculated level to the DFU, wherein the LCU calculates the levels based on the received symbol and a decoded symbol output from the PMU or based on the received symbol and binary data input from the outside.
According to another aspect of the present invention, the Viterbi decoder further comprises an adaptive equalization unit (AEU) to equalize the received symbol in order to cancel noise from the received symbol and to transmit the equalized symbol to the BMCU, wherein the received symbol of the LCU is an input signal of the AEU.
According to another aspect of the present invention, the Viterbi decoder further comprises a first adaptive equalization unit (AEU) to equalize the received symbol in order to compensate for a frequency characteristic of the received symbol; and a second AEU to equalize an output signal of the first AEU in order to cancel noise from the output signal of the first AEU and to transmit the equalized symbol to the BMCU, wherein the received symbol of the LCU is an input signal of the first AEU.
According to another aspect of the present invention, a Viterbi decoding method is provided. The method comprises selecting at least two levels based on at least one survivor symbol fed back from a path memory; calculating a branch metric based on the selected levels and a received symbol; determining a survivor path based on the calculated branch metric and a previously stored state metric; and storing the determined survivor path.
Additional aspects and/or advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
These and/or other aspects and advantages of the invention will become apparent and more readily appreciated from the following description of the embodiments, taken in conjunction with the accompanying drawings of which:
Reference will now be made in detail to the present embodiments of the present invention, examples of which are illustrated in the accompanying drawings, wherein like reference numerals refer to the like elements throughout. The embodiments are described below in order to explain the present invention by referring to the figures.
Aspects of the present invention provide a Viterbi decoder and a Viterbi decoding method to simplify hardware and increase an operation speed using a decision feedback unit selecting one of at least two levels based on at least one survivor symbol fed back from a path memory unit. Aspects of the present invention also provide a Viterbi decoder and a Viterbi decoding method to provide an optimal level even if level distribution of a received symbol is asymmetric, by previously setting the at least two levels. Aspects of the present invention also provide a Viterbi decoder and a Viterbi decoding method to obtain an optimal level even if an amplitude of a received symbol of the Viterbi decoder shakes or is asymmetric, by calculating the at least two levels using one of a decoded symbol output from the path memory unit and binary data input from the outside, and the received symbol of the Viterbi decoder.
If the number of taps of the Viterbi decoder 200 is L and the number of reduced-taps is K, the BMCU 210 performs 2K branch metric calculations for a received symbol rn. A branch metric denotes a distance between codes in a branch corresponding to the received symbol rn. The branch metric calculation may be implemented to subtract a level from the received symbol rn and obtain an absolute value of the subtraction result or a square root of the absolute value as the branch metric.
The ACSU 220 determines a survivor path using the branch metric calculated by the BMCU 210 and a previously stored state metric. For example, the ACSU 220 obtains a new state metric by adding the branch metric calculated by the BMCU 210 to the previously stored state metric, selects a state metric having the smallest value from among obtained state metrics, and determines the selected state metric as the survivor path.
The PMU 230 stores and outputs the survivor path determined by the ACSU 220. An output signal of the PMU 230 can be defined as a decoded symbol of a survivor symbol. The PMU 230 may be implemented with a register exchange architecture for generating survivor symbols for respective states. The register exchange architecture transmits a survivor symbol to a multiplexer (MUX) and a register along the survivor path determined by the ACSU 220 and finally outputs a decoded symbol. The decoded symbol can be called a Viterbi decoded signal.
When the PMU 230 transmits a survivor symbol to the MUX and the register, the PMU 230 transmits at least one survivor symbol to the DFU 240. If the number of taps of the Viterbi decoder 200 is L and the number of reduced-taps is K, the PMU 230 provides (L−K) survivor symbols to the DFU 240, where L and K are positive integers and K is smaller than L.
If at least one survivor symbol is received from the PMU 230, the DFU 240 selects one of at least two levels based on the received survivor symbol and transmits the selected level to the BMCU 210. For example, if one survivor symbol is received from the PMU 230, the DFU 240 selects one of two levels and transmits the selected level to the BMCU 210. If two survivor symbols are received from the PMU 230, the DFU 240 selects one of four levels and transmits the selected level to the BMCU 210.
The number of levels selected by the DFU 240 is determined based on the number of taps of the Viterbi decoder 200. If the number of taps of the Viterbi decoder 200 is L, the DFU 240 has 2L levels. If the levels are previously set, the most significant bit (MSB) of each level is a bit corresponding to received survivor symbols. For example, when one survivor symbol is received and L is 3, levels selected by the DFU 240 can be defined as 000, 100, 001, 101, 010, 110, 011, and 111, and the MSB of each level corresponds to the survivor symbol.
When the levels are previously set, the levels can be set by considering a case where level distribution of the received symbol rn has asymmetry. For example, when the received symbol rn has −1 and 1 and has asymmetry for 000, 001, 010, 011,100, 101, 110, and 111 in PR(1, 2, 1), levels are set to provide values corresponding to “−4, −2, 0, 2, −2, 0, 2, and 4”. However, when the asymmetry of the level distribution of the received symbol rn is considered in the conditions described above, the levels can be set to provide values corresponding to “−4, −2.2, −0.4,1, 8, −2.2, −0.4,1.8, and 4”. The BMCU 210 performs the branch metric calculation using the level transmitted from the DFU 240.
A PMU 330 corresponds to the PMU 230 shown in
If the number of taps of the Viterbi decoder is L, the PMU 330 transmits survivor symbols from a survivor symbol an−L−1 to the DFU 340. For example, when L=4 and K=3, the PMU 330 may determine survivor symbols an−3[0n] an−3[1n] an−3[2n] an−3[3n] and transmit the determined survivor symbols to the DFU 340. When this is represented in the C programming language, the dotted box of
In addition, the PMU 330 has the register exchange architecture shown in
The DFU 340 corresponds to the DFU 240 shown in
If a survivor symbol an−2[1n] fed-back from the PMU 330 is 0, a switch SW3 selects and transmits 010 to the branch metric calculation #3, and a switch SW4 selects 011 and transmits 011 to the branch metric calculation #4. However, if the survivor symbol an−2[1n] fed-back from the PMU 330 is 1, the switch SW3 selects 110 and transmits 110 to the branch metric calculation #3, and the switch SW2 selects 111 and transmits 111 to the branch metric calculation #4. The ACSU 320 corresponds to the ACSU 220 shown in
When
An ACSU 520 and a PMU 530 are configured and operate in a similar manner as the ACSU 320 and the PMU 330 shown in
The DFU 540 includes a MUX selecting and transmitting one of previously set 2L−K levels (0, 0˜2L−k−1, 0) according to 2L levels and survivor symbols an−2[0n] and an−3[0n] to the BMCU 510 and a MUX selecting and transmitting one of previously set lower 2L−K levels (0, 0˜2L−k−1, 0) according to survivor symbols an−2[1n] and an−3[1n] to the BMCU 510.
As described above, when the difference between L and K is 2, the MUXs select one of 4 levels according to an input survivor symbol and transmits the selected level to the BMCU 510. For example, when the survivor symbols an−2[0n] and an−3[0n] are 00, the MUX selects a level (0, 0) and transmits the selected level (0, 0) to the MCU 510, and if the survivor symbols an−2[1n] and an−3[1n] are 11, the MUX selects a level (2L−k−1, 1) and transmits the selected level (2L−k−1, 1) to the BMCU 510.
The number of survivor symbols fed-back from the PMU 530 is determined according to the difference (L−K) between the number L of taps of the Viterbi decoder and the number K of reduced-taps. An architecture of the DFU 540 is determined according to the number of fed-back survivor symbols. The number of levels set in the DFU 540 is determined according to the number L of taps of the Viterbi decoder. The BMCU 510 is determined according to the number K of reduced-taps. The number of path memories included in the PMU 530 can be around 5 times the number K of reduced-taps.
The Viterbi decoder 600 shown in
The LCU 640 calculates a level using a decoded symbol output from the PMU 630 and a received symbol input from the BMCU 610. However, the LCU 640 may be implemented to calculate the level using binary data received from the outside and the received symbol. If the Viterbi decoder 600 is implemented as shown in
The delay unit 741 includes a plurality of delayers D and delays a received symbol. The number of delayers D included in the delay unit 741 depends on the number of path memories included in a PMU 730 and a time taken for the selection signal generator 742 to generate a selection signal.
The selection signal generator 742 generates the selection signal by including a plurality of delayers D delaying a decoded symbol an−10[0n] and a MUX generating the selection signal from signals output from the plurality of delayers D. Since the Viterbi decoder 600 as shown in
The LCU 740 includes 8 average filters, each average filter generating a level value. If a received symbol delayed according to the selection signal is input, each of the average filters obtains an average value of the input received symbol for a predetermined period and outputs the obtained average value as a level value. Each average filter can include a low pass filter (LPF). The output level value is transmitted to a DFU 750.
A BMCU 710, an ACSU 720, a PMU 730, and the DFU 750 shown in
Like the LCU 740, an LCU 840 includes a delay unit 841, a selection signal generator 842, a selector 843, and a level value generator 844. However, since the number of levels needed in
The adaptive equalizer 910 equalizes the received symbol to cancel noise from the received symbol. For this purpose, the adaptive equalizer 910 may be configured with a finite impulse response (FIR) filter. The coefficient update unit 920 updates a coefficient of the adaptive equalizer 910 using an input signal of the adaptive equalizer 910 and an output signal of the adaptive equalizer 910.
An LCU 960 receives an input signal of the AEU 905 as the received symbol, calculates 2L levels using input binary data as shown in
The second AEU 1111 includes a second adaptive equalizer 1003 and a second coefficient update unit 1004 in order to cancel noise from a signal output from the first AEU 1110. The second adaptive equalizer 1003 equalizes a signal output from the first adaptive equalizer 1001 to cancel noise from the signal output from the first AEU 1110. For this purpose, like the first adaptive equalizer 1001, the second adaptive equalizer 1003 may be configured with an FIR filter. The second coefficient update unit 1004 updates a coefficient of the second adaptive equalizer 1003 using an input signal of the second adaptive equalizer 1003 and an output signal of the second adaptive equalizer 1003.
An LCU 1008 receives an input signal of the first AEU 1110 as the received symbol and calculates 2L levels using binary data input from the outside as shown in the LCU 840 of
In operation 1102, a branch metric is calculated using the received symbol and the selected level. If the number of reduced-taps is K, 2K branch metric calculations are performed. In operation 1103, a survivor path is determined using the calculated branch metric and a previously stored state metric. In operation 1104, the determined survivor path is stored in the path memory.
Aspects of the present invention can also be embodied as computer readable codes on a computer readable recording medium. The computer readable recording medium is any data storage device that can store data which can be thereafter read by a computer system. Examples of the computer readable recording medium include read-only memory (ROM), random-access memory (RAM), CDs, DVDs, magnetic tapes, floppy disks, and optical data storage devices. The computer readable recording medium can also be distributed over network coupled computer systems so that the computer readable code is stored and executed in a distributed fashion.
As described above, according to aspects of the present invention, by selecting and providing a level used for branch metric calculation by using a survivor symbol fed-back from a path memory unit, the number of branch metric calculators can be reduced, thereby simplifying hardware of a Viterbi decoder. In addition, by previously setting a level used for branch metric calculation, even if level distribution of a received symbol is asymmetric, an optimal level can be provided, thereby obtaining an optimal Viterbi decoding result. Furthermore, by calculating a level to be used for branch metric calculation by using one of a decoded symbol output from the path memory unit and of binary data input from the outside, and a received symbol of the Viterbi decoder, even if an amplitude of the received symbol shakes or is asymmetric, an optimal level can be used, thereby improving the performance of the Viterbi decoder.
Although a few embodiments of the present invention have been shown and described, it would be appreciated by those skilled in the art that changes may be made in this embodiment without departing from the principles and spirit of the invention, the scope of which is defined in the claims and their equivalents.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2008-9086 | Jan 2008 | KR | national |
