M. Biver, "Architectural Design and Realization of a Single-Chip Viterbi Decoder", 8220 Integration, the VSLI Journal 8 (1989) Oct., No. 1, Amsterdam, NL, pp. 3-16. |
G.D. Forney, "The Viterbi Algorithm", Proc. IEEE, vol. 61, May 1973. |
J.H. Lodge et al., "Separable Map Filters for Decoding of Product and Concatenated Codes", Proc. IEEE ICC '93. |
J.Hagenauer et al., "A Viterbi Algorithm with Soft-Decision Outputs and Its Application", Proc. IEEE Globecomm 1989. |
N. Seshardi et al., "On Post Detection Symbol Reliability Generation", Proc. IEE ICC 1993, Geneva, May 1993. |
T. Hashimoto, "A List-Type-Reduced-Constraint Generalization of the Viterbi Algorithm", IEEE Trans. Info. Theory, Nov. 1987. |
"Adaptive Maximum-Likelihood Receiver for Carrier-Modulated Data-Transmission Systems", G. Ungerboeck, IEEE Trans. Comm., May 1974, pp. 624-636. |
"New VLSI Architechtures for Fast Soft-Decision Threshold Decoders", P. Lavoie, IEEE Trans. Comm., vol. 39, No. 2, Feb. 1991. |
"Viterbi Algorithms with List and Soft Symbols Output: Extensions and Comparisons", C. Nill et al., IEEE, 1993, pp. 788-792. |
G. Battail, "Weighting the Symbols Decoded by the Viterbi Algorithm", IEEE Int. Symp. Info. Theory, Oct. 1986, p. 141. |