Claims
- 1. An apparatus including an input signal voltage clamping circuit, comprising:first and second power terminals for conveying a power supply voltage with said second power terminal having a power supply voltage magnitude and polarity relative to said first power terminal; an input signal terminal for conveying an input signal having an input signal magnitude with opposing peak signal magnitude values that have positive and negative polarities relative to said first power terminal; a first input clamping circuit, coupled between said input signal terminal and said first power terminal, that clamps said input signal terminal at a first clamped voltage in response to reception of said input signal, wherein said first clamped voltage has a nonzero magnitude which is less than said power supply voltage magnitude and a same polarity as said power supply voltage relative to said first power terminal, and said received input signal has magnitude values which are greater than said first clamped voltage and a same polarity as said first clamped voltage relative to said first power terminal; a bias circuit, coupled to at least one of said first and second power terminals, that provides a bias signal in response to reception of a bias current; and a second input clamping circuit, coupled between said bias circuit, said input signal terminal and said second power terminal, that clamps said input signal terminal at a second clamped voltage in response to reception of said bias signal and reception of said input signal, wherein said second clamped voltage is substantially zero relative to said first power terminal, and said received input signal has magnitude values which are nonzero and an opposite polarity as said first clamped voltage relative to said first power terminal.
- 2. The apparatus of claim 1, wherein said first input clamping circuit comprises a diode.
- 3. The apparatus of claim 2, wherein said diode comprises a diode-connected transistor.
- 4. The apparatus of claim 1, wherein said bias circuit comprises a diode.
- 5. The apparatus of claim 4, wherein said diode comprises a diode-connected transistor.
- 6. The apparatus of claim 1, wherein said bias circuit comprises a current mirror circuit, coupled between said first and second power terminals, that provides a bias voltage as said bias signal in response to reception of said bias current.
- 7. The apparatus of claim 1, wherein said second input clamping circuit comprises a transistor with a bias terminal coupled to said bias circuit and a signal terminal coupled to said input signal terminal.
- 8. The apparatus of claim 1, wherein said bias circuit and said second input clamping circuit together comprise a current mirror circuit.
- 9. The apparatus of claim 1, further comprising a current shunting circuit, coupled to said bias circuit and across said first input clamping circuit, that conducts a shunt current in response to said bias signal when said first input clamping circuit is substantially turned off.
- 10. The apparatus of claim 9, wherein said bias circuit and said current shunting circuit together comprise a current mirror circuit.
- 11. An apparatus including an input signal voltage clamping circuit, comprising:first and second power means for conveying a power supply voltage with said second power terminal having a power supply voltage magnitude and polarity relative to said first power terminal; input signal means for conveying an input signal having an input signal magnitude with opposing peak signal magnitude values that have positive and negative polarities relative to said first power terminal; first input clamping means for clamping said input signal terminal at a first clamped voltage in response to reception of said input signal, wherein said first clamped voltage has a nonzero magnitude which is less than said power supply voltage magnitude and a same polarity as said power supply voltage relative to said first power terminal, and said received input signal has magnitude values which are greater than said first clamped voltage and a same polarity as said first clamped voltage relative to said first power terminal; bias means for providing a bias signal; and second input clamping means for clamping said input signal terminal at a second clamped voltage in response to reception of said bias signal and reception of said input signal, wherein said second clamped voltage is substantially zero relative to said first power terminal, and said received input signal has magnitude values which are nonzero and an opposite polarity as said first clamped voltage relative to said first power terminal.
- 12. The apparatus of claim 11, further comprising current shunting means for conducting a shunt current in response to said bias signal when said first input clamping circuit is substantially turned off.
- 13. A method for clamping an input signal voltage of a circuit, comprising the steps of:receiving a power supply voltage via first and second power terminals with said second power terminal having a power supply voltage magnitude and polarity relative to said first power terminal; receiving, via an input signal terminal, an input signal having an input signal magnitude with opposing peak signal magnitude values that have positive and negative polarities relative to said first power terminal; clamping said input signal terminal at a first clamped voltage in response to reception of said input signal, wherein said first clamped voltage has a nonzero magnitude which is less than said power supply voltage magnitude and a same polarity as said power supply voltage relative to said first power terminal, and said received input signal has magnitude values which are greater than said first clamped voltage and a same polarity as said first clamped voltage relative to said first power terminal; generating a bias signal; and clamping said input signal terminal at a second clamped voltage in response to reception of said bias signal and reception of said input signal, wherein said second clamped voltage is substantially zero relative to said first power terminal, and said received input signal has magnitude values which are nonzero and an opposite polarity as said first clamped voltage relative to said first power terminal.
RELATED APPLICATIONS
This application claims the benefit of U.S. Provisional application Ser. No. 60/153,013, filed Sept. 9, 1999. This application is also related to: U.S. patent application Ser. No. 09/599,380, filed on even date herewith, and entitled “Voltage Comparator Circuit With Hysteresis”; U.S. Pat. No. 6,208,094 entitled “Multiplexed Video Interface System”; and to U.S. Pat. No. 6,166,579 entitled “Digitally Controlled Signal Magnitude Control Circuit.” The disclosure of each of the foregoing applications is incorporated herein by reference.
US Referenced Citations (5)
Provisional Applications (1)
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Number |
Date |
Country |
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60/153013 |
Sep 1999 |
US |