Patent Application
20250096808
The present disclosure relates to a voltage-controlled oscillator and a phase-locked loop, especially to a voltage-controlled oscillator and a phase-locked loop utilizing the voltage-controlled oscillator.
Voltage-controlled oscillators with high-gain are more resilient to influences of manufacturing process, temperature, and voltage variations. However, with increasingly stringent jitter requirements for product specifications, the voltage-controlled oscillators require with high-gain need large loop filters to meet the jitter requirements. The loop filters may even need to be implemented by utilizing external capacitors, which increases circuit area and cost.
In addition, in a voltage-controlled oscillator, transistors can be utilized to convert an input voltage into a current so as to control the oscillation frequency of the voltage-controlled oscillator. However, based on the characteristics of the transistors, the input voltage needs to be at least larger than the threshold voltage (Vth) of the transistors, and the input voltage is therefore limited such that the voltage operating range of the phase-locked loop utilizing the voltage-controlled oscillator is consequently affected. Furthermore, if the current source of the voltage-controlled oscillator is implemented by utilizing transistors, it becomes sensitive to jitters of the power supply. As a result, the voltage-controlled oscillator has higher requirements for the power supply. For example, the power supply with lower noise is therefore needed.
Furthermore, when a phase-locked loop utilizing a voltage-controlled oscillator is activated, the internal capacitor and the internal resistor significantly impact the stability of the phase-locked loop. Therefore, compensation circuits are usually utilized for compensation. However, the compensation circuits result in additional power consumption. Besides, in the steady state, the assistance provided by the compensation circuits to the voltage-controlled oscillator is minimal. Additionally, the transistors in the compensation circuits generate poles during operations, which significantly affects the stability of the phase-locked loop. Moreover, different frequencies affect the corner frequency of the voltage controlled (VC) circuit. Therefore, not only of transistors in the voltage-controlled oscillator should be considered, but also resistors should be considered, such that the complexity of circuit design increases.
In some aspects, an object of the present disclosure is to, but not limited to, provides a voltage-controlled oscillator and a phase-locked loop that makes an improvement to the prior art.
An embodiment of a voltage-controlled oscillator of the present disclosure includes an input circuit, a first current supply circuit, a second current supply circuit, a filtering circuit, and an oscillating circuit. The input circuit includes an operational amplifier and a first input transistor. The operational amplifier is configured to generate an output voltage according to an input voltage and a feedback voltage. The first input transistor is configured to generate an input current according to the output voltage and a power supply voltage. The first current supply circuit is configured to generate a first output current according to the input current. The second current supply circuit is configured to generate a second output current according to the input current. The filtering circuit is coupled to the input circuit and the second current supply circuit, and configured to reduce an influence caused by a variation of the input current on the second current supply circuit. The oscillating circuit is configured to generate an output clock according to the first output current and the second output current.
An embodiment of a phase-locked loop of the present disclosure includes a phase-frequency detector, a charge pump, a first filtering circuit, a voltage-controlled oscillator, and a loop divider. The phase-frequency detector is configured to detect a difference between a reference clock and a feedback clock to output a detection signal. The charge pump is configured to generate a charging/discharging signal according to the detection signal. The first filtering circuit is configured to determine an input voltage according to the charging/discharging signal. The voltage-controlled oscillator includes an input circuit, a first current supply circuit, a second current supply circuit, a second filtering circuit, and an oscillating circuit. The input circuit includes an operational amplifier and a first input transistor. The operational amplifier is configured to generate an output voltage according to the input voltage and a feedback voltage. The first input transistor is configured to generate an input current according to the output voltage and a power supply voltage. The first current supply circuit is configured to generate a first output current according to the input current. The second current supply circuit is configured to generate a second output current according to the input current. The second filtering circuit is coupled to the input circuit and the second current supply circuit and configured to reduce an influence caused by a variation of the input current on the second current supply circuit. The oscillating circuit is configured to generate an output clock according to the first output current and the second output current. The loop divider is configured to generate the feedback clock according to the output clock. A ratio of a filter bandwidth of the second filtering circuit to a loop bandwidth of the phase-locked loop is not larger than 0.01.
Technical features of some embodiments of the present disclosure make an improvement to the prior art. The voltage-controlled oscillator of the present disclosure utilizes the operational amplifier to receive the input voltage. Through the negative feedback mechanism of the operational amplifier, low input voltage can be used to adjust the transistor for generating the current to control the oscillating frequency of the oscillator. As a result, the voltage-controlled oscillator of the present disclosure has a wider input voltage range, and the phase-locked loop utilizing the voltage-controlled oscillator has a broader voltage operating range as well.
Additionally, the voltage-controlled oscillator and the phase-locked loop of the present disclosure utilize the negative feedback mechanism of the operational amplifier to adjust the transistor. Consequently, the voltage-controlled oscillator and the phase-locked loop of the present disclosure have a superior power supply rejection ratio (PSRR), and requirements to the power supply are therefore lower. Furthermore, in the circuit design of the voltage-controlled oscillator and the phase-locked loop of the present disclosure, only the impact of the transistor on the corner frequency needs to be considered, without the need to account for the influence of the resistor. As a result, the complexity of the circuit design decreases.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiments that are illustrated in the various figures and drawings.
In order to improve a voltage operating range of a phase-locked loop utilizing a voltage-controlled oscillator being affected by limitations in an input voltage of a voltage-controlled oscillator in prior art, to improve higher power supply requirements associated with the voltage-controlled oscillator in prior art, and to improve higher complexity in a circuit design in prior art, the present disclosure provides a voltage-controlled oscillator and a phase-locked loop, which will be explained in detail as below.
In some embodiments, the operational amplifier OP is configured to generate an output voltage Vop according to an input voltage Vin and a feedback voltage Vfb. Subsequently, the first input transistor MI1 is configured to generate an input current Iin according to the output voltage Vop and a power supply voltage VDD. The first current supply circuit 120 is configured to generate a first output current Io1 according to the input current Iin. The second current supply circuit 130 is configured to generate a second output current Io2 according to the input current Iin. The filtering circuit 140 is coupled to the input circuit 110 and the second current supply circuit 130, and configured to reduce an influence caused by a variation of the input current Iin on the second current supply circuit 130. In some embodiments, the filtering circuit 140 includes a passive low-pass filter, and the filtering circuit 140 includes a capacitor C1 and a resistor R1. The filtering circuit 140 of the present disclosure can be disposed between the input circuit 110 and the second current supply circuit 130 to reduce (e.g., slow down) an influence caused by a variation of the input current Iin on the second current supply circuit 130 with a higher current driving ability. The oscillating circuit 150 is configured to generate an output clock according to the first output current Io1 and the second output current Io2.
It is noted that, if viewed from the input voltage Vin, the voltage-controlled oscillator 100 of the present disclosure resembles an architecture of a low dropout regulator (LDO). Through the negative feedback mechanism of the operational amplifier OP, a lower input voltage Vin can be used to adjust the gate-source voltage (Vgs) of the first input transistor MI1 for generating a current to control the oscillation frequency of the oscillating circuit 150. As a result, the voltage-controlled oscillator 100 of the present disclosure has a wider input voltage Vin range, and the phase-locked loop utilizing the voltage-controlled oscillator 100 has a broader voltage operating range as well.
In some embodiments, the second output current Io2 generated by the second current supply circuit 130 is larger than the first output current Io1 generated by the first current supply circuit 120. As a result, the current driving ability of the second current supply circuit 130 is stronger than the current driving ability of the first current supply circuit 120. For example, the current ratio of the second output current Io2 to the first output current Io1 can be a value ranging from 10 to 40. The filtering circuit 140 is coupled between the input circuit 110 and the second current supply circuit 130 for slowing down an influence caused by a variation of the input current Iin on the second current supply circuit 130 with a higher current driving ability so as to reduce an influence caused by a variation of the input voltage Vin (caused by factors such as manufacturing process, temperature, voltage, and so on) on the oscillating circuit 150. At the same time, the filtering circuit 140 does not affect the first current supply circuit 120 with a weaker current driving ability. Therefore, the variation of the input voltage Vin will be promptly reflected on the output of the oscillating circuit 150 through the change of the first output current Io1, but the smaller first output current Io1 does not excessively impact the oscillating circuit 150.
In some embodiments, the first input transistor MI1 includes a high voltage terminal, a control terminal, and a low voltage terminal. The high voltage terminal of the first input transistor MI1 is configured to receive the power supply voltage VDD. The control terminal of the first input transistor MI1 is configured to receive the output voltage Vop. The low voltage terminal of the first input transistor MI1 is configured to output the input current Iin.
In some embodiments, the operational amplifier OP includes an inverting terminal, a non-inverting terminal, and an output terminal. The inverting terminal of the operational amplifier OP is configured to receive the input voltage Vin. The non-inverting terminal of the operational amplifier OP is coupled to the low voltage terminal (e.g., the lower terminal) of the first input transistor MI1, and configured to receive the feedback voltage Vfb. The output terminal of the operational amplifier OP is coupled to the control terminal of the first input transistor MI1, and configured to output the output voltage Vop. In some embodiments, the output terminal of the operational amplifier OP is coupled to the second current supply circuit 130 through the filtering circuit 140.
In some embodiments, the input circuit 110 further includes a second input transistor MI2. The second input transistor MI2 includes a high voltage terminal, a control terminal, and a low voltage terminal. The high voltage terminal (e.g., the upper terminal) of the second input transistor MI2 is coupled to the low voltage terminal (e.g., the lower terminal) of the first input transistor MI1 and the non-inverting terminal of the operational amplifier OP. The control terminal of the second input transistor MI2 is coupled to its high voltage terminal (e.g., the upper terminal) to form an equivalent diode. The low voltage terminal of the second input transistor MI2 is coupled to a low potential terminal (e.g., the ground terminal). As shown in the figure, the input circuit 110 of the voltage-controlled oscillator 100 is equipped only with a transistor and not equipped with a resistor. Therefore, in circuit design, only the impact of the transistor on the corner frequency needs to be considered, without the need to consider the influence of the resistor. This complexity of the circuit design therefore decreases.
In some embodiments, the second input transistor MI2 of the input circuit 110 can be replaced with a resistor or can be implemented by a transistor operating in its linear region to improve the linearity of the gain (KVCO) of the voltage-controlled oscillator 100.
In some embodiments, the first current supply circuit 120 includes a first output transistor Mo1. The first output transistor Mo1 includes a high voltage terminal, a control terminal, and a low voltage terminal. The high voltage terminal of the first output transistor Mo1 is configured to receive the power supply voltage VDD. The control terminal of the first output transistor Mo1 is coupled to the output terminal of the operational amplifier OP, and configured to receive the output voltage Vop. The low voltage terminal of the first output transistor Mo1 is configured to generate the first output current Io1.
In some embodiments, the second current supply circuit 130 includes a second output transistor Mo2. The second output transistor Mo2 includes a high voltage terminal, a control terminal, and a low voltage terminal. The high voltage terminal of the second output transistor Mo2 is configured to receive the power supply voltage VDD. The control terminal of the second output transistor Mo2 is coupled to the output terminal of the operational amplifier OP through the filtering circuit 140, and configured to receive the output voltage Vop. The low voltage terminal of the second output transistor Mo2 is configured to generate the second output current Io2.
In some embodiments, the first input transistor MI1 and the first output transistor Mo1 form a current mirror. Based on the principles of the current mirror, the current ratio between the first output current Io1 flowing through the first output transistor Mo1 and the input current Iin flowing through the first input transistor MI1 is a specific value (such as a fixed value, or one of several predetermined ratios of a controllable current mirror). By determining the size ratio or equivalent relationship of the first output transistor Mo1 and the first input transistor MI1 (such as the ratio of the number of transistors in the first output transistor Mo1 to the number of transistors in the first input transistor MI1), the current ratio Io1/Iin can be determined.
As mentioned above, the first input transistor MI1 and the second output transistor Mo2 also form a current mirror. Based on the principles of the current mirror, the current ratio between the second output current Io2 flowing through the second output transistor Mo2 and the input current Iin flowing through the first input transistor MI1 is a specific value (such as a fixed value, or one of several predetermined ratios of a controllable current mirror). By determining the size ratio or equivalent relationship of the second output transistor Mo2 and the first input transistor MI1 (such as the ratio of the number of transistors in the second output transistor Mo2 to the number of transistors in the first input transistor MI1), the current ratio Io2/Iin can be determined. As a result, the voltage-controlled oscillator 100 of present disclosure utilizes the negative feedback mechanism of the operational amplifier OP to adjusts the gate-source voltage (Vgs) of the first input transistor MI1 with lower input voltage Vin. Simultaneously, it adjusts the currents of the first output transistor Mo1 and the second output transistor Mo2 through the principles of the current mirror. In view of the above, the voltage-controlled oscillator 100 of the present disclosure controls the first output transistor Mo1 and the second output transistor Mo2 through the negative feedback mechanism of the operational amplifier OP. In other words, the gate voltages of the first output transistor Mo1 and the second output transistor Mo2 are determined by the operational amplifier OP. Therefore, the voltage-controlled oscillator 100 of the present disclosure has superior power supply rejection ratio (PSRR), and therefore requirements of the power supply is lower.
In some embodiments, the first input transistor MI1, the first output transistor Mo1, and the second output transistor Mo2 can be P-type Metal-Oxide-Semiconductor Field-Effect Transistors (PMOSFET), and the second input transistor MI2 can be N-type Metal-Oxide-Semiconductor Field-Effect Transistor (NMOSFET). However, the present disclosure is not limited to the embodiment in
In some embodiments, the filtering circuit 140 includes a capacitor C1 and a resistor R1. The capacitor C1 is configured to receive the power supply voltage VDD. The resistor R1 is coupled to the output terminal of the operational amplifier OP, the control terminal of the first input transistor MI1, the control terminal of the first output transistor Mo1, and the control terminal of the second output transistor Mo2.
In some embodiments, the resistor R1 includes a first terminal and a second terminal. The first terminal (e.g., the left terminal) of the resistor R1 is coupled to the output terminal of the operational amplifier OP, and the second terminal (e.g., the right terminal) of the resistor R1 is coupled to the capacitor C1 and the control terminal of the second output transistor Mo2.
In some embodiments, the filtering circuit 140 can be a passive low-pass filter. In another embodiment, the filtering circuit 140 can also be an active low-pass filter composed of capacitors and operational amplifiers. When the voltage-controlled oscillator 100 is in a steady state, the filtering circuit 140 will filter out the medium high frequency noise. Equivalently, the effective gain (KVCO) of the voltage-controlled oscillator 100 is smaller.
In some embodiments, the oscillating circuit 150 includes a ring oscillator, the ring oscillator include a plurality of oscillator units, and each of the oscillator units (e.g., inverters) is driven by the first output current Io1 and the second output current Io2 to generate a clock according to the output of the oscillator unit of the preceding stage.
In some embodiments, the oscillation circuit 150 can be a single-ended oscillator. However, the present disclosure is not limited to the embodiment in
In some embodiments, compared with the input circuit 110 in
In some embodiments, compared with the input circuit 110 in
In some embodiments, the first current supply circuit 320 includes a first output transistor Mo1. The first output transistor Mo1 includes a high voltage terminal, a control terminal, and a low voltage terminal. The high voltage terminal of the first output transistor Mo1 is coupled to the oscillating circuit 350. The control terminal of the first output transistor Mo1 is coupled to the low voltage terminal (e.g., the lower terminal) of the third input transistor MI3 and the high voltage terminal (e.g., the upper terminal) of the fourth input transistor MI4. The low voltage terminal of the first output transistor Mo1 is coupled to the low potential terminal (e.g., the ground terminal). Compared with utilizing PMOSFET in the first output transistor Mo1 of the first current supply circuit 120 in
In some embodiments, the second current supply circuit 330 includes a second output transistor Mo2. The second output transistor Mo2 includes a high voltage terminal, a control terminal, and a low voltage terminal. The high voltage terminal of the second output transistor Mo2 is coupled to the oscillating circuit 350. The control terminal of the second output transistor Mo2 is coupled to the low voltage terminal (e.g., the lower terminal) of the third input transistor MI3 and the high voltage terminal (e.g., the upper terminal) of the fourth input transistor MI4 through the filtering circuit 340. The low voltage terminal of the second output transistor Mo2 is coupled to the low potential terminal (e.g., the ground terminal). Compared with utilizing PMOSFET in the second output transistor Mo2 of the second current supply circuit 130 in
In some embodiments, compared with the filtering circuit 140 in
In some embodiments, compared with the filtering circuit 140 in
Except for the voltage-controlled oscillators 100, 200, 300, the present disclosure also includes a phase-locked loop.
In some embodiments, the phase-frequency detector 410 is configured to detect a difference between a reference clock ClkREF and a feedback clock ClkFEEDBACK to output a detection signal. The charge pump 420 is configured to generate a charging/discharging signal according to the detection signal. The filtering circuit 430 is configured to determine an input voltage according to the charging/discharging signal. The voltage-controlled oscillator 440 is configured to generate an output clock according to the input voltage. The loop divider 450 is configured to generate the feedback clock ClkFEEDBACK according to the output clock. Each of the phase-frequency detector 410, the charge pump 420, the filtering circuit 430, and the loop divider 450 is a known circuit or a self-developed circuit, and thus the detail of these circuits is omitted. The voltage-controlled oscillator 440 can be one of the voltage-controlled oscillators 100, 200, 300 of
Since people of ordinary skill in the art can appreciate the detail and the modification of the embodiment of
In view of the above, the voltage-controlled oscillator and the phase-locked loop of some embodiments of the present disclosure exhibit a smaller effective gain (KVCO) and superior phase noise. Consequently, the loop filter can utilize a smaller compensation capacitor, which reduces both area and cost.
Additionally, the voltage-controlled oscillator of the present disclosure utilizes the operational amplifier to receive the input voltage. Through the negative feedback mechanism of the operational amplifier, low input voltage can be used to adjust the transistor for generating the current to control the oscillating frequency of the oscillator. As a result, the voltage-controlled oscillator of the present disclosure has a wider input voltage range, and the phase-locked loop utilizing the voltage-controlled oscillator has a broader voltage operating range as well.
Besides, the voltage-controlled oscillator and the phase-locked loop of the present disclosure utilize the negative feedback mechanism of the operational amplifier to adjust the transistor. Consequently, the voltage-controlled oscillator and the phase-locked loop of the present disclosure have a superior power supply rejection ratio (PSRR), and requirements to the power supply are therefore lower. Furthermore, in the circuit design of the voltage-controlled oscillator and the phase-locked loop of the present disclosure, only the impact of the transistor on the corner frequency needs to be considered, without the need to account for the influence of the resistor. As a result, the complexity of the circuit design decreases.
It is noted that people having ordinary skill in the art can selectively use some or all of the features of any embodiment in this specification or selectively use some or all of the features of multiple embodiments in this specification to implement the present invention as long as such implementation is practicable; in other words, the way to implement the present invention can be flexible based on the present disclosure.
The aforementioned descriptions represent merely the preferred embodiments of the present invention, without any intention to limit the scope of the present invention thereto. Various equivalent changes, alterations, or modifications based on the claims of the present invention are all consequently viewed as being embraced by the scope of the present invention.
| Number | Date | Country | Kind |
|---|---|---|---|
| 112135758 | Sep 2023 | TW | national |
