Claims
- 1-6. (Cancelled)
- 7. A cascaded voltage controlled oscillator comprising:
a first oscillator stage having a first oscillator stage first input, a first oscillator stage second input and a first oscillator stage output; a second oscillator stage having a second oscillator stage input and a second oscillator stage output wherein the first oscillator stage output is input to the second oscillator stage input and wherein the second oscillator stage output is fed back to the first oscillator stage second input; and a third oscillator stage having a third oscillator stage input and a third oscillator stage output wherein the second oscillator stage output is fed to the third oscillator stage input; wherein the first oscillator stages includes an LC tank oscillator.
- 8. A cascaded voltage controlled oscillator as recited in claim 7, wherein the first oscillator stage first input and the first oscillator stage second input corresponds to two separate signals.
- 9. A cascaded voltage controlled oscillator as recited in claim 7, wherein the second oscillator stage and the third oscillator stage each includes an LC tank oscillator.
- 10. A cascaded voltage controlled oscillator as recited in claim 7, wherein the first oscillator stage includes a transistor having a source and a drain, and the LC tank oscillator is connected between the source and the drain.
- 11. A cascaded voltage controlled oscillator as recited in claim 7, wherein:
the first oscillator stage includes a first plurality of transistors and a second plurality of transistors; drains of each of the first plurality of transistors are connected; drains of each of the second plurality of transistors are connected; and the LC tank oscillator is connected between the drains of the first plurality of transistors and the drains of the second plurality of transistors.
- 12. A cascaded voltage controlled oscillator as recited in claim 7, wherein the first plurality of transistors includes a first PMOS transistor and a first NMOS transistor; and the second plurality of transistors includes a second PMOS transistor and a second NMOS transistor.
- 13. A cascaded voltage controlled oscillator comprising:
a first oscillator stage having a first oscillator stage first input, a first oscillator stage second input and a first oscillator stage output; a second oscillator stage having a second oscillator stage input and a second oscillator stage output wherein the first oscillator stage output is input to the second oscillator stage input and wherein the second oscillator stage output is fed back to the first oscillator stage second input; and a third oscillator stage having a third oscillator stage input and a third oscillator stage output wherein the second oscillator stage output is fed to the third oscillator stage input; wherein the first oscillator stage first input and the first oscillator second input are arranged to have a phase difference such that combining the first oscillator stage first input and the first oscillator second input results in a combined input having a combined signal and a combined noise, wherein the combined signal grows faster than the combined noise.
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application is related to co-pending U.S. Patent Application No. ______ (Attorney Docket No. BERKP007) entitled PHASE SYNCHRONOUS MULTIPLE TANK OSCILLATOR filed concurrently herewith, which is incorporated herein by reference for all purposes.
Continuations (1)
|
Number |
Date |
Country |
Parent |
10003729 |
Nov 2001 |
US |
Child |
10780533 |
Feb 2004 |
US |