The organization and manner of the structure and operation of the invention, together with further objects and advantages thereof, may best be understood by reference to the following description, taken in connection with the accompanying drawings, wherein like reference numerals identify like elements in which:
Preferred embodiments of the present invention will be explained hereinafter with reference to the accompanying drawings.
As shown in
The addition circuit 2 has a first input end connected to the frequency control voltage input terminal 1, a second input end connected to an output end of the reference voltage generating circuit 3, and an output end connected to an input end of the polarity inversion circuit 4 and a first input end of the switching circuit 5. The polarity inversion circuit 4 has an output end connected to a second input end of the switching circuit 5. The switching circuit 5 has an output end connected to an input end of the integration circuit 6, and a control end connected to an output end of the flip-flop circuit 7(3) via an output end of the switching voltage generating section 7. The integration circuit 6 has an output end connected to a third input end of the window comparison circuit 7(2) through the oscillation signal output terminal 8 and a control end of the switching voltage generating section 7. At the switching voltage generating section 7, the window comparison circuit 7(2) has a first input end connected to a high-level window voltage output end of the reference window voltage generating circuit 7(1), a second input end connected to a low-level window voltage output end of the reference window voltage generating circuit 7(1), and an output end connected to an input end of the flip-flop circuit 7(3).
The voltage controlled oscillator based on the above configuration is operated as follows:
When a frequency control voltage for setting an oscillation frequency is supplied to the frequency control voltage input terminal 1, the addition circuit 2 adds the frequency control voltage to a reference voltage supplied from the reference voltage generating circuit 3 to form an added frequency control voltage. The added frequency control voltage is supplied directly to the first input end of the switching circuit 5 and inverted in polarity by the polarity inversion circuit 4, followed by being supplied to the second input end of the switching circuit 5 as an inverted-added frequency control voltage. In this case, the reason why the reference voltage is added to the frequency control voltage is that when the fluctuation range of the frequency control voltage extends over a positive voltage and a negative voltage, the reference voltage is added to the frequency control voltage to allow the fluctuation range of the adder frequency control voltage to fall within a positive voltage range. When, for example, the frequency control voltage is of a sinusoidal voltage and frequency modulation based on the sinusoidal voltage is effected on an oscillation signal, the present reference voltage is used to determine a center frequency at the frequency-modulated signal. At this time, a relationship of reference voltage>sinusoidal voltage is established. Assuming that the value of the reference voltage is E and the sinusoidal voltage is a sin ωt, the voltage value E is selected in such a manner that each instantaneous value of E+a sin ωt is always brought to a positive voltage.
On the other hand, when the negative voltage is not reached even when the frequency control voltage for setting the oscillation frequency is under any varying state, the addition circuit 2 and the reference voltage generating circuit 3 are unnecessary, and the frequency control voltage is directly supplied to the first input end of the switching circuit 5 and the input end of the polarity inversion circuit 4, respectively.
The switching circuit 5 is changed over depending on an output logic state of the switching voltage generating section 7. When the switching voltage generating section 7 is brought to one output logic state, a state in which the frequency control voltage supplied to the first input end is supplied to the following integration circuit 6 or a state in which the inverse frequency control voltage supplied to the second input end is supplied to the following integration circuit 6 is maintained as it is. When, however, the switching voltage generating section 7 is brought to another output logic state, the switching circuit 5 changes the state in which the frequency control voltage supplied to the first input end is supplied to the integration circuit 6 to the state in which the inverse frequency control voltage supplied to the second input end is supplied to the integration circuit 6 or changes the latter state to the former state.
At this time, as shown in
Means for varying the output logic state of the switching voltage generating section 7 thereat will next be explained.
The reference voltage generating circuit 7(1) generates a high-level window voltage of +B volts and a low-level window voltage of −B volts respectively and supplies the same to the window comparison circuit 7(2). The window comparison circuit 7(2) is supplied with the high-level window voltage of +B volts, the low-level window voltage of −B volts and the triangular wave signal supplied to the oscillation signal output terminal 8 and compares the level of the triangular wave signal, the high-level window voltage of +B volts and the low-level window voltage of −B volts. When it is found by the level comparison that the level of the triangular wave signal exists between the high-level window voltage of +B volts and the low-level window voltage of −B volts, the window comparison circuit 7(2) outputs a low-level voltage value. On the other hand, when the level of the triangular wave signal is higher than the high-level window voltage of +B volts or lower than the low-level window voltage of −B volts, the window comparison circuit 7(2) outputs a high-level voltage value. Since the output logic state of the flip-flop circuit 7(3) remains unchanged during a period in which the low-level voltage value is being supplied from the window comparison circuit 7(2), the output to be selected by the switching circuit 5 is not switched. On the other hand, when the high-level voltage is supplied from the window comparison circuit 7(2) is supplied, the output logic state of the flip-flop circuit 7(3) changes so that the output to be selected by the switching circuit 5 is switched.
When the selected output of the switching circuit 5 is switched, the polarity of the frequency control voltage (or inverse frequency control voltage) which has been supplied to the integration circuit 6 until that point in time, is inverted. Therefore, its integrated value changes in an antipolarity direction from the time of its polarity inversion. That is, the output oscillation signal is fed back to the switching voltage generating section 7, where its peak voltage is monitored. When the output oscillation signal exceeds a set high-peak voltage value or a low-peak voltage value, the polarity of the frequency control voltage (or inverse frequency control voltage) supplied to the integration circuit 6 is inverted to pull back the level of the oscillation signal from the high (low)-peak voltage value to the low (high)-peak voltage value.
If the integration circuit 6 is set to one using an op amplifier in this case, there can then be obtained one having a nearly ideal integration characteristic. If, however, the charge/discharge of an integrated value is performed using only a portion near a linear curve of an exponential function curve even in the case of a simple low-pass filter type integration circuit constituted of only a resistor and a capacitor, it is then possible to considerably reduce a signal distortion component at voltage-to-frequency conversion.
The triangular wave signal formed by the voltage controlled oscillator may be outputted as it is. If, however, a triangular wave-rectangular wave conversion circuit having a known configuration is connected between the output end of the integration circuit 6 and the oscillation signal output terminal 8 according to the usage purpose of the oscillation signal, or a waveform conversion circuit such as a triangular wave-sine wave conversion circuit is connected therebetween according to the usage purpose thereof, the waveform of the oscillation signal can be taken out as a rectangular wave signal waveform or a sinusoidal signal waveform.
Although the above description has been made of the case in which the frequency control voltage supplied to the integration circuit 6 is defined as a constant dc voltage, the frequency control voltage needs not to be defined as the constant dc voltage. Even though the frequency control voltage is of a frequency control voltage that varies in voltage value on a temporal basis, similar operations can be done. If one that varies in sinusoidal form is used as the frequency control voltage in particular, it is then possible to output a triangular wave signal frequency-modulated as an oscillation-outputted triangular wave signal.
Next,
As shown in
Means for varying an output logic state of the switching voltage generating section 9 thereat in this case will next be explained.
The full-wave rectifying circuit 9(2) full-wave rectifies an output oscillation signal and displaces or varies a triangular wave signal varying between +B volts and −B volts between +B volts and 0 volts thereby to convert the triangular wave signal to a triangular wave signal having a double frequency, and supplies the triangular wave signal to the comparison circuit 9(3). The reference voltage generating circuit 9(1) generates a comparison voltage of +B volts and supplies it to the comparison circuit 9(3) in like manner. The comparison circuit 9(3) level-compares the triangular wave signal and the comparison voltage. When the level of the triangular signal does not reach +B volts, the comparison circuit 9(3) outputs a low-level voltage value. On the other hand, when the level of the triangular signal reaches +B volts, the comparison circuit 9(3) outputs a high-level voltage value. Since the output logic state of the flip-flop circuit 9(4) remains unchanged during a period in which the low-level voltage value is supplied from the comparison circuit 9(3), the output to be selected by the switching circuit 5 is not switched. On the other hand, when the high-level voltage value is supplied from the comparison circuit 9(3), the output logic state of the flip-flop circuit 9(4) changes so that the output to be selected by the switching circuit 5 is switched.
When the selected output of the switching circuit 5 is switched, the polarity of the frequency control voltage (or inverse frequency control voltage) which has been supplied to the integration circuit 6 until that point in time, is inverted. Therefore, its integrated value changes in an antipolarity direction from the time of its polarity inversion. That is, when the output oscillation signal is fed back to the switching voltage generating section 9, the switching voltage generating section 9 monitors its peak voltage value. When the output oscillation signal reaches a set high-peak voltage value, the polarity of the frequency control voltage (or inverse frequency control voltage) supplied to the integration circuit 6 is inverted, so that a required oscillation signal is obtained.
The switching voltage generating section 9 according to the second embodiment full-wave rectifies the triangular wave signal corresponding to the output oscillation signal by using the full-wave rectifying circuit 9(2) thereby to obtain the double-frequency triangular wave signal equal to twice the original triangular wave signal frequency. Therefore, it is enough if the reference voltage generating circuit 9(1) for generating one reference voltage and the comparison circuit 9(3) for comparing the level of the double-frequency triangular wave signal and the level of the reference voltage are used. The switching voltage generating section 9 can be simplified in configuration as compared with the switching voltage generating section 7 according to the first embodiment.
When the frequency control voltage for setting the oscillation frequency is not brought to a negative voltage even in the case of being in any varying state, the addition circuit 2 and the reference voltage generating circuit 3 are unnecessary even in the second embodiment. Further, the frequency control voltage is directly supplied to a first input end of the switching circuit 5 and an input end of the polarity inversion circuit 4 respectively.
The triangular wave signal formed by the voltage controlled oscillator according to the second embodiment may be outputted as it is. If, however, a triangular wave-rectangular wave conversion circuit having a known configuration is connected between the output end of the integration circuit 6 and the oscillation signal output terminal 8 according to the usage purpose of the oscillation signal, or a waveform conversion circuit such as a triangular wave-sine wave conversion circuit is connected therebetween according to the usage purpose thereof in a manner similar to the first embodiment, then the waveform of the oscillation signal can be taken out as a rectangular wave signal waveform or a sinusoidal signal waveform.
Further, although the second embodiment also has explained the frequency control voltage supplied to the integration circuit 6 as being the constant dc voltage, the frequency control voltage needs not to be defined as the constant dc voltage. Even though the frequency control voltage is of a frequency control voltage that varies in voltage value with time, similar operations can be done. If one that varies in sinusoidal form is used as the frequency control voltage in particular, it is then possible to output a triangular wave signal frequency-modulated as an oscillation-outputted triangular wave signal.
While the preferred forms of the present invention have been described, it is to be understood that modifications will be apparent to those skilled in the art without departing from the spirit of the invention. The scope of the invention is to be determined solely by the following claims.
Number | Date | Country | Kind |
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2006-200745 | Jul 2006 | JP | national |