Patent Application
20160322972
The invention relates to the field of electronics in general, and more particularly, to voltage level shifting.
Voltage level shifting is sometimes used in electrical systems that include circuits that utilize different voltage levels. For example, in an electrical system that is controlled by a processor (such as a microcontroller), the processor may generate signals having voltage levels that vary between 0 volts and 3.3 volts, whereas circuitry external to the processor may have voltage levels that vary from 0-12 volts.
Embodiments according to the invention can provide voltage level shifting circuits for signals and/or power supply voltage levels using constant voltage circuit elements, lighting apparatuses, and method of operating the same.
Pursuant to these embodiments, a level shifting circuit can include a level shifting circuit input node that can be coupled to an input signal, where the input signal can be configured to switch between discrete voltage levels in an input voltage domain. A level shifting circuit output node of the level shifting circuit can be configured to provide shifted voltage levels that are shifted relative to the input signal responsive to switching of the input signal. A constant voltage element can have a first terminal that can be coupled to the level shifting circuit input node and can have a second terminal that can be coupled to the level shifting circuit output node. The constant voltage element can be configured to provide a constant voltage level shift to the input signal to provide the shifted voltage levels responsive to switching of the input signal between the discrete voltage levels in the first voltage domain.
Embodiments of the present inventive subject matter are described hereinafter with reference to the accompanying drawings, in which embodiments of the present inventive subject matter are shown. This present inventive subject matter may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the present inventive subject matter to those skilled in the art. Like numbers refer to like elements throughout.
The expression “lighting apparatus”, as used herein, is not limited, except that it indicates that the device is capable of emitting light. That is, a lighting apparatus can be a device which illuminates an area or volume, e.g., a structure, a swimming pool or spa, a room, a warehouse, an indicator, a road, a parking lot, a vehicle, signage, e.g., road signs, a billboard, a ship, a toy, a mirror, a vessel, an electronic device, a boat, an aircraft, a stadium, a computer, a remote audio device, a remote video device, a cell phone, a tree, a window, an LCD display, a cave, a tunnel, a yard, a lamppost, or a device or array of devices that illuminate an enclosure, or a device that is used for edge or back-lighting (e.g., back light poster, signage, LCD displays), bulb replacements (e.g., for replacing AC incandescent lights, low voltage lights, fluorescent lights, etc.), lights used for outdoor lighting, lights used for security lighting, lights used for exterior residential lighting (wall mounts, post/column mounts), ceiling fixtures/wall sconces, under cabinet lighting, lamps (floor and/or table and/or desk), landscape lighting, track lighting, task lighting, specialty lighting, ceiling fan lighting, archival/art display lighting, high vibration/impact lighting, work lights, etc., mirrors/vanity lighting, or any other light emitting device.
As appreciated by the present inventors, in some embodiments according to the invention, a voltage level shifting circuit may be realized utilizing a constant voltage element (such as a capacitor) coupled between an input to the voltage level shifting circuit and an output of the voltage level shifting circuit. In operation, the voltage level shifting circuit can shift the level of the input signal to a corresponding voltage level at the output of the voltage level shifting circuit. For example, when the input signal is at a low voltage, the voltage level shifting circuit can provide a constant voltage level shift to the input signal to provide a corresponding shifted voltage level for the output of the voltage level shifting circuit. When, however, the input signal switches to a high voltage level, the voltage level shifting circuit provides the same constant voltage level shift to provide a corresponding shifted voltage level for the output. Therefore, as the input signal switches between the high and low voltage levels, the voltage level shifting circuit can provide the same constant voltage level shift to the level of the input signal to provide shifted voltage levels at the output of the voltage level shifting circuit.
As used herein, the term “voltage domain” refers to a range of voltage levels that can be processed by circuits in that particular domain. Accordingly, signals that are appropriate for a particular “voltage domain” are processed using circuits that operate using the range of voltage levels appropriate for that particular “voltage domain.”
Still further, the term “input voltage domain” can refer to a voltage domain that is associated with an input of the voltage level shifting circuit, whereas the term “output voltage domain” refers to a voltage domain that is associated with an output of the voltage level shifting circuit. For example, in some embodiments according to the invention, an input voltage domain can be a range of voltages from about 0 volts DC to about 3.3 volts DC. In this example, circuits in the input voltage domain can process signals having voltage levels within the input voltage domain that represent, for example, high and low logic levels generated by the circuits in the input voltage domain.
For example, in some embodiments according to the invention, the input voltage domain described above can be embodied in a microcontroller such that a low logic level corresponds to about 0 volts whereas a high logic level can corresponds to about 3.3 volts. Therefore, when a low logic level is to be transmitted in the input voltage domain, the corresponding device may generate a voltage level of about 0 volts, whereas when a high logic level is to be transmitted in the input voltage domain, a voltage level of about 3.3 volts can be transmitted. It will be understood that these voltage levels are exemplary and other voltage levels may be used. Furthermore, the voltage levels described can correspond to voltage thresholds (minimum/maximum) that are specified for the voltage domain. For example, a 3.3 Volt voltage level may correspond to the minimum value that is recognized as a high logic level whereas 0 Volts may correspond to a maximum value that is recognized as a low logic level. Other correspondence, such as nominal logic levels, may be used.
In contrast, an output voltage domain can be represented by a different range of voltage levels relative to the input voltage domain. It will be further understood that the output voltage domain can be either scaled up or scaled down relative to the input voltage domain. In other words, the range of voltages included in the output voltage domain may be greater than those in the input voltage domain or less than those in the input voltage domain. Still further, it will be understood that the output voltage domain can include a range of voltage levels that are amplified relative to those voltage levels in the input voltage domain which correspond to the output voltage domain. For example, in some embodiments according to the invention, the output voltage domain may support voltage levels from about 0 volts (corresponding to a low logic level) to 12 volts DC (corresponding to a high logic level) in the output voltage domain. Accordingly, the voltage levels included in the input signal (in the input voltage domain) can be amplified (by use of the voltage level shifting circuit) to corresponding voltage levels within the output voltage domain. For example, a low logic level of 0 volts in the input voltage domain can be amplified to 0 volts in the output voltage domain, whereas a voltage level of about 3.3 volts in the input voltage domain can be amplified to a voltage level of about 12 volts DC in the output voltage domain.
The term “constant,” when used to refer to a voltage level shift, can include small variations in the voltage level which can be attributed to, for example, variation in circuit elements used to implement the voltage level shifting circuit in some embodiments according to the invention. Accordingly, the term “constant” when used to refer to a voltage level shift will be understood to include values which are substantially or about equal to one another.
As used herein, the term “discrete voltage levels” refers to voltage levels within a particular voltage domain which correspond to logic levels in that domain. For example, in some embodiments according to the invention, the discrete voltage levels included in the input voltage domain can refer to voltage levels that correspond to a logical low level and to voltage levels that correspond to a logical high level.
For example, in operation, the capacitor C provides a constant voltage shift Vshift to the input signal Vin to provide the voltage levels for the signal Vout. Accordingly, the capacitor C shifts the low voltage level of the input signal Vin by Vshift to provide the low voltage level for the output signal Vout. The capacitor C also provides the constant voltage level shift Vshift to the high voltage level of the input signal Vin to provide the high voltage level of the output signal Vout. Accordingly, during switching of the input signal Vin, the capacitor C provides the constant voltage level shift Vshift to the input signal to provide the voltage levels associated with the output signal Vout.
As illustrated in
In order to keep the voltage across the capacitor C1 constant during switching of the input signal, the value of the capacitor C1 can be selected to be relatively large compared to a parasitic capacitance of the inputs of the PMOS and NMOS transistors Qp and Qn. For example, in some embodiments, the capacitance value of C1 can be about at least 5 times greater than the parasitic capacitance of the input of the load coupled to the level shifting circuit output node (such as the PMOS and NMOS transistors Qp and Qn). In some embodiments, the capacitance value of C1 can be about at least 10 times greater than the parasitic capacitance of the input of the load coupled to the level shifting circuit output node.
Furthermore, the value of the Resistor R1 can be selected in conjunction with the value of the Capacitor C1 to provide a sufficiently large RC time constant so that the voltage across the capacitor C1 remains constant despite the switching of the input signal Vin. In other words, a sufficiently large RC time constant can provide for the voltage across the capacitor C1 to remain constant during switching of the input signal Vin so that the shift provided to the output signal Vout remains constant during switching of the input signal Vin. In some embodiments according to the invention, the RC time constant is large relative to the switching frequency of the input signal Vin (i.e., 1/switching period of the input signal Vin).
In operation, the voltage level shifting circuit 105 provides a constant voltage level shift Vshift to the signal provided by unit 1 as the input signal which varies between GND1 and Vcc to provide a voltage level V2 at an output node of the voltage level shifting circuit 105. The voltage level shifting circuit 105 shifts the voltage V2 to provide discrete voltage levels GND2 as the low logic level and GND2+Vuc as the high logic level in the output voltage domain in some embodiments according to the invention.
The boost converter circuit can provide a switched mode power supply that operates under the control of a pulse width modulated signal GD provided by a gate-drive circuit in some embodiments according to the invention. It will be understood that the pulse width modulated signal GD from the gate-drive circuit operates in the output voltage domain. As further shown in
It will be understood that although
It will also be understood that the LEDs can have the same spectral characteristics (e.g. color) or can have spectral characteristics that are different. For example, the LEDs in a parallel/series combination can have any combination of spectral characteristics. The LEDs in the string(s) may be configured in a number of different ways and may have various compensation circuits associated therewith, as discussed, for example, in commonly assigned co-pending U.S. Patent Application Publication No. 2013/0069535 (Attorney Docket: 5308-1459) and U.S. Patent Application Publication No. 2013/0069536 (Attorney Docket 5308-1461).
Referring to
The lighting apparatus 10 can generally include a can shaped outer housing 12 in which a lighting panel 20 is arranged. In
Similarly, the combination of the capacitor C2, the resistor R2 and the diode D2 in the second voltage level shifting circuit 105B can provide a constant voltage element so that a constant voltage level shift Vshift2 can be provided between the input node A of the second voltage level shifting circuit 105B and an output node C of the second voltage level shifting circuit 105B, which is coupled to the base of a transistor Qn. The diode D1 can be configured to prevent the voltage at the base of transistor Qp from exceeding Vcc, which also defines Vshift to be Vcc less Vuc.
In operation, when the input signal Vin varies between a voltage level of 0 volts (for a low logic level) and Vuc (corresponding to a high logic level), a first shifted voltage level VQpg provided at the gate of the transistor Qp (i.e., the output of the first voltage level shifting circuit 105A) varies from a low voltage level of about Vcc−Vuc and Vcc in response to the different states of the PMOS and NMOS transistors Qp and Qn, respectively. Further, a second shifted voltage level VQng provided at the gate of the transistor Qn (i.e., the output of the second voltage level shifting circuit 105B) varies from a low voltage level of about Vss and Vss+Vuc. Accordingly, as the input voltage toggles between 0 to Vcc, the transistor Qp is toggled on/off and Qn is toggled off/on so that the output signal Vout is inverted relative to the input signal Vin and is amplified to vary between a voltage level of about Vcc and Vss (i.e., amplified into the output voltage domain) responsive to the switching of the input signal Vin (in the input voltage domain). Accordingly, when the input signal Vin varies between 0 volts and about 3.3 volts, the output signal Vout can vary between about +12 volts DC and −12 volts DC when the Vcc power supply is equal to about 12 volts DC and Vss power supply is equal to about −12 volts DC.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present inventive subject matter. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present.
It will be understood that when an element or layer is referred to as being “on” another element or layer, the element or layer can be directly on another element or layer or intervening elements or layers may also be present. In contrast, when an element is referred to as being “directly on” another element or layer, there are no intervening elements or layers present. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
Spatially relative terms, such as “below”, “beneath”, “lower”, “above”, “upper”, and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. It will be understood that the spatially relative terms are intended to encompass different orientations of the device in use or operation, in addition to the orientation depicted in the figures. Throughout the specification, like reference numerals in the drawings denote like elements.
Embodiments of the inventive subject matter are described herein with reference to plan and perspective illustrations that are schematic illustrations of idealized embodiments of the inventive subject matter. As such, variations from the shapes of the illustrations as a result, for example, of manufacturing techniques and/or tolerances, are to be expected. Thus, the inventive subject matter should not be construed as limited to the particular shapes of objects illustrated herein, but should include deviations in shapes that result, for example, from manufacturing. Thus, the objects illustrated in the figures are schematic in nature and their shapes are not intended to illustrate the actual shape of a region of a device and are not intended to limit the scope of the inventive subject matter.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present inventive subject matter. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” “comprising,” “includes” and/or “including” when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this present inventive subject matter belongs. It will be further understood that terms used herein should be interpreted as having a meaning that is consistent with their meaning in the context of this specification and the relevant art and will not be interpreted in an idealized or overly formal sense unless expressly so defined herein. The term “plurality” is used herein to refer to two or more of the referenced item.
It will be understood that, as used herein, the term light emitting diode may include a light emitting diode, laser diode and/or other semiconductor device which includes one or more semiconductor layers, which may include silicon, silicon carbide, gallium nitride and/or other semiconductor materials, a substrate which may include sapphire, silicon, silicon carbide and/or other microelectronic substrates, and one or more contact layers which may include metal and/or other conductive layers.
In the drawings and specification, there have been disclosed typical preferred embodiments of the inventive subject matter and, although specific terms are employed, they are used in a generic and descriptive sense only and not for purposes of limitation, the scope of the inventive subject matter being set forth in the following claims.
