Patent Grant
7315095
1. Field of the Invention
The present invention relates to a voltage regulating apparatus and a voltage regulating method and, more particularly, to a technology for controlling a drive voltage supplied to a target load.
2. Description of the Related Art
Battery-driven portable equipment such as cell phones and personal data assistants (PDA) use light-emitting diodes (LED) for a variety of purposes. For example, LEDs are used as backlight of a liquid crystal display (LCD) or an electronic flash light for a charge-coupled device (CCD) camera. LEDs emitting different colors are operated to blink for illumination. In order to drive an LED, a battery voltage of about 3.6V of, for example, a lithium ion battery should be boosted to a drive voltage of about 4.5V. When the battery voltage drops due to battery consumption, the battery voltage should be boosted by a higher step-up ratio.
Thus, in order to maintain the proper driving status of the target load such as an LED, the step-up ratio should be properly controlled in accordance with the operating environment. For example, a patent document No. 1 discloses a rear combination lamp apparatus for vehicle use that controls the step-up ratio so that a drive voltage of about 16V continues to be supplied to an LED unit comprising 8 LEDs connected in series when the battery voltage in the vehicle drops.
[Patent Document No. 1]
Japanese Published Patent Application No. 2003-187614
Some cell phones available these days comprise loads, such as a plurality of LEDs connected in parallel. The technology of the patent document No. 1 cannot be applied to such equipment. A new perspective is required in regard to the control of drive voltage supplied to loads such as a plurality of LEDs.
The present invention has been done in view of the aforementioned circumstances and its object is to enable a driving status in which a plurality of loads are properly driven and to provide a voltage regulating apparatus and a voltage regulating method for effectively controlling the drive voltage supplied to the loads.
The present invention according to one aspect provides a voltage regulating apparatus. The voltage regulating apparatus according to this aspect comprises: a voltage supplying circuit which applies a drive voltage to an end of each of a plurality of loads; a mount checking circuit which checks, load by load, to determine whether each of the plurality of loads is mounted; a monitoring circuit which monitors a voltage occurring at the other end of each of the plurality of loads as a result of applying the drive voltage or which monitors an associated voltage, the monitoring being done load by load; and a boost control circuit which increases the drive voltage output from the voltage supplying circuit when it is determined as a result of the monitoring by the monitoring circuit that the monitored voltage drops below a preset voltage. The monitoring circuit invalidates the monitoring on a load determined to be unmounted as a result of the checking by the mount checking circuit, so as to prevent a result of monitoring on the load unmounted from affecting the control on the drive voltage by the boost control circuit.
According to this aspect, the result of monitoring of a load not mounted is prevented from causing the step-up ratio to vary.
The mount checking circuit may check a voltage at a monitored terminal monitored by the monitoring circuit, the checking being done on an assumption that the voltage is fixed at a predetermined value in a situation where a load is not connected to the monitored terminal.
By connecting the monitored terminal to a terminal fixed at a predetermined level of voltage such as a ground potential or a power supply voltage when the load is not mounted, a determination on the mounting status can be made by referring to the voltage at the monitored terminal.
The mount checking circuit may be provided with a plurality of voltage comparators which compare, for each of the plurality of loads, the voltage at the monitored terminal with a predetermined threshold voltage and may determine that a load is not connected to the monitored terminal when the voltage at the monitored terminal is lower.
The mount checking circuit may perform the checking during a predetermined period of time and may further be provided with a latch circuit which holds a result of checking. The monitoring circuit may validate or invalidate the monitoring in accordance with an output from the latch circuit on a continuous basis. The predetermined period of time may be a period required for the apparatus to make a transition in operating mode.
The monitoring circuit may monitor a voltage applied to each of a plurality of constant current circuits each connected in series with a corresponding one of the plurality of loads. With this, it is possible to prevent a situation in which the voltage applied to the constant current circuit drops to disable a predetermined constant current to be generated and to cause the current through the load to vary.
The monitoring circuit may be provided with a plurality of voltage comparators each of which compares the voltage applied to a corresponding one of the plurality of constant current circuits with the preset voltage.
The mount checking circuit and the monitoring circuit may time-share a single comparator for a given one of the plurality of loads. By allowing the mount checking circuit and the monitoring circuit to check and monitor the voltage occurring at the same terminal, only one set of voltage comparators need to be provided.
The voltage at the monitored terminal may be input to one input terminal of the single comparator for the given one of the plurality of loads, and one of a reference voltage to be used in the monitoring circuit and a reference voltage to be used in the mount checking circuit may switchably be input to the other input terminal.
The present invention according to another aspect provides an electronic equipment. The electronic equipment is provided with a plurality of light-emitting devices and a voltage regulating apparatus which drives the plurality of light-emitting devices. In this equipment unit, the plurality of light-emitting devices can be driven in a stable manner.
The present invention according to another aspect encompasses an apparatus as follows. The voltage regulating apparatus according to this aspect comprises: a voltage supplying circuit which applies a drive voltage to an end of each of a plurality of loads; a mount checking circuit which checks, load by load, to determine whether each of the plurality of loads is mounted at a position to receive the drive voltage; a monitoring circuit which monitors a voltage occurring at the other end of each of the plurality of loads as a result of applying the drive voltage or which monitors an associated voltage, the monitoring being done load by load; and a boost control circuit which increases the drive voltage when it is determined as a result of the monitoring by the monitoring circuit that the voltage occurring at the other end or the associated voltage drops below a preset voltage. The monitoring circuit invalidates the monitoring by the monitoring circuit on a load determined to be unmounted as a result of checking, so as to prevent the monitoring circuit from affecting the boosting operation by the boost control circuit. According to this aspect, it is ensured that the drive voltage is increased by referring to the results of monitoring of the loads determined to be mounted. Accordingly, effective control of the drive voltage is achieved.
The mount checking circuit may perform the checking on an assumption that a voltage, at a position to which an unmounted load should otherwise be connected, is fixed at a predetermined value. With this, the checking may be done on an assumption that the load determined to be unmounted is connected to the ground potential or a power supply potential. The mount checking circuit may perform the checking during a predetermined period of time and may further be provided with a latch circuit which holds a result of checking. The monitoring circuit may validate or invalidate the monitoring in accordance with an output from the latch circuit on a continuous basis. The mount checking circuit and the monitoring circuit may time-share a single comparator for a given one of the plurality of loads. With this, it is not necessary to provide comparators for each of the mount checking circuit and the monitoring circuit. Accordingly, the required space is reduced. The predetermined period of time may be a period required for the apparatus to make a transition in operating mode.
The present invention according to yet another aspect provides a voltage regulating method. The voltage regulating method according to this aspect comprises the steps of: monitoring a driving status of a plurality of loads to determine whether each of the plurality of loads is properly driven; increasing a drive voltage when it is determined that the driving status is improper; checking to determine whether each of the plurality of loads is mounted at a position to receive the drive voltage; and invalidating the monitoring on a load determined to be unmounted as a result of the checking, so as to prevent a result of monitoring on the load unmounted from affecting the control on the drive voltage. With this, it is ensured that the drive voltage is increased by referring to the results of monitoring of the loads determined to be mounted. Accordingly, effective control of the drive voltage is achieved.
It is to be noted that any arbitrary combination or rearrangement of the above-described structural components and so forth are all effective as and encompassed by the present embodiments. Moreover, this summary of the invention does not necessarily describe all necessary features so that the invention may also be sub-combination of these described features.
The invention will now be described based on preferred embodiments which do not intend to limit the scope of the present invention but exemplify the invention. All of the features and the combinations thereof described in the embodiment are not necessarily essential to the invention.
Before describing the present invention in detail, a summary will be given. A voltage regulating apparatus according to the first embodiment is provided inside a large scale integration (LSI), which is built in battery-driven portable electronic equipment such as cell phones and PDAs. The inventive apparatus boosts the battery voltage of a lithium ion battery or a battery of any of other types so as to supply a drive voltage to a plurality of LEDs used, for example, as backlight of an LCD. The LEDs emit with light colors including red, green and blue when the drive voltage is applied to the LEDs. When a lithium ion battery or a battery of any of other types is consumed, the battery voltage drops, with the result that the proper driving status of the LEDs cannot be maintained. The inventive apparatus boosts the battery voltage with a higher step-up ratio so that the proper driving status of the LEDs is maintained.
As mentioned before, the LSI that includes the voltage regulating apparatus is built, for example, in portable equipment for its use. There is an understanding as described below between a designer of the LSI (for example, an LSI manufacturer) and a designer of a set such as a cell phone (for example, a set manufacturer). In designing the set, the set manufacturer connects LEDs to a terminal of the LSI. According to this understanding, when an LED is not mounted at a position to receive a drive voltage, the LSI manufacturer could require, in the form of LSI specification, the set manufacturer to connect an LSI terminal, which otherwise should be connected to the cathode of the LED, to the ground on a printed board. In accordance with this requirement, the LSI manufacturer connects the LSI terminal to the ground.
During a predetermined period of time (hereinafter, simply referred to as “a soft start period”) after a power button of a portable equipment unit inclusive of the apparatus is held down (hereinafter, simply referred to as “power-on”), the apparatus checks LED by LED (hereinafter, simply referred to as “mount checking process”) to determine whether the LED is mounted at a position to receive a drive voltage. The phrase “soft start period” refers to a period that starts at power-on and elapses until the apparatus makes a transition to a state in which the apparatus is capable of a normal boost operation for boosting the drive voltage and supplying the boosted voltage to the LEDs.
After the soft start period, the apparatus monitors LED by LED to determine the driving status of a plurality of LEDs. For example, the apparatus monitors to find whether the LEDs emit with proper luminance (hereinafter, such monitoring will be referred to as “drive monitoring process”. If it is found as a result of the drive monitoring process that the driving status of at least one of the LEDs is improper, the apparatus increases the drive voltage. In this process, the drive monitoring process on an LED determined to be unmounted as a result of the mount checking process is invalidated. With this, the result of the drive monitoring process on an LED determined to be unmounted is prevented from invoking the increasing of the drive voltage.
The voltage regulating apparatus 100 is provided with: the charge pump circuit 12 for boosting an input voltage Vin by a preset step-up ratio; a regulator circuit 15 for maintaining the input voltage Vin input to the charge pump circuit 12 at a constant level; an oscillator circuit 16 for supplying a pulse signal to the charge pump circuit 12; a control circuit 110 for switching between step-up ratios in accordance with a result of the mount checking process and a result of the drive monitoring process; a soft start circuit 120 for performing time-division control on the control circuit 110; a voltage drop register 130 for switching the step-up ratio set in the charge pump circuit 12 to a lower step-up ratio in accordance with an externally supplied signal; constant current circuits 14a-14d for controlling currents through the LEDs 13a-13d to be constant; and a constant current control unit 140 for designating the value of the constant current generated by the constant current circuits 14a-14d. Those of the elements described above that require resetting to an initial state are reset at power-on or when a predetermined condition is fulfilled.
The regulator circuit 15 includes an operational amplifier implemented by a differential amplifier and an output transistor having its gate voltage controlled by the operational amplifier. The regulator circuit 15 lowers the battery voltage Vbat and supplies the input voltage Vin to the charge pump circuit 12. The regulator circuit 15 compares the output voltage Vout of the charge pump circuit 12 with a reference voltage Vref so as to control the input voltage Vin of the charge pump circuit 12 such that a difference is eliminated. An end of a smoothing capacitor C3 is connected to a node between the regulator circuit 15 and the charge pump circuit 12 via CPIN terminal. The other end of the smoothing capacitor C3 is grounded.
The charge pump circuit 12 functions as a voltage supply circuit that supplies the drive voltage to one end, i.e., a first end, of each of a plurality of loads, i.e. the plurality of LEDs 13. A first boost capacitor C1 and a second boost capacitor C2 are connected to the charge pump circuit 12 via four terminals including C1P terminal, C1M terminal, C2P terminal and C2M terminal. At the end of the soft start period, the step-up ratio of the charge pump circuit 12 is set to 1.0. Further, the charge pump circuit 12 achieves step-up ratios of 1.5 and 2.0 by subjecting the first boost capacitor C1 and the second boost capacitor C2 to switching control according to a predetermined pattern, using the pulse signal from the oscillator circuit 16 described later. The oscillator circuit 16 generates a pulse of a preset frequency and supplies the same to the charge pump circuit 12. When the output voltage Vout of the charge pump circuit 12 exceeds the reference voltage Vref, the regulator circuit 15 lowers the input voltage Vin input to the charge pump circuit 12. When the output voltage Vout drops below the reference voltage Vref, the regulator circuit 15 regulates the input voltage Vin to increase it. Thus, the output voltage Vout of the charge pump circuit 12 are maintained at a constant level. The output voltage Vout of the charge pump circuit 12 is output as a drive voltage VA via CPOUT terminal and supplied to the LEDs 13a-13d.
The drive voltage VA output from the voltage regulating apparatus 100 is applied to the anode terminals of the LEDs 13a-13d for light emission.
Each of the constant current circuits 14a-14d is provided for a corresponding one of the LEDs 13a-13d. One end of each of the constant current circuits 14a-14d is connected to the cathode, i.e., a second end, of the corresponding one of the LEDs 13a-13d via a corresponding one of LEDa-LEDd terminals. The other end of each of the constant circuits 14a-14d is grounded. As described above, the constant circuits 14a-14d control the current through the LEDs 13a-13d to be constant. In accordance with a direction from the constant current control unit 140, each of the constant current circuits 14a-14d generates a constant current of, for example, 1 mA, 10 mA, 15 mA and 20 mA. Each of the constant current circuits 14a-14d is capable of generating a designated constant current when the voltage at LEDa-LED d terminals is higher than a predetermined preset voltage. On the contrary, when the voltage at LEDa-LEDd terminals is lower than the preset voltage, the designated constant current cannot be generated due to saturation of transistors internally used. When constant current control is disabled, flicker or insufficient luminance of the LEDs 13a-13d results. According to this embodiment, the above-mentioned preset voltage is referred to as a boost reference voltage and is configured to be, for example, 0.3V.
The control circuit 110 performs the mount checking process for each of the LEDs during the soft start period and stores results of checking. The mount checking process according to this embodiment is such that the potential VC at LEDa-LEDd terminals (hereinafter, simply referred to as an LED terminal voltage) is compared with a predetermined voltage (hereinafter, simply referred to as a mount reference voltage). When it is found that the LED terminal voltage VC is below the mount reference voltage, the control circuit 110 determines that the LED to be connected to that LED terminal is not mounted. In this embodiment, the mount reference voltage is a voltage in the neighborhood of the ground potential. For example, the mount reference voltage is set to 0.15V. When the LED terminal voltage VC is below the mount reference voltage of 0.15V, it is determined that a corresponding one of LEDa-LEDd terminals is grounded by the set manufacturer. When this determination is made, a corresponding one of the LEDs 13a-13d connected to the grounded LED terminal, i.e., one of LED terminals 13a-13d, can be excluded from the drive monitoring process. The mount reference voltage may be a predetermined fixed potential. In this embodiment, the mount reference voltage is configured to be lower than the boost reference voltage.
After the soft start period, the control circuit 110 performs the drive monitoring process on each of the LEDs. If it is determined that the driving status of at least one LED of the LEDs 13a-13d is improper, the control circuit 110 directs the step-up ratio of the charge pump circuit 12 to be increased. The drive monitoring process according to this embodiment is a process for comparing the LED terminal voltage VC with the boost reference voltage. When the LED terminal voltage VC at any of the terminals drops below the boost reference voltage, the control circuit 110 sends out a boost signal SEL1 at a high level so as to increase the step-up ratio of the charge pump circuit 12. In this process, the control circuit 110 invalidates the drive monitoring process on an LED determined to be unmounted by referring to the results of checking stored in the soft start period. With this, the result of the drive monitoring process on the LED determined to be unmounted is prevented from affecting the control of the step-up ratio of the charge pump circuit 12.
The soft start circuit 120 directs the control circuit 110 to perform the mount checking process during the soft start period and to perform the drive monitoring process after the soft start period. Moreover, the soft start circuit 120 controls the control circuit 110 to store the results of the mount checking process during the soft start period and to maintain the results after the soft start period.
When there is a direction from external software (not shown) to lower the step-up ratio, the voltage drop register 130 sends a voltage drop signal SEL2 at a high level so as to lower the step-up ratio of the charge pump circuit 12. A data signal DATA and a command signal CMD are input to the voltage register 130 via DATAP terminal and CMDP terminal of the voltage regulating apparatus 100, respectively. When the command signal CMD is a write command and the data signal DATA is at a high level, “1” is written in the voltage drop register 130. In this state, the voltage drop register 130 directs the charge pump circuit 12 to lower the step-up ratio. When the step-up ratio of 1.0 is set in the charge pump circuit 12, the external software does not direct the voltage drop register 130 to lower the step-up ratio.
When the external software (not shown) directs setting of the value of the constant current fed through the LEDs 13a-13d or directs a change thereof, the constant current control unit 140 directs the constant current circuits 14 to feed the constant current of the designated value. In this way, the value of the constant current fed through the LEDs 13a-13d is set or changed. The direction from the constant current control unit 140 is provided in the form of the data signal DATA and the command signal CMD input via DATAP terminal and CMDP terminal, respectively.
When the external software issues a direction (hereinafter, simply referred to as a current change direction) designating a change from a large constant current to a small constant current, i.e., a change from, for example, 20 mA to, for example, 1 mA, the external software also issues an direction for causing the voltage drop register 130 to lower the step-up ratio, in addition to the current change direction. Since a change from a large constant current to a small constant current causes the voltage drop due to the constant current fed through the LEDs 13a-13d to be lowered, the lowering of the step-up ratio is necessary to maintain the stable operation of the voltage regulating apparatus 100. In the following, the process flow in the voltage regulating apparatus 100 will be described.
During the soft start period, the voltage regulating apparatus 100 performs the mount checking process by comparing the LED terminal voltage VC with the mount reference voltage and stores results of checking (S14). After the soft start period, the step-up ratio of the charge pump circuit 12 is automatically set to 1.0.
When the step-up ratio of the charge pump circuit 12 is set to 1.0 and a current change direction is issued (Y of S16), the external software does not provide a direction to lower the step-up ratio, as described before. The step-up ratio of 1.0 is maintained (S18). In the absence of a current change direction (N of S16), the control circuit 100 performs the drive monitoring process by comparing the LED terminal voltage VC with the boost reference voltage (S20). When it is determined that the driving status of each of the LEDs 13a-13d is proper (Y of S20), a determination is made again as to whether a current change direction is issued (S16). When it is determined that the driving status of at least one of the LEDs 13a-13d is improper (N of S20), the control circuit 110 sends out the boost signal SEL1 at a high level to the charge pump circuit 12 (S22). In accordance with this, the step-up ratio is switched from 1.0 to 1.5.
When the step-up ratio of the charge pump circuit 12 is set to 1.5 and a current change direction is issued (Y of S16), the voltage drop register 130 sends out the voltage drop signal SEL2 at a high level in response to a direction from the external software to lower the step-up ratio. In accordance with this, the step-up ratio is switched from 1.5 to 1.0. In the absence of a current change direction (N of S16), the control circuit 100 performs the drive monitoring process by comparing, LED by LED, the LED terminal voltage VC with the boost reference voltage. When it is determined that the driving status of each of the LEDs 13a-13d is proper (Y of S20), a determination is made again as to whether a current change direction is issued (S16). When it is determined that the driving status of at least one of the LEDs 13a-13d is improper (N of S20), the control circuit 110 sends out the boost signal SEL1 at a high level to the charge pump circuit 12. In accordance with this, the step-up ratio is switched from 1.5 to 2.0.
When the step-up ratio of the charge pump circuit 12 is set to 2.0 and a current change direction is issued (Y of S16), the voltage drop register 130 sends out the voltage drop signal SEL2 at a high level in response to a direction from the external software to lower the step-up ratio. In accordance with this, the step-up ratio is switched from 2.0 to 1.5. In the absence of a current change direction (N of S16), the control circuit 100 performs the drive monitoring process by comparing, LED by LED, the LED terminal voltage VC with the boost reference voltage. When it is determined that the driving status of each of the LEDs 13a-13d is proper (Y of S20), a determination is made again as to whether a current change direction is issued (S16). When it is determined that the driving status of at least one of the LEDs 13a-13d is improper (N of S20), the control circuit 110 does nothing so that the step-up ratio of 2.0 is maintained (S22).
The control circuit 110 is provided with: first through fourth comparison processing units 151a-151d respectively provided for the LEDs 13a-13d; an OR gate 162 generating a logical OR of outputs from the first through fourth comparison processing units 151a-151d; a mount detection register 152 for holding results of the mount checking process; a selector 156 which selects a mount reference voltage VGND input to a first selector input terminal A or a boost reference voltage VSAT input to a second selector input terminal B, in accordance with a signal supplied from the soft start circuit 120, and which sends out the selected voltage to the first comparators 154a-154d described later; and a digital filter 102.
The first comparison processing unit 151a is provided with a first AND gate 158a and a first comparator 154a. The AND gate 158a outputs a high level when a high level is input to a first input terminal I1, a low level is input to a second input terminal I2 and a low level is input to a third input terminal I3.
The first comparator 154a performs the mount checking process and the drive monitoring process on a time division basis. More specifically, during the soft start period, the first comparator 154a compares the LED terminal voltage VC of the LED 13a with the mount reference voltage VGND. After the soft start period, the first comparator 154a compares the LED terminal voltage VC of the LED 13a with the boost reference voltage VSAT. The result of comparison by the first comparator 154a is input to the second input terminal I2 of the first AND gate 158a and also to the mount detection register 152 described later.
The first input terminal I1 of the first AND gate 158a receives a signal from the mount detection register 152. The second input terminal I2 receives a signal from the first comparator 154a. The third input terminal I3 receives a signal from the soft start circuit 120. The first AND gate 158a outputs a logical AND of the signals. The structure of each of the second through fourth comparison processing units 151b-151d is similar to that of the first comparison processing unit 151a.
The selector 156 selects the mount reference voltage VGND and supplies it to the inverting input of each of the first comparators 154a-154d, when a high-level signal is input from the soft start circuit 120 during the soft start period. The selector 156 selects the boost reference voltage VSAT and supplies it to the inverting input of each of the first comparators 154a-154d, when a low-level signal is input during the soft start period. The mount detection register 152 stores results of checking from the first comparators 154a-154d when the soft start period is terminated by switching. The stored results are latched in the mount detection register 152. More specifically, the mount detection register 152 functions as a latch circuit that permanently holds the results of mount checking stored during the soft start period. The drive monitoring process after the soft start period continues to be invalidated or validated in accordance with the latched result.
The OR gate 162 sends out a logical OR of the inputs from the first through fourth comparison processing units 151a-151d as the boost signal SEL1 to the charge pump circuit 12 via the digital filter 102. The digital filter 102 is provided to ensure that the result of the drive monitoring process, produced in a case where the LED terminal voltage VC drops temporarily below the boost reference voltage VSAT as a result of a temporary undershoot current occurring in a corresponding one of the LEDs 13a-13d, from affecting the control of the step-up ratio. More specifically, a signal not maintained at a high level or a low level for a predetermined period of time is prohibited by the digital filter 102 from triggering the step-up ratio control. A description will now be given of the operation of the control circuit 110 according to this embodiment.
During the soft start period, the control circuit 110 performs the mount checking process on each of the LEDs and stores the results of checking. More specifically, during the soft start period, the selector 156 supplies the mount reference voltage VGND to the inverting input of the first comparators 154a-154d in accordance with a high-level signal from the soft start circuit 120. Each of the first comparators 154a-154d performs the mount checking process by comparing the LED terminal voltage VC of the corresponding one of the LEDs 13a-13d, with the mount reference voltage VGND. The result of checking is stored in the mount detection register 152 and latched in that state. During the soft start period, a high-level signal is input to the third input terminal I3 of each the first AND gates 158a-158d. Therefore, the output from each of the first AND gates 158a-158d is at a low level. This causes the boost signal SEL1 to be at a low level. Accordingly, the control for increasing the step-up ratio is not performed during the soft start period.
After the soft start period, the control circuit 110 performs the drive monitoring process on each of the LEDs. In this process, the control circuit 110 invalidates the drive monitoring process on an LED determined to be unmounted so as to prevent the result of the drive monitoring process on the LED not mounted from affecting the control for increasing the step-up ratio. More specifically, after the soft start period, the selector 156 supplies the boost reference voltage VSAT to the inverting input of each of the first comparators 154a-154d in response to a low-level signal from the soft start circuit 120. Each of the first comparators 154a-154d performs the drive monitoring process by comparing the LED terminal voltage VC of the corresponding one of the LEDs 13a-13d with the boost reference voltage VSAT.
The checking result is input to the first input terminal I1 of each of the first AND gates 158a-158d. The checking result is input to the second input terminal I2. A low level is input to the third input terminal I3. The step-up ratio of the charge pump circuit 12 is controlled in accordance with a logical AND of these. In this state, the first AND gates 158a-158d is capable of invalidating the drive monitoring process on an LED determined to be unmounted so as to prevent the result of the drive monitoring process on that LED from affecting the control for increasing the step-up ratio.
According to the voltage regulating apparatus 100 of this embodiment, the drive voltage is increased by referring to the results of monitoring of the LEDs determined to be mounted. Accordingly, effective control of the drive voltage is achieved. As described before, the drive monitoring process on the LED determined to be unmounted is invalidated. With this, the control circuit 110 is prevented from detecting a failure and allowing the step-up ratio to be increased, when an LED is not mounted at a position to receive a drive voltage. By allowing the first comparators 154a-154d to be time-shared by the mount checking process and the drive monitoring process, the required space and the cost are reduced. By performing the mount checking process during the soft start period that starts at power-on and elapses until the voltage regulating apparatus makes a transition to a state in which it is capable of a normal boost operation, the drive voltage can be immediately boosted in accordance with the results of monitoring of loads being mounted, when the apparatus makes a transition to the normal boosting operation.
Correspondence between different ways to refer to the elements constituting the invention and the first embodiment will be described. The “mount checking circuit” generically corresponds to the first comparators 154a-154d and the mount detection register 152. The “monitoring circuit” also corresponds to the first comparators 154a-154d. The “boost control circuit” corresponds to the OR gate 162.
The control circuit 110 is provided with first through fourth comparison processing units 153a-153d respectively provided for the LEDs 13a-13d, a NAND gate for calculating a logical NAND of outputs from the first through fourth comparison processing units 153a-153d, and the digital filter 102. The second and third comparison processing units 153b and 153c are omitted from the illustration.
The first comparison processing unit 153a is provided with: a second comparator 164a for comparing the LED terminal voltage VC of the LED 13a with the mount reference voltage VGND; a third comparator 166a for comparing the LED terminal voltage VC of the LED 13a with the boost reference voltage VSAT; a second AND gate 168a for outputting a logical AND of a signal input to a fourth input terminal I4 from the second comparator 164a and a signal input to a fifth input terminal I5 from the third comparator 166a; a first transistor Tr1a in a common source mode having its gate connected to an output terminal of the second AND gate 168a; a pull up resistor Ra and a power supply line Vcc. A power supply voltage Vcc is applied to the drain of the first transistor Tr1a via the pull up resistor Ra. In this embodiment, the second comparator 164a performs the mount checking process. The third comparator 166a performs the drive monitoring process. The NAND gate 170 controls the step-up ratio. The second through fourth comparison processing units 153b-153d and the first comparison processing units 153a are similarly constructed.
The NAND gate 170 sends out a logical NAND of the signals output from the first through fourth comparison processing units 153a-153d as the boost signal SEL1 to the charge pump circuit 12 via the digital filter 102. More specifically, the NAND gate 170 boosts the step-up ratio of the charge pump circuit 12 by sending out the boost signal SEL1 at a high level when any of the input signals is at a low level. The operation in the mount checking process and the drive monitoring process in the control circuit 110 according to the second embodiment will be described by taking an example of LED 13a.
The second comparator 164a performs the mount checking process by comparing the LED terminal voltage VC of the LED 13a with the mount reference voltage VGND. When the LED terminal voltage VC of the LED 13a drops below the mount reference voltage VGND, it is determined that the LED 13a is not mounted. In this state, the signal input to the fourth input terminal I4 is at a low level. Therefore, the drive monitoring process in the third comparator 166a is invalidated.
When the driving status of the LED 13a is proper, i.e., when the LED terminal voltage VC of the LED 13a exceeds the boost reference voltage VSAT, a high-level signal is input to the fourth input terminal I4 of the second AND gate 168a and a low-level signal is input to the fifth input terminal I5 thereof. As a result, the first transistor Tr1a is turned off so that a high-level signal from the power supply line Vcc is input to the NAND gate 170. That is, if the driving status is proper, an increase in the step-up ratio is not invoked.
When the driving status of the LED 13a is improper, i.e., when the LED terminal voltage of the LED 13a drops below the boost reference voltage VSAT, the signal input to the fifth input terminal I5 is at a high level. As a result, the first transistor Tr1a is turned on so that a low-level signal is input to the NAND gate 170. That is, if the driving status is improper, an increase in the step-up ratio is invoked.
Thus, the monitoring by the third comparator 166a on the LED13a determined to be unmounted as a result of the mount checking process by the second comparator 164a is invalidated. That is, the result of the drive monitoring process by the third comparator 166a is prevented from invoking an increase in the step-up ratio. With this, it is ensured that the drive voltage is increased by referring to the results of monitoring of the LEDs determined to be mounted. Accordingly, effective control of the drive voltage is achieved.
Correspondence between different ways to refer to the elements constituting the invention and the second embodiment will be described. The “mount checking circuit” corresponds to the second comparators 164a-164d. The “monitoring circuit” corresponds to the third comparators 166a-166d. The “boost control circuit” corresponds to the NAND gate 170.
A difference between the third embodiment and the second embodiment is that the mount checking process and the drive monitoring process are not performed in parallel in the voltage regulating apparatus 100 according to the third embodiment. The structure of the voltage regulating apparatus 100 according to the third embodiment is similar to the structure of the voltage regulating apparatus 100 according to the second embodiment. A difference lies in the internal structure of the control circuit 110. The mount checking process and the drive monitoring process according to the structure of the third embodiment is similar to those of the second embodiment.
The comparison processing unit 155a is provided with: a fourth comparator 172a for comparing the LED terminal voltage VC with the mount reference voltage VGND and outputs a signal of a high level or a low level; a power supply line Vcc; a second transistor Tr2a of a PMOS type having its gate connected to an output terminal of the fourth comparator 172a and having the power supply Vcc applied to its source; and a third transistor Tr3a of an NMOS type having its gate connected to the output terminal of the fourth comparator 172a and having the LED terminal voltage VC applied to its source. The second through fourth comparison processing units 155b-155d and the first comparison processing units 155a are similarly constructed.
The fifth comparator 174 compares voltages output from the first through fourth comparison processing unit 155a-155d with the boost reference voltage VSAT and sends out a result of comparison as the boost signal SEL1 to the charge pump circuit 12 via the digital filter 102. The operation in the mount checking process and the drive monitoring process in the control circuit 110 according to the third embodiment will be described by taking an example of LED 13a.
The fourth comparator 172a performs the mount checking process by comparing the LED terminal voltage VC of the LED 13a with the mount reference voltage VGND. When the LED terminal voltage VC of the LED 13a drops below the mount reference voltage VGND, it is determined that the LED 13a is not mounted. In this case, the fourth comparator 172a outputs a low level signal. With this, the second transistor Tr2 is turned on and the third transistor Tr3 is turned off. As a result, the power supply Vcc is fed to the inverting input of the fifth comparator 174. Since the power supply Vcc is configured to be higher than the boost reference voltage VSAT, an increase in the step-up ratio is not invoked.
When the driving status of the LED 13a is proper, i.e., when the LED terminal voltage VC corresponding to the LED 13a is equal to higher than the boost reference voltage VSAT, the fourth comparator 172a outputs a signal at a high level since the LED terminal voltage VC is higher than the mount reference voltage VGND. The signal at a high level is sent out to the second transistor Tr2a and the third transistor Tr3a. As a result of the second transistor Tr2a being turned off and the third transistor Tr3a being turned on, the LED terminal voltage VC is directly input to the inverting input terminal of the fifth comparator 174a. Since the LED terminal voltage VC in this case is higher than the boost reference voltage VSAT, an increase in the step-up ratio is not invoked.
When the driving status of the LED 13a is improper, i.e., when the LED terminal voltage of the LED 13a drops below the boost reference voltage VSAT, the LED terminal voltage VC is directly input to the inverting input of the fifth comparator 174a in a similar way to the case described above. Since the LED terminal voltage VC in this case is lower than the boost reference voltage VSAT, an increase in the step-up ratio is invoked. In this case, the fifth comparator 174a sends out the boost signal SEL1 at a high level to the charge pump circuit 12 via the digital filter 102 so as to increase the step-up ratio.
Thus, the result of the drive monitoring process on the LED 13a determined to be unmounted as a result of the mount checking process by the fourth comparator 172a does not invoke an increase in the step-up ratio. With this, it is ensured that the drive voltage is increased by referring to the results of monitoring of the LEDs determined to be mounted. Accordingly, effective control of the drive voltage is achieved.
Correspondence between different ways to refer to the elements constituting the invention and the third embodiment will be described. The “mount checking circuit” corresponds to the fifth comparator 174. The “monitoring circuit” corresponds to the fourth comparators 172a-172d. The “boost control circuit” corresponds to the fifth comparator 174.
Described above is an explanation based on the embodiment. The embodiment of the present invention is only illustrative in nature and it will be obvious to those skilled in the art that various variations in constituting elements and processes are possible within the scope of the present invention.
In the embodiments, the LEDs 13 are given as an example of load connected to the voltage regulating apparatus 100. The apparatus can of course be applied to any equipment operable by utilizing the voltage regulating apparatus 100 as a source of power. For example, the inventive apparatus may be applied to fans, heaters, motors and communication units.
In the embodiments, circuit elements and blocks constituting the voltage regulating apparatus 100 may be integrated entirely, or integrated to produce a plurality of integrated circuits. Some of the elements may be implemented as discrete components. The target for integration may be decided in accordance with the cost or occupied area.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2004-099780 | Mar 2004 | JP | national |
| 2005-038696 | Feb 2005 | JP | national |
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