Patent Application
20160026196
The present invention relates to voltage regulators. More specifically, the present invention relates to a voltage regulator suitable for use in an integrated circuit application where the current demand can vary significantly in a short period of time.
Many voltage regulators of various types are known in the art. However, there is still a need for a voltage regulator that can handle wide swings in load current while still maintaining voltage regulation. A voltage regulator is needed for an integrated circuit application where the current demand can vary significantly in a short period of time. The current can be small or large for any amount of time and abruptly change to the opposite demand condition without warning. In such a situation, it can be difficult to keep the regulated voltage within the required range needed to guarantee device performance.
The present invention uses a system of circuits to inject pre-determined amounts of current into and out of a regulated voltage node so as to provide a stable output voltage during large current demand transients. A system of voltage monitors detects droop and overshoot relative to a reference and either sinks or sources a fixed amount of current to quickly compensate the output voltage. The present invention includes a power savings mode for engaging subsequent regulator stages. The present invention quickly responds to large current demand changes, and no external signaling is required to enable the fast response voltage regulation. The circuit of the present invention can be used with any circuit technology. The switching regulator according to the present invention can be used alone or in tandem with a Low Drop-Out (LDO) type regulator. A tightly regulated output voltage can be achieved using multiple stages as is described in further detail below.
A voltage regulator according to the present invention comprises a reference current scaling circuit comprising an input reference current, a scaled output source current and a corresponding first bias voltage, and a scaled output sink current and a corresponding second bias voltage; and a decision making circuit having a first voltage input for receiving a first reference voltage, a second voltage input for receiving a second reference voltage, a third voltage input for receiving the first bias voltage, and a fourth voltage input for receiving the second bias voltage, and an output for providing a regulated voltage.
The reference scaling current comprises a first current mirror having an input for receiving the input reference current, a first output, and a second output; a second current mirror having an input coupled to the first output of the first current mirror, and an output; a first diode-connected transistor coupled to the output of the second current mirror for generating the first bias voltage; and a second diode-connected transistor coupled to the second output of the first current mirror for generating the second bias voltage. The first bias voltage is referenced to ground, and the second bias voltage is referenced to a supply voltage. The first current mirror comprises an N-channel current mirror, and the second current mirror comprises a P-channel current mirror. The first diode-connected transistor comprises an N-channel diode-connected transistor, and the second diode-connected transistor comprises a P-channel diode-connected transistor.
The decision making circuit comprises a first comparator having a first input coupled to the first voltage input of the decision making circuit, a second input coupled to the output of the decision making circuit, and an output; a second comparator having a first input coupled to the output of the decision making circuit, a second input coupled to the second voltage input of the decision making circuit, and an output; a first transfer gate having first and second inputs coupled to the output of the first comparator, a third input for receiving the second bias voltage, and an output; a second transfer gate having first and second inputs coupled to the output of the second comparator, a third input for receiving the first bias voltage, and an output; a first transistor having a gate coupled to the output of the first transfer gate and a current path coupled between a supply voltage and the output of the decision making circuit; and a second transistor having a gate coupled to the output of the second transfer gate and a current path coupled between the output of the decision making circuit and ground. The first transfer gate is coupled to the first comparator through a plurality of inverters, and the second transfer gate is coupled to the second comparator through a plurality of inverters. The first transfer gate comprises a P-channel transistor and an N-channel transistor in parallel connection, and the second transfer gate comprises a P-channel transistor and an N-channel transistor in parallel connection. The first transistor comprises a P-channel transistor, and the second transistor comprises an N-channel transistor.
The voltage regulator according to the present invention further comprises a filter capacitor coupled to the output of the decision making circuit. The voltage regulator according to the present invention can be used in conjunction with an LDO regulator.
According to another embodiment of the present invention, a voltage regulator comprises a plurality of connected stages, each stage comprising a reference current scaling circuit comprising an input reference current, a scaled output source current and a corresponding first bias voltage, and a scaled output sink current and a corresponding second bias voltage; and a decision making circuit having a first voltage input for receiving a first reference voltage, a second voltage input for receiving a second reference voltage, a third voltage input for receiving the first bias voltage, and a fourth voltage input for receiving the second bias voltage, and an output for providing a regulated voltage. According to this embodiment of the present invention the first and second reference voltages can be made different for each stage. This embodiment of the voltage regulator can also be used in conjunction with an LDO regulator.
The circuit of the present invention results in a tightly controlled output voltage even when the current draw on the voltage changes rapidly. This regulator method will be referred to as a current mode regulator (CMR); however, it does not require the use of any inductors as is typical with what is commonly referred to as a current mode regulator.
A key aspect of the circuit of the present invention is to use a system of comparators to determine whether the supply is in the process of drooping or overshooting relative to its target voltage and to use the output of comparators to digitally enable either the sourcing or sinking of a fixed amount of current per stage depending on whether the output voltage is under or over the target voltage. Several circuits are required to accomplish this task.
The first circuit that is needed is a reference current scaling circuit. This can be a simple set of current mirrors that is used to take a reference current and generate a bias voltage that is associated with a scale multiple of the reference current. Depending on the exact application, it may be necessary to generate these bias voltages for P-channel devices, N-channel devices, or both. In the embodiment shown in
Referring to
The second circuit that is needed is a decision making circuit that determines whether or not to apply the current to the regulated voltage.
Referring to
In
The circuitry shown in
This simple approach could work without any further modifications; however, in designing this circuit several improvements were made for various considerations. If one were to use only a single stage or multiple stages with identical reference voltages, the output ripple might be quite large since the available amount of current might need to be large to sustain continuous current draw. Additionally if the single stage approach does need to source or sink a large amount of current, then one must also consider inductive effects on the external supply that is used for generating the internal regulated voltage. To improve the behavior of this circuit, the circuitry shown above can be instantiated multiple times and each instantiation can have a slightly different reference voltage. In the case of the pull-up paths, the first stage would have the reference voltage set to the desired target, the second stage would have a reference voltage slightly below the desired target, the third stage would have a reference voltage slightly below the reference voltage for the second stage, and so forth for as many stages as are desired/required. Similarly, the first stage of the pull-down paths would have a reference voltage slightly above the desired target, the second stage would have a reference voltage slightly above that of the first stage, and so forth. The result of this technique is a series of steps that the output voltage will regulate depending on the current demand on the regulated voltage. Once the current load exceeds the capability of the first stage, the second stage will become the new voltage target. Another way to think of it is that the farther the regulated voltage moves from the true voltage target, the more current will be applied to the node to bring it back to the desired target.
Another improvement is to use separate bias voltages (VGN and VGP) for every stage of the regulator. This allows each stage to have a different amount of current, if desired, and also provides improved immunity to capacitive kick-back effects from enabling and disabling multiple stages.
With the addition of multiple stages the current demand required to run the comparators and bias generators themselves increases, which works to decrease the overall efficiency of the system (available output current relative to required input current). In order to reduce the current requirement for the regulator itself, a novel improvement was devised. The improvement involves sending signals between different stages of the regulator system. In the case of the pull-up paths, the state of stage 0 can be sent to a stage with a lower reference voltage; in the present invention, the state of the comparator for stage 0 is sent to stage number 2, the state of the comparator for stage 1 is sent to stage number 3, etc. This state is simply a buffered signal from the comparator that indicates whether that particular stage is applying current to the regulated voltage or not. On the receiving side, these signals enable/disable some of the bias stages in the comparators when they are not needed to save power in stages that have lower reference voltages. The number of stages that are traversed by these signals are limited, but it is dependent on how fast the current demand can change, how much filter capacitance is on the regulated voltage, the speed required for maintaining the regulated voltage, and the allowable regulator efficiency in various modes of operation.
The final improvement to this regulator system was to use it in tandem with a traditional low drop-out (LDO) style regulator, shown in
The LDO regulator can provide a true DC solution for any given current demand, but as discussed earlier, it can be too slow to respond to sudden, large changes in current demand. When used together, the CMR and the LDO regulator perform different tasks. The LDO regulator works to achieve a DC solution for the average current demand over a long period of time while the CMR helps during the transitions between different average current demands. In order to allow the LDO regulator to eventually take over full control of the output voltage, the CMR uses references voltages that are slightly above and below the true voltage target that is used for the LDO regulator. By providing this dead-band in the CMR, the LDO regulator has a region where it is the only component driving the regulated voltage. Consider that for a long time the current demand has been stable; in this situation the LDO will be driving the regulated voltage to the target voltage value and will be at a DC solution. Then the current demand goes up several factors almost instantaneously. The LDO regulator will work to try to keep the voltage on target, but it cannot respond quickly enough to keep the regulated voltage from drooping below the target voltage. As the regulated voltage droops through the reference voltages for the CMR, the pull-up stages engage and begin sourcing current into the regulated voltage. The additional current works to keep the regulated voltage close enough to the target voltage so as to guarantee device performance. Since the CMR pull-up stages shut off their current sources once the regulated voltage exceeds the reference voltage for those stages, the LDO will gradually take over full control of the new (higher) current demand. Now the current demand goes down by several factors almost instantaneously. The LDO begins to reduce the amount of current it is supplying to the regulated voltage, but it cannot respond quickly enough to keep the regulated voltage from overshooting the target voltage. As the regulated voltage overshoots the reference voltages for the CMR, the pull-down stages engage and begin sinking current from the regulated voltage. The additional current works to keep the regulated voltage in the target range to guarantee device performance. Since the CMR pull-down stages shut off their current sinks once the regulated voltage is beneath the reference voltage for those stages, the LDO will gradually take over full control of the new (lower) current demand. For short bursts into and out of these higher current states, the CMR will do more of the work since the current demand is constantly changing. For longer stretches of the same average current, the LDO regulator will do more of the work since the current demand is not changing as frequently.
Each pull-up and pull-down stage connects to the VREG output and also generates an enable signal for a downstream stage of the same type. In
In
In
Although the invention has been described and illustrated with a certain degree of particularity, it is understood that the present disclosure has been made only by way of example, and that numerous changes in the combination and arrangement of parts can be resorted to by those skilled in the art without departing from the spirit and scope of the invention, as hereinafter claimed.
