Patent Application
20190235549
The present document relates to a voltage regulator for supplying electrical energy to a load at a stable load voltage.
Voltage regulators are frequently used for providing a load current to different types of loads (e.g. to the processors of an electronic device). In this context it is typically desirable to supply the loads with stable load voltages, even if the load currents vary. In other words, it is desirable to maintain a stable voltage at a load, even subject to changing load currents.
The present document addresses the technical problem of providing a cost-efficient voltage regulator, which is configured to provide stable load voltages at a load for varying load currents. According to an aspect, a regulator (notably a voltage regulator such as a linear dropout regulator) is described. The regulator is configured to provide at an output node of the regulator a load current at an output voltage. The output node of the regulator may be coupled to a load (e.g. to a processor) which is to be operated using the load current. The load may be coupled to the output node of the regulator via a conductive track (e.g. a conductive track of a printed circuit board, PCB). The regulator may be implemented as a regulator chip having an output pin as the output node. The regulator chip and the load (as part of a load chip) may be placed on the PCB.
The regulator comprises a pass transistor for providing the load current at the output node. The pass transistor may be configured to source the load current from a supply voltage of the regulator. The pass transistor may comprise a p-type or n-type metaloxide semiconductor transistor.
Furthermore, the regulator comprises feedback means for deriving a feedback voltage from the output voltage. In particular, the feedback means may be configured to provide a feedback voltage which is equal to a fraction of the output voltage. By way of example, the feedback means may comprise a voltage divider having a voltage divider ratio. The feedback voltage may be equal to the output voltage times the voltage divider ratio.
In addition, the regulator comprises a differential amplifier which is configured to control the pass transistor in dependence of the feedback voltage and in dependence of a reference voltage (notably in dependence of the difference of the feedback voltage and the reference voltage). In particular, the differential amplifier may be configured to provide a gate voltage which is applied to a gate of the pass transistor, wherein the gate voltage depends on the (difference of the) reference voltage and the feedback voltage. The differential amplifier may comprise a plurality of amplification stages, notably a differential amplification stage and a diver stage for generating the gate voltage for controlling the pass transistor.
The regulator further comprises compensation means which are configured to determine a sensed current that is indicative of the load current at the output node. In particular, the compensation means may comprise current sensing means which are configured to sense a current through the pass transistor for determining the sensed current. The current sensing means may be such that the sensed current is a scaled version of the current through the pass transistor. The current through the pass transistor is typically substantially equal to the load current.
Furthermore, the compensation means are configured to adjust an operation point of the regulator in dependence of the sensed current and in dependence of a value of a track impedance of the conductive track which links the output node to the load (notably in dependence of the product of the sensed current and the value of the track impedance). In particular, the compensation means may be configured to adjust an operation point of the regulator such that the output voltage at the output node is increased with increasing load current to compensate at least partially a track voltage at the track impedance. Alternatively or in addition, the compensation means may be configured to adjust an operation point of the regulator such that the load voltage at the load remains unchanged for different levels of the load current. Alternatively or in addition, the compensation means may be configured to adjust an operation point of the regulator such that the output voltage corresponds to the sum of a target voltage (given by the reference voltage) and of an estimated track voltage (which depends on the level of the sensed current and on the value of the track impedance, e.g. which is proportional to the product of the level of the sensed current and of the value of the track impedance).
As such, the regulator is configured to adjust the level of the output voltage which is set at the output node in order to compensate (at least partially) the track voltage at the track impedance of the conductive track between the output node and the load. By doing this, the load voltage at the load may be regulated to a fixed target voltage, without the need of an extra feedback pin for providing information regarding the actual load voltage to the regulator. As such, a cost-efficient regulator is provided, which provides a stable load voltage to a load of the regulator.
The compensation means may be configured to adjust the feedback means in dependence of the sensed current and in dependence of the value of the track impedance. In particular, the feedback means may comprise a voltage divider with an adjustable divider ratio and the compensation means may be configured to adjust the divider ratio in dependence of the sensed current and in dependence of the value of the track impedance. By doing this, the feedback voltage may be decreased with an increasing value of the sensed current, thereby increasing the level of the output voltage for compensating the (load current dependent) track voltage.
The feedback voltage may be provided to a first input of the differential amplifier. The compensation means may be configured to source a feedback current to or to sink a feedback current from the first input to adjust the feedback voltage, wherein the feedback current depends on the sensed current and on the value of the track impedance. In particular, a feedback current may be drawn from the first input to lower the level at the first input. The drawn feedback current may be increased with an increasing sensed current. As a result of this, the output voltage is increased for compensating the increasing track voltage.
The compensation means may be configured to adjust the reference voltage in dependence of the sensed current and in dependence of the value of the track impedance. In particular, the reference voltage may be increased with increasing sensed voltage to increase the output voltage for compensating the (load current dependent) track voltage.
The reference voltage may be applied to a second input of the differential amplifier. The compensation means may be configured to apply an offset voltage to the second input, wherein the offset voltage depends on the sensed current and on the value of the track impedance. The offset voltage may increase with increasing level of the sensed current, thereby increasing the output voltage at the output node for compensating the increasing track voltage. By doing this, the load voltage at the load may be maintained substantially unchanged (for varying load currents).
The compensation means may be configured to adjust an operation point of an internal node of the differential amplifier in dependence of the sensed current and in dependence of the value of the track impedance. As indicted above, the differential amplifier may comprise a plurality of amplification stages. The compensation means may be configured to source an adjustment current to or to sink an adjustment current from a node within at least one of the plurality of amplification stages, wherein the adjustment current depends on the sensed current and on the value of the track impedance. By doing this, the output voltage may be increased with increasing sensed current.
The compensation means may be configured to generate a virtual load node based on the output voltage, based on the sensed current and based on the value of the track impedance. In particular, the compensation means may comprise a compensation impedance which is dependent on the value of the track impedance. In particular, the compensation impedance may be a scaled version of the track impedance (e.g. N times the track impedance). Furthermore, the compensation means may comprise a compensation current source which provides a compensation current that is dependent on the sensed current. In particular, the compensation current may correspond to the current through the pass transistor divided by the factor N. The compensation impedance and the compensation current source may be arranged in series between the output node and ground, wherein the virtual load node corresponds to a midpoint between the compensation impedance and the compensation current source. As such, the voltage at the virtual load node corresponds to (or is proportional to) the load voltage at the load.
The feedback voltage may be derived based on the voltage at the virtual load node (e.g. using a voltage divider). By doing this, the load voltage at the load may be maintained substantially unchanged (for varying load currents), thereby improving the DC performance of the regulator.
Alternatively or in addition, the regulator may comprise a feedback capacitor which is coupled between the virtual load node and an internal node of the regulator. In particular, the feedback capacitor may couple the virtual load node (directly) to an output of the differential amplifier (e.g. to a midpoint between the differential amplifier and an intermediate amplification stage of the regulator). The use of a feedback capacitor, which is coupled to the virtual load node, improves the transient load regulation performance of the regulator, in case of substantial track impedances.
According to another aspect, a method for providing at an output node of a regulator a load current at an output voltage is described. The regulator comprises a pass transistor for providing the load current at the output node; feedback means for deriving a feedback voltage from the output voltage at the output node; and a differential amplifier for controlling the pass transistor in dependence of the feedback voltage and in dependence of a reference voltage.
The method comprises determining a sensed current which is indicative of the load current at the output node. Furthermore, the method comprises adjusting an operation point of the regulator in dependence of the sensed current and in dependence of a value of a track impedance of a conductive track which links the output node to a load.
In the present document, the term “couple” or “coupled” refers to elements being in electrical communication with each other, whether directly connected e.g., via wires, or in some other manner.
The invention is explained below in an exemplary manner with reference to the accompanying drawings, wherein
As outlined above, the present document is directed at providing a voltage regulator which is configured to provide a stable load voltage at a load for different levels of load currents. An example of a voltage regulator is an LDO regulator. A typical LDO regulator 100 is illustrated in
The LDO regulator 100 of
In addition, the LDO regulator 100 may comprise an output capacitance Cout (also referred to as output capacitor or stabilization capacitor or bybass capacitor) 105 parallel to the load 106. The output capacitor 105 is used to stabilize the output voltage Vout subject to a change of the load 106, in particular subject to a change of the requested load current Iload. It should be noted that typically the output current Iout at the output of the output amplification stage 103 corresponds to the load current Iload through the load 106 of the regulator 100 (apart from typically minor currents through the voltage divider 104 and the output capacitance 105).
The regulator 100 is typically coupled to a load 106 via a conductive track of a printed circuit board (PCB).
The regulator 100 of
The decreasing load voltage 224 may impact the operation of the load 106. Hence, it is desirable to maintain the load voltage 224 at a fixed level, even if the load current 406 increases.
The regulator chip 200 of
In particular, the compensation means 301, 302, 303, 304, 305 are configured to adapt the regulator 100 in dependence of the load current 406, such that the output voltage 204 at the output pin 203 of the regulator 100 corresponds to the sum of the fixed load voltage 224 (i.e. to the fixed target voltage given by the reference voltage 208) and of the (load current dependent) track voltage 214.
The compensation means 301, 302, 303, 304, 305 comprise current sensing means 305 which are configured to provided a sensed current which is indicative of the current through the pass transistor 201. The current sensing means 305 may comprise e.g. a scaled copy of the pass transistor 201 which is operated at the same drain-source voltage VDS as the pass transistor 201, such that the current through the scaled copy of the pass transistor 201 is proportional to the current through the pass transistor 201. In view of the fact that the current through the pass transistor 201 is substantially equal to the load current 406, the sensed current provides an indication of the load current 406.
The compensation means 301, 302, 303, 304, 305 may be configured to adapt the operation of the regulator 100 in dependence of the sensed current. In particular, the compensation means 301, 302, 303, 304, 305 may comprise a control circuit 304, which is configured to adjust the operation of the regulator 100 in dependence of the sensed current.
Alternatively or in addition, the control circuit 304 may be configured to adjust the divider ratio of the voltage divider 104 and/or to offset the feedback voltage 107 (e.g. using the current source 302), in dependence of the sensed current.
Alternatively or in addition, the control unit 304 may be configured to adjust an internal node of the differential amplifier 202 (notably of the differential amplification stage 101), e.g. by inserting or removing a current proportional to the sensed current to an internal node of the differential amplifier 202.
As such, the regulator chip 200 of
The regulator output current (i.e. the pass device current) may be sensed, wherein the sensed current is e.g. Isense=Ipass/N, with N being a real number greater than one and with Ipass being the current through the pass transistor 201. If the value Rtrack of the track impedance 211 is known (e.g. by measurement of the resistance of the conductive track on the PCB 210), the sensed current Isense and the track impedance information may be used to modify the main regulation loop of the regulator 100 to regulate the output voltage 224 to Vtarget+Rtrack*Iout, wherein Vtarget is the target voltage for the load voltage 224 (given by the reference voltage 108), wherein Rtrack is the value of the track impedance/resistance 211 and wherein Iout is the load current 406 (indicated by the sensed current).
Modifying the main regulator loop may be implemented in various ways. As illustrated in
The regulator 100, 200 comprises a pass transistor 201 for providing the load current 406 at the output node 203. Furthermore, the regulator 100, 200 comprises feedback means 104 for deriving a feedback voltage 107 from the output voltage 204 at the output node 203 (e.g. using a voltage divider 104). In addition, the regulator 100, 200 comprises a differential amplifier 202 for controlling the pass transistor 201 in dependence of the feedback voltage 107 and in dependence of a reference voltage 108 (notably in dependence of a difference between the feedback voltage 107 and the reference voltage 108).
The method 500 comprises determining 501 a sensed current which is indicative of the load current 406 at the output node 203. Furthermore, the method 500 comprises adjusting 502 an operation point of the regulator 100 in dependence of the sensed current and in dependence of a value of a track impedance 211 of the conductive track which links the output node 203 to the load 106 (notably in dependence of the product of the sensed current and the value of the track impedance 211).
As such, a regulator chip 200 (and a corresponding method 500) is described which is configured to perform a point-of load regulation without the need of an extra feedback pin 205. The regulator chip 200 makes use of an estimated voltage drop 214 over the track impedance 211 to regulate the voltage 224 at the point of load.
In a similar manner to the steady-state/DC regulation, the transient load regulation typically suffers from the fact that the output voltage 204 at the output node 203 differs from the load voltage 224 across the load 106. The transient increase of the load current 410 (see
The regulator 100 of
As such, a replica of the load voltage 224 may be fed back using the feedback capacitor 605, thereby increasing the transient load performance of the regulator 100. This is illustrated in
The sensed current (through the current source 603) may be copied to the compensation current source 613 (for creating the virtual load node 620). Alternatively or in addition, the sensed current may be copied to the current source 623 for steady-state/DC compensation of the regulator 100 (as outlined in the context of
As illustrated in
As such, the transient behaviour of the regulator 100 may be improved in the presence of a track impedance 211. In case of an abrupt load current request, the output capacitor 105 reacts first to deliver the required load current 410. After the response time of the regulator 100, the pass transistor 201 starts delivering the load current 410. The sensed current of the current sensing device 305, 601, 608 may be used to manipulate or adjust one or more internal nodes of the regulator 100. In particular, a slope based current which is generated using the information on the sensed current and on the track impedance may be fed back into the regulator 100 through the feedback capacitor 605.
As such, compensation means may be provided to improve the DC (steady-state) and transient load regulation of a regulator 100 in case of relatively high track impedances 211. The figures shown in the present document show PMOS pass transistors 201. It should be noted that the aspects which are outlined in the present document are equally applicable to NMOS regulators with NMOS pass transistors. The compensation means outlined in the present document do not require an extra sensing pin for determining the load voltage 224. Instead, the compensation means make use of internal current sensing means 305 for sensing the current through the pass transistor 201 (i.e. for sensing the load current) and of information regarding the track impedance 211. As a result of this, a virtual load node 620 may be generated, which reflects the load voltage 224. By doing this, an efficient regulator 100 with improved DC and transient performance may be provided.
It should be noted that the description and drawings merely illustrate the principles of the proposed methods and systems. Those skilled in the art will be able to implement various arrangements that, although not explicitly described or shown herein, embody the principles of the invention and are included within its spirit and scope. Furthermore, all examples and embodiment outlined in the present document are principally intended expressly to be only for explanatory purposes to help the reader in understanding the principles of the proposed methods and systems. Furthermore, all statements herein providing principles, aspects, and embodiments of the invention, as well as specific examples thereof, are intended to encompass equivalents thereof.
| Number | Date | Country | Kind |
|---|---|---|---|
| 102015225804.1 | Dec 2015 | DE | national |
This application is a Continuation of U.S. application Ser. No. 15/943,806 which was filed on Apr. 3, 2018, which is a continuation of Ser. No. 15/381,148, filed on Dec. 16, 2016 assigned to a common assignee, and which are herein incorporated by reference in their entirety.
| Number | Date | Country | |
|---|---|---|---|
| Parent | 15943806 | Apr 2018 | US |
| Child | 16376037 | US | |
| Parent | 15381148 | Dec 2016 | US |
| Child | 15943806 | US |
