In various types of electrical circuits, electromagnetic interference may cause problems with the operation of the circuits. The interference may increase when circuit elements are spaced in close proximity to one another, e.g., by integrating the circuit elements on the same circuit, when a relatively large amount of power is used by circuit elements, or when operating frequencies of different circuit components overlap. Although interference may be reduced by increasing the spacing between circuit elements or electrically isolating circuit elements, the size of the overall circuit may be increased and additional circuitry added to isolate circuit elements may increase interference.
It would be desirable to be able to minimize interference between circuit elements without increasing the size of the overall circuit.
According to one exemplary embodiment, a voltage regulator configured to receive a supply voltage from a voltage supply and provide a regulated voltage to digital circuitry is provided. The voltage regulator comprises first circuitry configured to inhibit high frequency energy generated by the digital circuitry from transmitting into the voltage supply, second circuitry configured to inhibit low frequency energy generated by the digital circuitry from transmitting into the voltage supply, and third circuitry configured to maintain the regulated voltage at a substantially constant value in response to a current drawn by the digital circuitry.
According to another exemplary embodiment, a method performed by a voltage regulator is provided. The method comprises receiving a supply voltage from a voltage supply, providing a regulated voltage to digital circuitry, inhibiting high frequency energy generated by the digital circuitry using the regulated voltage from transmitting into the voltage supply, inhibiting low frequency energy generated by the digital circuitry using the regulated voltage from transmitting into the voltage supply, and maintaining the regulated voltage at a substantially constant value in response to a first current drawn by the digital circuitry.
According to a further exemplary embodiment, a system comprising digital circuitry and a voltage regulator configured to receive a supply voltage from a voltage supply and provide a regulated voltage to the digital circuitry is provided. The voltage regulator is configured to inhibit high frequency energy generated by the digital circuitry from transmitting into the voltage supply, the voltage regulator is configured to inhibit low frequency energy generated by the digital circuitry from transmitting into the voltage supply, and the voltage regulator is configured to maintain the regulated voltage at a substantially constant value in response to a first current drawn by the digital circuitry.
According to another exemplary embodiment, a communications device is provided. The communications device comprises an antenna, a mobile communications system configured to communicate with a remote host using the antenna and including a voltage supply, digital circuitry, and a voltage regulator configured to receive a supply voltage from the voltage supply and provide a regulated voltage to the digital circuitry, and an input/output system configured to communicate with the mobile communications system. The voltage regulator is configured to inhibit high frequency energy generated by the digital circuitry from transmitting into the voltage supply, the voltage regulator is configured to inhibit low frequency energy generated by the digital circuitry from transmitting into the voltage supply, and the voltage regulator is configured to maintain the regulated voltage at a substantially constant value in response to a first current drawn by the digital circuitry.
In the following Detailed Description, reference is made to the accompanying drawings, which form a part hereof, and in which is shown by way of illustration specific embodiments in which the invention may be practiced. In this regard, directional terminology, such as “top,” “bottom,” “front,” “back,” “leading,” “trailing,” etc., is used with reference to the orientation of the Figure(s) being described. Because components of embodiments of the present invention can be positioned in a number of different orientations, the directional terminology is used for purposes of illustration and is in no way limiting. It is to be understood that other embodiments may be utilized and structural or logical changes may be made without departing from the scope of the present invention. The following detailed description, therefore, is not to be taken in a limiting sense, and the scope of the present invention is defined by the appended claims.
Embodiments of a voltage regulator that provides a well-regulated voltage to digital circuitry and inhibits interference from the digital circuitry, such as spurious high and low frequency energy, from transmitting into a voltage supply are described herein. Accordingly, the voltage regulator contains the interference to prevent the interference from adversely affecting the operation of other circuitry.
Voltage regulator 100 receives a supply voltage VDD and a reference voltage VREF and generates a regulated voltage VREG. Voltage regulator 100 provides the regulated voltage to digital circuitry 110.
Digital circuitry 110 is configured to operate using the regulated voltage provided by voltage regulator 100 and draws varying amounts of current from voltage regulator 100. Digital circuitry 110 is configured to perform one or more functions as an independent circuit or as part of a system that includes other circuitry (not shown in
In one embodiment, digital circuitry 110 generates or otherwise produces interference that may inhibit or otherwise adversely affect the operation of other circuitry (not shown). The other circuitry may be in a system that includes digital circuitry 110 or otherwise proximately located to digital circuitry 110 such that the interference may inhibit or adversely affect the operation of the other circuitry.
In one embodiment, digital circuitry 110 generates interference in the form of high and low frequency energy that may adversely affect the operation of other circuitry. The high and low frequency energy may be generated by an oscillatory source, such as a clock or other circuitry in digital circuitry 110, associated with digital circuitry 110 that operates at one or more frequencies. The high and low frequency energy may occur relative to one or more frequencies of the oscillatory source where the low frequency energy is closer to one or more frequencies of the oscillatory source than the high frequency energy.
For example, in an embodiment where digital circuitry 110 operates using a 26 MHz clock, the low order harmonics of the clock, such as the first and second harmonics, may generate low frequency energy and the high order harmonics of the clock may generate high frequency energy. In this example, the low frequency energy may adversely affect the operation of a voltage-controlled oscillator (VCO) (not shown) by causing pulling problems with the VCO by modulating the impedance presented in the voltage supply. In addition, high frequency energy may adversely affect the operation of transmitter or receiver circuitry (not shown in
Voltage regulator 100 is configured to prevent interference such as high and low frequency energy generated by digital circuitry 110 from adversely affecting the operation of other circuitry in a system that includes digital circuitry 110. In the embodiment shown in
Voltage regulator 100 is also configured to provide a well regulated voltage VREG to digital circuitry 110 such that the regulated voltage does not vary with the amount of current drawn by digital circuitry 110. In the embodiment shown in
To ensure that the regulated voltage remains constant, shunt feedback circuitry 106 is configured to continuously adjust the amount of current it draws in response to changes in the amount of current drawn by digital circuitry 110. In operation, shunt feedback circuitry 106 increases the amount of current it draws in response to a decrease in the amount of current drawn by digital circuitry 110. By doing so, shunt feedback circuitry 106 ensures that the regulated voltage does not increase as a result of the decrease in the amount of current drawn by digital circuitry 110. Similarly, shunt feedback circuitry 106 decreases the amount of current it draws in response to an increase in the amount of current drawn by digital circuitry 110. By doing so, shunt feedback circuitry 106 ensures that the regulated voltage does not decrease as a result of the increase in the amount of current drawn by digital circuitry 110.
In one embodiment, the current through shunt feedback circuitry 106, ISF, is approximated as a difference between the current from the voltage supply, IDD, and the current drawn by digital circuitry 110, IDC, as shown in Equation I.
ISF=IDD−IDC EQUATION I
Voltage regulator 100A is configured to prevent interference such as high and low frequency energy generated by digital circuitry 110 from adversely affecting the operation of other circuitry in a system that includes digital circuitry 110. Voltage regulator 100A is also configured to provide a well regulated voltage VREG to digital circuitry 110 such that the regulated voltage does not vary with the amount of current drawn by digital circuitry 110.
In the embodiment shown in
In the embodiment of
In the embodiment of
The source connection of transistor M1 connects to the reference voltage, and the gate connection of transistor M1 connects to the drain connection of transistor M1. Accordingly, transistor M1 is configured to form a diode. The source connection of transistor M2A connects to the regulated voltage node, and the gate connection of transistor M2A connects to the gate connection of transistor M1. One of the current sources I0 is connected between the gate and drain connections of transistor M1 and ground. The other current source I0 is connected between the drain connection of transistor M2A and ground. The capacitive element CC and the resistive element RC connect in series between the gate of transistor M0 and ground. The source connection of transistor M0 connects to the regulated voltage node, the gate connection of transistor M0 connects to the drain connection of transistor M2A, and the drain connection of transistor M0 connects to ground.
Shunt feedback circuitry 106A is configured to provide the regulated voltage to digital circuitry 110 using the reference voltage VREF and the supply voltage VDD. Shunt feedback circuitry 106A maintains the regulated voltage according to the amount of current drawn by digital circuitry 110 to provide a constant, well regulated voltage to digital circuitry 110.
Shunt feedback circuitry 106A is configured to cause the regulated voltage to be approximately equal to the reference voltage VREF. The constant current sources I0 cause the voltage at the source connections of transistors M1 and M2A to be constant and equal. Because transistors M1 and M2A are equally sized, the regulated voltage is approximately equal to the reference voltage.
To ensure that the regulated voltage remains constant, shunt feedback circuitry 106A continuously adjusts the amount of current drawn by transistor M0 from the regulated voltage in response to changes in the amount of current drawn by digital circuitry 110. Transistor M0 provides active shunt feedback to cause the regulated voltage to be equal to the reference voltage regardless of current through digital circuitry 110.
In operation, transistor M0 increases the amount of current it draws from current supply IB in response to a decrease in the amount of current drawn by digital circuitry 110. By doing so, transistor M0 ensures that the regulated voltage does not increase as a result of the decrease in the amount of current drawn by digital circuitry 110. Similarly, transistor M0 decreases the amount of current it draws from current supply IB in response to an increase in the amount of current drawn by digital circuitry 110. By doing so, transistor M0 ensures that the regulated voltage does not decrease as a result of the increase in the amount of current drawn by digital circuitry 110.
In one embodiment, the current through transistor M0, IM0, is approximated as a difference between the current IB from the current supply IB and the current IDC drawn by digital circuitry 110 as shown in Equation II.
IM0=IB−IDC EQUATION II
In one embodiment, capacitive element CBYPASS is relatively large to provide high frequency attenuation. As a result, capacitive element CBYPASS creates a dominant pole at the regulated voltage node. Shunt feedback circuitry 106A includes capacitive element CC and resistive element RC to provide frequency compensation for pole created at the regulated voltage node by CBYPASS. Accordingly, capacitive element CC and resistive element RC provide circuit stability for voltage regulator 100A.
Voltage regulator 100B is configured to prevent interference such as high and low frequency energy generated by digital circuitry 110 from adversely affecting the operation of other circuitry in a system that includes digital circuitry 110. Voltage regulator 100B is also configured to provide a well regulated voltage VREG to digital circuitry 110 such that the regulated voltage does not vary with the amount of current drawn by digital circuitry 110. High frequency circuitry 102 A and low frequency circuitry 104A operate as described above with reference to
In the embodiment of
The source connection of transistor M1 connects to the reference voltage, and the gate connection of transistor M1 connects to the drain connection of transistor M1. Accordingly, transistor M1 is configured to form a diode. The source connection of transistor M2B connects to the regulated voltage node, and the gate connection of transistor M2B connects to the gate connection of transistor M1. The current source I0 is connected between the gate and drain connections of transistor M1 and ground. The current source nI0 is connected between the drain connection of transistor M2B and ground. The drain and gate connections of transistor M3 connects to the drain connection of transistor M2B, and the source connection of transistor M3 connects to ground. Accordingly, transistor M3 is configured to form a diode. The drain connection of transistor M0 connects to the regulated voltage node, the gate connection of transistor M0 connects to the drain and gate connections of transistor M3, and the source connection of transistor M0 connects to ground.
Shunt feedback circuitry 106B is configured to provide the regulated voltage to digital circuitry 110 using the reference voltage VREF and the supply voltage VDD. Shunt feedback circuitry 106B maintains the regulated voltage according to the amount of current drawn by digital circuitry 110 to provide a constant, well regulated voltage to digital circuitry 110.
Shunt feedback circuitry 106A is configured to cause the regulated voltage to be approximately equal to the reference voltage VREF. The constant current sources I0 and nI0 cause the voltage at the source connections of transistors M1 and M2B to be constant and equal. Because transistors M1 and M2B are proportionately sized with their drain currents I0 and nI0, the regulated voltage is approximately equal to the reference voltage.
To ensure that the regulated voltage remains constant, shunt feedback circuitry 106B continuously adjusts the amount of current drawn by transistor M0 from the supply voltage in response to changes in the amount of current drawn by digital circuitry 110. Transistor M0 provides active shunt feedback to cause the regulated voltage to be equal to the reference voltage regardless of current through digital circuitry 110.
In operation, transistor M0 increases the amount of current it draws from current supply IB in response to a decrease in the amount of current drawn by digital circuitry 110. By doing so, transistor M0 ensures that the regulated voltage does not increase as a result of the decrease in the amount of current drawn by digital circuitry 110. Similarly, transistor M0 decreases the amount of current it draws from current supply IB in response to an increase in the amount of current drawn by digital circuitry 110. By doing so, transistor M0 ensures that the regulated voltage does not decrease as a result of the increase in the amount of current drawn by digital circuitry 110.
In one embodiment, the current through transistor M0, IM0, is approximated as a difference between the current IB from the current supply IB and the current IDC drawn by digital circuitry 110 as shown in Equation II above.
In one embodiment, capacitive element CBYPASS is relatively large to provide high frequency attenuation. As a result, capacitive element CBYPASS creates a dominant pole at the regulated voltage node. Shunt feedback circuitry 106A includes the diode connected transistor M3 to provide frequency compensation for pole created at the regulated voltage node by CBYPASS. The diode connected transistor M3 forms a frequency compensation circuit that causes the pole at the node of the gate connection of transistor M0 to be non-dominant when compared with the regulated voltage node. Accordingly, the diode connected transistor M3 provides circuit stability for voltage regulator 100B.
Voltage regulator 100C operates similarly to voltage regulator 100 as described above with reference to
Control circuitry 400 is configured to adjust reference generator 402 to adjust the reference voltage provided by reference generator 402 to voltage regulator 100C thus controlling the regulated voltage VREG. Control circuitry 400 is also configured to adjust low frequency circuitry 104B. In one embodiment where low frequency circuitry 104B includes current source IB as shown in the embodiment 104A in
By providing an adjustable regulated voltage to digital circuitry 110, voltage regulator 100C allows the regulated voltage to be tailored for use with digital circuitry 110. In addition, the power consumption of voltage regulator 100C may adjusted by adjusting low frequency circuitry 104B such as current source IB.
RF circuitry 510 is configured to transmit and receive information using an antenna (e.g., an antenna 606 as shown in
RF circuitry 510 includes one or more instances of transmitter circuitry 512 configured to transmit information using antenna interface circuitry 540. To transmit information, transmitter circuitry 512 receives digital information to be transmitted from baseband processor circuitry 520, generates an RF signal in accordance with the information, and provides the RF signal to antenna interface circuitry 540 for transmission by an antenna. The RF signal may be amplified by power amplifier circuitry (not shown) prior to being transmitted by the antenna. In one embodiment, each instance of transmitter circuitry 512 is configured to transmit information using one or more frequency bands, e.g., a GSM 850, a EGSM, a PCS, or a DCS band.
RF circuitry 510 also includes one or more instances of receiver circuitry 514 configured to receive information using antenna interface circuitry 540. To receive information, receiver circuitry 514 receives an RF signal that includes information from a remote transmitter (e.g., a base station 610 as shown in
Baseband processor circuitry 520 is configured to perform digital baseband processing, e.g., voice and/or data processing, on information to be transmitted by RF circuitry 510 and on information received by RF circuitry 510. Baseband processor circuitry 520 may also be configured to perform digital processing on other information that is not associated with RF circuitry 510, i.e., information that is not to be transmitted by or has not been received from RF circuitry 510.
Control circuitry 530 is configured to control the operation of the components of mobile communications system 500 including RF circuitry 510, baseband processor circuitry 520, and, according to one embodiment, the instances of voltage regulator 100. For example, control circuitry 530 is configured to activate and deactivate baseband processor circuitry 520. Control circuitry 530 is also configured to activate and deactivate RF circuitry 510. Control circuitry 530 is further configured to control the instances of voltage regulator 100 in one embodiment as described above with reference to
Antenna interface circuitry 540 is configured to connect to an antenna, such as antenna 606 shown in
In the embodiment of
Mobile communication system 500 may perform signal processing tasks in a serial or multiplexed manner (e.g., by sharing hardware to perform a variety of tasks), in a parallel manner (e.g., by using dedicated hardware for each signal processing task), or a combination of the two techniques. The choice of signal processing hardware, firmware, and software may depend on the design and performance specifications for a given desired implementation.
Input/output system 602 receives information from a user and provides the information to mobile communications system 500. Input/output system 602 also receives information from mobile communications system 500 and provides the information to a user. The information may include voice and/or data communications. Input/output system 602 includes any number and types of input and/or output devices to allow a user provide information to and receive information from mobile communications device 600. Examples of input and output devices include a microphone, a speaker, a keypad, a pointing or selecting device, and a display device.
Power supply 604 provides power to mobile communications system 500, input/output system 602, and antenna 606. Power supply 604 includes any suitable portable or non-portable power supply such as a battery. In particular, power supply 604 provides power to one or more instances of voltage regulator 100 in mobile communications system 500.
Mobile communications system 500 communicates with one or more base stations 610 or other remotely located hosts in radio frequencies using antenna 606. Mobile communications system 500 transmits information to one or more base stations 610 or other remotely located hosts in radio frequencies using antenna 606 as indicated by a signal 620. Mobile communications system 500 receives information from a base station 610 in radio frequencies using antenna 606 as indicated by a signal 630. In other embodiments, mobile communications system 500 communicates with base stations 610 using other frequency spectra.
In the above embodiments, a variety of circuit and process technologies and materials may be used to implement communication apparatus according to the invention. Examples of such technologies include metal oxide semiconductor (MOS), p-type MOS (PMOS), n-type MOS (NMOS), complementary MOS (CMOS), silicon-germanium (SiGe), gallium-arsenide (GaAs), silicon-on-insulator (SOI), bipolar junction transistors (BJTs), and a combination of BJTs and CMOS (BiCMOS).
Although specific embodiments have been illustrated and described herein, it will be appreciated by those of ordinary skill in the art that a variety of alternate and/or equivalent implementations may be substituted for the specific embodiments shown and described without departing from the scope of the present invention. This application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, it is intended that this invention be limited only by the claims and the equivalents thereof.
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Number | Date | Country | |
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20070052396 A1 | Mar 2007 | US |