TECHNICAL FIELD
An aspect of this invention relates to power systems for electronic circuits.
BACKGROUND
Switching regulators are widely used to provide voltage regulation in electronics sub-systems. A switching regulator may generate an output voltage by generating a pulse output from an input voltage. The pulse output is generally filtered by a low pass filter to generate a DC output voltage. The amplitude of the DC output voltage may be regulated by varying the pulse width of the pulses that comprise the pulse output or controlling the on-time or the off-time of the pulse output. A significant portion of the power losses in a switching regulator occur in the power switches that generate the pulse output from the input voltage. The power switch losses may be divided between conduction losses and switching losses. As the pulse width decreases in proportion to the switching frequency of the pulse output, the switching losses may increase relative to the conduction losses. In addition, at narrower pulse widths such as a 10% duty cycle, maintaining regulation of the output voltage may become more difficult resulting in increased error in the output voltage.
FIG. 1A shows an exemplary conventional voltage regulator 10 for converting an input voltage of 12 volts to an output voltage, Vout, of approximately 1.2 volts. A conduction switch 12 and freewheeling switch 14 may convert the input to a pulse output. The conduction switch 12 and freewheeling switch 14 are generally selected to be high voltage devices to withstand the entire input voltage. The pulse output may be filtered by an output inductor 16 and output capacitor 18 to form Vout. FIG. 1B shows waveforms associated with the conventional voltage regulator 10. Waveform 20 shows the operating state of the conduction switch 12. Waveform 22 shows the voltage, V1, across the freewheeling switch 14. Voltage V1 may typically have a rise time and a fall time of about 10 nsec. The rise time and fall time are typically limited by the type of switches used for the conduction switch 12 and the freewheeling switch 14. The switching losses may increase as the rise time and fall time increase. Waveform 24 shows the current, I1, flowing through the output inductor 16. As the pulse width continues to decrease, switching losses become a greater proportion of the total power losses.
SUMMARY
A voltage regulator including at least one coupled inductor including a first winding and a second winding each having a polarity. The first winding and the second winding connected in series to form a common node such that the first winding and the second winding have the same polarity. The first winding and the second winding having a coefficient of coupling approximately equal to one. A conduction switch having an on-state and an off-state, to controllably conduct an input voltage to the at least one coupled inductor at a switching frequency. A freewheeling switch having an on-state and an off-state, in communication with the common node of the at least one coupled inductor to provide a path for current when the conduction switch is in the off-state. An output capacitor in communication with the at least one coupled inductor to filter the output voltage.
The details of one or more embodiments of the invention are set forth in the accompanying drawings and the description below. Other features, objects, and advantages of the invention will be apparent from the description and drawings, and from the claims.
DESCRIPTION OF DRAWINGS
FIG. 1A is a schematic diagram of a standard topology buck regulator.
FIG. 1B is a a representation of waveforms associated with an aspect of standard topology buck regulator.
FIG. 2A is a block diagram of an aspect of a voltage regulator.
FIG. 2B is a circuit diagram of an aspect of conduction and freewheeling switches in a voltage regulator.
FIG. 2C is a circuit diagram of an aspect of a voltage regulator.
FIG. 2D is a representation of waveforms associated with an aspect of a voltage regulator.
FIG. 3A is a graphical representation of an aspect of a coupled inductor.
FIG. 3B is a graphical representation of an aspect of a coupled inductor.
FIG. 4 is a circuit diagram of an aspect of a voltage regulator having multiple output phases.
Like reference symbols in the various drawings indicate like elements.
DETAILED DESCRIPTION
FIG. 2A shows a block diagram of an aspect of a voltage regulator 30 for supplying power to one or more devices such as high-speed drivers and other electronic devices. The voltage regulator 30 may operate open-loop or closed-loop to convert an input voltage, VIN, to a non-isolated output voltage, VOUT. The input voltage may be referenced to any voltage such as ground or VL. A conduction switch 32 may switch between in an on-state and an off-state at a switching frequency to apply the input voltage to a coupled inductor 36. The conduction switch 32 may be any type of bi-directional switching device such as Field Effect Transistors (FETs), NMOS, PMOS, Bipolar Junction Transistors (BJTs), and Integrated Gate Bipolar Junction Transistors (IGBTs). During the off-time, the entire input voltage may be impressed across the conduction switch 32, therefore the conduction switch 32 should have a withstanding voltage that is greater than the input voltage. A freewheeling switch 34 may provide a path for current flowing in the coupled inductor 36 when the conduction switch 32 is in the off-state. The freewheeling switch 34 may be any type of switch such as uni-directional switches, bi-directional switches, diodes, rectifiers, synchronous rectifiers, FETs, NMOS, PMOS, BJTs, and IGBTs. Due to the operation of the coupled inductor 36, less than the entire input voltage is impressed across the freewheeling switch 34 during operation of the voltage regulator 30, therefore the freewheeling switch 34 may have a withstanding voltage that is less than the input voltage. Advantageously, switches that have a lower withstanding voltage almost universally have a lower Rds(on) or Vce(sat) than a switch with a comparable die size and a higher withstanding voltage. The lower Rds(on) or Vce(sat) of the freewheeling switch 34 may result in lower conduction losses in the freewheeling switch 34. In addition, the switching losses may also be lower due to the lower voltage impressed across the freewheeling switch 34. The current flowing through the coupled inductor 36 may be filtered by an output capacitor 38 to form Vout. A drive signal generator 31 may generate a drive signal to control the conduction switch 32. The drive signal generator 31 may also generate a drive signal to control the freewheeling switch 34 if a controllable switch such as a FET is used as the freewheeling switch 34.
A frequency generator 35 may generate a clock signal having an operating frequency. The drive signals may be synchronized to operate at the operating frequency. In one aspect, the operating frequency may be fixed to a predetermined frequency. In another aspect, the operating frequency may be controlled in response to changes in load conditions such as output current and output voltage. For example, when a change in the output current, such as an increase in load current, is sensed, the operating frequency may be increased to increase the transient response of the output. Once the voltage regulator 30 has responded to the change in load condition and has reached steady-state operating conditions again, the operating frequency may be decreased to reduce power losses in the voltage regulator 30.
A multi-level gate drive 37 may drive either of the conduction switch 32 and the freewheeling switch 34 using a multi-level gate voltage to reduce switching losses. For example, the amplitude of the on voltage may be adjusted to differing predetermined levels dependent on factors such as the current flowing through the conduction switch 32 to decrease switching losses in the conduction switch 32. Using a two level gate voltage for the conduction switch 32 or freewheeling switch 34 may be advantageous since the output voltage of the voltage regulator 30 may be used as the intermediate level voltage for driving the switches.
FIG. 2B shows an aspect of the conduction switch 32 and the freewheeling switch 34. Each of the conduction switch 32 and the freewheeling switch 34 may be comprised of one or more parallel switches, 33a-33c, that are independently controllable. Each of the parallel switches 33a-3c may be controlled by enable signals, ENB1-ENB3, to enable either all or a subset of the parallel switches 33a-33c. The enabled parallel switches 33a-33c may then be controlled by the same drive signal, Φ1.
FIG. 2C shows a schematic diagram of an aspect of the voltage regulator 30. In this aspect, PMOS and NMOS devices may be used respectively as a conduction switch 32a and a freewheeling switch 34a. A coupled inductor 36a and an output capacitor 38a may filter the pulse output generated by the conduction switch 32a and the freewheeling switch 34a to generate the DC output voltage, Vout.
The coupled inductor 36a may have a first winding of N1 turns and a second winding of N2 turns. A turns ratio of N1/N2 may be set to a predetermined value to control the flow of energy through the coupled inductor 36a. For example, with a turns ratio of 0, a standard topology buck converter is formed. With a turns ratio of 2, the duty cycle of the voltage regulator is approximately two times greater than the duty cycle for the standard topology buck converter, the current flowing through the coupled inductor 36a is approximately one-half the amplitude, and the voltage impressed across the drain-source of the freewheeling switch 34a is less than the voltage impressed across the drain-source of the standard topology buck converter. The voltage impressed across the drain-source of the freewheeling switch 34a is approximately,
In contradistinction, in a standard topology buck converter the voltage impressed across the drain-source of the freewheeling switch is approximately, Vds≅Vin.
Therefore, the freewheeling switch 34a may be selected to have a lower withstanding voltage, Vds; and by using a similar die size to what a standard topology switch would use, the Rds(on) for the freewheeling switch 34a may also be lower.
The coupled inductor 36a may be tightly coupled together preferably having a coefficient of coupling, K, of approximately one, where unity is the ideal value. Preferably the inductors of the coupled inductor 36a are wound together on a common magnetic core to form an inductor assembly that provides the maximum value of coefficient of coupling. The coefficient of coupling is approximately one being at least 0.9 and preferably greater than 0.99. The polarity for each of the windings for the coupled inductor 36a are selected so that the current flowing through each of the inductors of the coupled inductor 36a flows in the same direction. Any type of suitable core material may be used for the coupled inductor 36a including high permeability core materials such as ferrites having shapes such as bead and toroid, and lower permeability materials such as MPP cores, ferrite PQ cores, and other split core shapes.
FIG. 2D shows waveforms associated with an aspect of the voltage regulator 30 with Vin equal to 12 volts and Vout equal to 1.2 volts. Waveform 40 shows the conduction state of the conduction switch, S1, 32a. Waveform 42 shows the drain-source voltage, Vds, of the freewheeling switch 34a. The amplitude of Vds during the on-time of the conduction switch 32a is approximately 4.67 volts. Waveform 43 shows Vds of the freewheeling switch for a standard topology buck converter. The Vds for the standard topology buck converter is approximately equal to the input voltage of 12 volts. Waveform 44 shows the current flowing through the freewheeling switch 34a. Waveform 46 shows the current flowing through the conduction switch 32a, and waveform 48 shows the current for a standard topology buck converter conduction switch. Waveforms 46 and 48 show that for a turns ratio of 2, the current flowing in a conduction switch is approximately two times greater than the current flowing the conduction switch 32a of the voltage regulator 30. As shown, the standard topology buck converter may have significantly greater switching losses due to the higher drain-source voltage and current. In addition, the risetime and falltime of the drain-source voltage in the standard topology buck converter may comprise a significantly greater proportion of the pulse-width resulting in leading to greater switching losses. By employing the coupled inductor 36a with a turns ratio of at least approximately two, the switching losses and voltage stress of the freewheeling switch 34a may be decreased. In addition, the current ripple flowing to the output capacitor 38a is approximately decreased in proportion to the turns ratio. For example, with a turns ratio of two, the current ripple is approximately decreased by a factor of two, thereby permitting the use of a lower value output capacitor to attain a similar output voltage ripple.
FIG. 3A shows an aspect of a coupled inductor 50 wound on a toroid. The windings of the coupled inductor 50 are arranged so that currents flow through the windings in the same direction.
FIG. 3B shows another aspect of a coupled inductor 52 wound on a planar assembly. The coupled inductor 52 is similar in function to the coupled inductor 50 such as the windings are arranged so that currents flow through the windings in the same direction. Any form of coupled inductor may be employed such as the coupled inductors shown and described in U.S. non-provisional application Ser. No. 10/621,128, filed Jul. 16, 2003 and Ser. No. 10/744,416, filed Dec. 22, 2003 which are hereby incorporated by reference in their entirety.
FIG. 4 shows an aspect of a voltage regulator 100 having multiple output phases. The voltage regulator 100 includes from 2 to N voltage regulators 30 connected in parallel. Each of the voltage regulators 30 may operate in accordance with the principles described above. In one aspect, an output capacitor 38a may filter the combined output of the voltage regulators 30. In another aspect, an output capacitor 38b may be included in each of the voltage regulators 30. In another aspect, a combination of output capacitors 38a and 38b may be included to provide output filtering. A phase generator 102 may generate pulse signals to control the phase relationship between each of the voltage regulators 30 so that the outputs of the voltage regulators are time skewed by a predetermined time leading to higher frequency output ripple. Each of the voltage regulators 30 advantageously provides of two conventional voltage regulators operated in multi-phase configuration since each of the voltage regulators 30 may stretch out the duty cycle by a factor of two when the turns ratio is set to two.
A number of embodiments of the invention have been described. Nevertheless, it will be understood that various modifications may be made without departing from the spirit and scope of the invention. Accordingly, other embodiments are within the scope of the following claims.
Patent Application
20050212496
